src/share/vm/c1/c1_LIR.hpp

changeset 3787
6759698e3140
parent 3592
701a83c86f28
child 3969
1d7922586cf6
equal deleted inserted replaced
3760:8f972594effc 3787:6759698e3140
914 , lir_sin 914 , lir_sin
915 , lir_cos 915 , lir_cos
916 , lir_tan 916 , lir_tan
917 , lir_log 917 , lir_log
918 , lir_log10 918 , lir_log10
919 , lir_exp
920 , lir_pow
919 , lir_logic_and 921 , lir_logic_and
920 , lir_logic_or 922 , lir_logic_or
921 , lir_logic_xor 923 , lir_logic_xor
922 , lir_shl 924 , lir_shl
923 , lir_shr 925 , lir_shr
1558 1560
1559 protected: 1561 protected:
1560 LIR_Opr _opr1; 1562 LIR_Opr _opr1;
1561 LIR_Opr _opr2; 1563 LIR_Opr _opr2;
1562 BasicType _type; 1564 BasicType _type;
1563 LIR_Opr _tmp; 1565 LIR_Opr _tmp1;
1566 LIR_Opr _tmp2;
1567 LIR_Opr _tmp3;
1568 LIR_Opr _tmp4;
1569 LIR_Opr _tmp5;
1564 LIR_Condition _condition; 1570 LIR_Condition _condition;
1565 1571
1566 void verify() const; 1572 void verify() const;
1567 1573
1568 public: 1574 public:
1571 , _opr1(opr1) 1577 , _opr1(opr1)
1572 , _opr2(opr2) 1578 , _opr2(opr2)
1573 , _type(T_ILLEGAL) 1579 , _type(T_ILLEGAL)
1574 , _condition(condition) 1580 , _condition(condition)
1575 , _fpu_stack_size(0) 1581 , _fpu_stack_size(0)
1576 , _tmp(LIR_OprFact::illegalOpr) { 1582 , _tmp1(LIR_OprFact::illegalOpr)
1583 , _tmp2(LIR_OprFact::illegalOpr)
1584 , _tmp3(LIR_OprFact::illegalOpr)
1585 , _tmp4(LIR_OprFact::illegalOpr)
1586 , _tmp5(LIR_OprFact::illegalOpr) {
1577 assert(code == lir_cmp, "code check"); 1587 assert(code == lir_cmp, "code check");
1578 } 1588 }
1579 1589
1580 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) 1590 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1581 : LIR_Op(code, result, NULL) 1591 : LIR_Op(code, result, NULL)
1582 , _opr1(opr1) 1592 , _opr1(opr1)
1583 , _opr2(opr2) 1593 , _opr2(opr2)
1584 , _type(type) 1594 , _type(type)
1585 , _condition(condition) 1595 , _condition(condition)
1586 , _fpu_stack_size(0) 1596 , _fpu_stack_size(0)
1587 , _tmp(LIR_OprFact::illegalOpr) { 1597 , _tmp1(LIR_OprFact::illegalOpr)
1598 , _tmp2(LIR_OprFact::illegalOpr)
1599 , _tmp3(LIR_OprFact::illegalOpr)
1600 , _tmp4(LIR_OprFact::illegalOpr)
1601 , _tmp5(LIR_OprFact::illegalOpr) {
1588 assert(code == lir_cmove, "code check"); 1602 assert(code == lir_cmove, "code check");
1589 assert(type != T_ILLEGAL, "cmove should have type"); 1603 assert(type != T_ILLEGAL, "cmove should have type");
1590 } 1604 }
1591 1605
1592 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, 1606 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1595 , _opr1(opr1) 1609 , _opr1(opr1)
1596 , _opr2(opr2) 1610 , _opr2(opr2)
1597 , _type(type) 1611 , _type(type)
1598 , _condition(lir_cond_unknown) 1612 , _condition(lir_cond_unknown)
1599 , _fpu_stack_size(0) 1613 , _fpu_stack_size(0)
1600 , _tmp(LIR_OprFact::illegalOpr) { 1614 , _tmp1(LIR_OprFact::illegalOpr)
1615 , _tmp2(LIR_OprFact::illegalOpr)
1616 , _tmp3(LIR_OprFact::illegalOpr)
1617 , _tmp4(LIR_OprFact::illegalOpr)
1618 , _tmp5(LIR_OprFact::illegalOpr) {
1601 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1619 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1602 } 1620 }
1603 1621
1604 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp) 1622 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1623 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1605 : LIR_Op(code, result, NULL) 1624 : LIR_Op(code, result, NULL)
1606 , _opr1(opr1) 1625 , _opr1(opr1)
1607 , _opr2(opr2) 1626 , _opr2(opr2)
1608 , _type(T_ILLEGAL) 1627 , _type(T_ILLEGAL)
1609 , _condition(lir_cond_unknown) 1628 , _condition(lir_cond_unknown)
1610 , _fpu_stack_size(0) 1629 , _fpu_stack_size(0)
1611 , _tmp(tmp) { 1630 , _tmp1(tmp1)
1631 , _tmp2(tmp2)
1632 , _tmp3(tmp3)
1633 , _tmp4(tmp4)
1634 , _tmp5(tmp5) {
1612 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1635 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1613 } 1636 }
1614 1637
1615 LIR_Opr in_opr1() const { return _opr1; } 1638 LIR_Opr in_opr1() const { return _opr1; }
1616 LIR_Opr in_opr2() const { return _opr2; } 1639 LIR_Opr in_opr2() const { return _opr2; }
1617 BasicType type() const { return _type; } 1640 BasicType type() const { return _type; }
1618 LIR_Opr tmp_opr() const { return _tmp; } 1641 LIR_Opr tmp1_opr() const { return _tmp1; }
1642 LIR_Opr tmp2_opr() const { return _tmp2; }
1643 LIR_Opr tmp3_opr() const { return _tmp3; }
1644 LIR_Opr tmp4_opr() const { return _tmp4; }
1645 LIR_Opr tmp5_opr() const { return _tmp5; }
1619 LIR_Condition condition() const { 1646 LIR_Condition condition() const {
1620 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; 1647 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1621 } 1648 }
1622 void set_condition(LIR_Condition condition) { 1649 void set_condition(LIR_Condition condition) {
1623 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; 1650 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
2023 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } 2050 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2024 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2051 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2025 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } 2052 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2026 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } 2053 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2027 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } 2054 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2055 void exp (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_exp , from, tmp1, to, tmp2, tmp3, tmp4, tmp5)); }
2056 void pow (LIR_Opr arg1, LIR_Opr arg2, LIR_Opr res, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, LIR_Opr tmp4, LIR_Opr tmp5) { append(new LIR_Op2(lir_pow, arg1, arg2, res, tmp1, tmp2, tmp3, tmp4, tmp5)); }
2028 2057
2029 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } 2058 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2030 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } 2059 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2031 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } 2060 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2032 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } 2061 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }

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