src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp

changeset 1495
323bd24c6520
parent 1434
708275a44e4a
child 1907
c18cbe5936b8
child 1927
87fc6aca31ab
equal deleted inserted replaced
1494:389049f3f393 1495:323bd24c6520
142 } 142 }
143 143
144 if (index->is_register()) { 144 if (index->is_register()) {
145 // apply the shift and accumulate the displacement 145 // apply the shift and accumulate the displacement
146 if (shift > 0) { 146 if (shift > 0) {
147 LIR_Opr tmp = new_register(T_INT); 147 LIR_Opr tmp = new_pointer_register();
148 __ shift_left(index, shift, tmp); 148 __ shift_left(index, shift, tmp);
149 index = tmp; 149 index = tmp;
150 } 150 }
151 if (disp != 0) { 151 if (disp != 0) {
152 LIR_Opr tmp = new_register(T_INT); 152 LIR_Opr tmp = new_pointer_register();
153 if (Assembler::is_simm13(disp)) { 153 if (Assembler::is_simm13(disp)) {
154 __ add(tmp, LIR_OprFact::intConst(disp), tmp); 154 __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
155 index = tmp; 155 index = tmp;
156 } else { 156 } else {
157 __ move(LIR_OprFact::intConst(disp), tmp); 157 __ move(LIR_OprFact::intptrConst(disp), tmp);
158 __ add(tmp, index, tmp); 158 __ add(tmp, index, tmp);
159 index = tmp; 159 index = tmp;
160 } 160 }
161 disp = 0; 161 disp = 0;
162 } 162 }
163 } else if (disp != 0 && !Assembler::is_simm13(disp)) { 163 } else if (disp != 0 && !Assembler::is_simm13(disp)) {
164 // index is illegal so replace it with the displacement loaded into a register 164 // index is illegal so replace it with the displacement loaded into a register
165 index = new_register(T_INT); 165 index = new_pointer_register();
166 __ move(LIR_OprFact::intConst(disp), index); 166 __ move(LIR_OprFact::intptrConst(disp), index);
167 disp = 0; 167 disp = 0;
168 } 168 }
169 169
170 // at this point we either have base + index or base + displacement 170 // at this point we either have base + index or base + displacement
171 if (disp == 0) { 171 if (disp == 0) {

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