1619 |
1619 |
1620 // pp 230 |
1620 // pp 230 |
1621 |
1621 |
1622 void sub( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | rs2(s2) ); } |
1622 void sub( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | rs2(s2) ); } |
1623 void sub( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
1623 void sub( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
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1624 |
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1625 // Note: offset is added to s2. |
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1626 inline void sub(Register s1, RegisterOrConstant s2, Register d, int offset = 0); |
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1627 |
1624 void subcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | rs2(s2) ); } |
1628 void subcc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | rs2(s2) ); } |
1625 void subcc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
1629 void subcc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(sub_op3 | cc_bit_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
1626 void subc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | rs2(s2) ); } |
1630 void subc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | rs2(s2) ); } |
1627 void subc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
1631 void subc( Register s1, int simm13a, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 ) | rs1(s1) | immed(true) | simm(simm13a, 13) ); } |
1628 void subccc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); } |
1632 void subccc( Register s1, Register s2, Register d ) { emit_long( op(arith_op) | rd(d) | op3(subc_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); } |
1892 void set(intptr_t value, Register d); |
1896 void set(intptr_t value, Register d); |
1893 void set(address addr, Register d, RelocationHolder const& rspec); |
1897 void set(address addr, Register d, RelocationHolder const& rspec); |
1894 void patchable_set(const AddressLiteral& addrlit, Register d); |
1898 void patchable_set(const AddressLiteral& addrlit, Register d); |
1895 void patchable_set(intptr_t value, Register d); |
1899 void patchable_set(intptr_t value, Register d); |
1896 void set64(jlong value, Register d, Register tmp); |
1900 void set64(jlong value, Register d, Register tmp); |
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1901 |
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1902 // Compute size of set64. |
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1903 static int size_of_set64(jlong value); |
1897 |
1904 |
1898 // sign-extend 32 to 64 |
1905 // sign-extend 32 to 64 |
1899 inline void signx( Register s, Register d ) { sra( s, G0, d); } |
1906 inline void signx( Register s, Register d ) { sra( s, G0, d); } |
1900 inline void signx( Register d ) { sra( d, G0, d); } |
1907 inline void signx( Register d ) { sra( d, G0, d); } |
1901 |
1908 |