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comparison: src/cpu/sparc/vm/sparc.ad

src/cpu/sparc/vm/sparc.ad

changeset 1259
18a08a7e16b5
parent 1220
2056494941db
child 1386
1fbd5d696bf4
equal deleted inserted replaced
1258:14367225a853 1259:18a08a7e16b5
1889 1889
1890 1890
1891 // The intptr_t operand types, defined by textual substitution. 1891 // The intptr_t operand types, defined by textual substitution.
1892 // (Cf. opto/type.hpp. This lets us avoid many, many other ifdefs.) 1892 // (Cf. opto/type.hpp. This lets us avoid many, many other ifdefs.)
1893 #ifdef _LP64 1893 #ifdef _LP64
1894 #define immX immL 1894 #define immX immL
1895 #define immX13 immL13 1895 #define immX13 immL13
1896 #define immX13m7 immL13m7 1896 #define immX13m7 immL13m7
1897 #define iRegX iRegL 1897 #define iRegX iRegL
1898 #define g1RegX g1RegL 1898 #define g1RegX g1RegL
1899 #else 1899 #else
1900 #define immX immI 1900 #define immX immI
1901 #define immX13 immI13 1901 #define immX13 immI13
1902 #define immX13m7 immI13m7 1902 #define immX13m7 immI13m7
1903 #define iRegX iRegI 1903 #define iRegX iRegI
1904 #define g1RegX g1RegI 1904 #define g1RegX g1RegI
1905 #endif 1905 #endif
1906 1906
1907 //----------ENCODING BLOCK----------------------------------------------------- 1907 //----------ENCODING BLOCK-----------------------------------------------------
1908 // This block specifies the encoding classes used by the compiler to output 1908 // This block specifies the encoding classes used by the compiler to output
1909 // byte streams. Encoding classes are parameterized macros used by 1909 // byte streams. Encoding classes are parameterized macros used by
3444 // formats are generated automatically for constants and base registers 3444 // formats are generated automatically for constants and base registers
3445 format %{ %} 3445 format %{ %}
3446 interface(CONST_INTER); 3446 interface(CONST_INTER);
3447 %} 3447 %}
3448 3448
3449 // Integer Immediate: 8-bit
3450 operand immI8() %{
3451 predicate(Assembler::is_simm(n->get_int(), 8));
3452 match(ConI);
3453 op_cost(0);
3454 format %{ %}
3455 interface(CONST_INTER);
3456 %}
3457
3449 // Integer Immediate: 13-bit 3458 // Integer Immediate: 13-bit
3450 operand immI13() %{ 3459 operand immI13() %{
3451 predicate(Assembler::is_simm13(n->get_int())); 3460 predicate(Assembler::is_simm13(n->get_int()));
3452 match(ConI); 3461 match(ConI);
3453 op_cost(0); 3462 op_cost(0);
3460 operand immI13m7() %{ 3469 operand immI13m7() %{
3461 predicate((-4096 < n->get_int()) && ((n->get_int() + 7) <= 4095)); 3470 predicate((-4096 < n->get_int()) && ((n->get_int() + 7) <= 4095));
3462 match(ConI); 3471 match(ConI);
3463 op_cost(0); 3472 op_cost(0);
3464 3473
3474 format %{ %}
3475 interface(CONST_INTER);
3476 %}
3477
3478 // Integer Immediate: 16-bit
3479 operand immI16() %{
3480 predicate(Assembler::is_simm(n->get_int(), 16));
3481 match(ConI);
3482 op_cost(0);
3465 format %{ %} 3483 format %{ %}
3466 interface(CONST_INTER); 3484 interface(CONST_INTER);
3467 %} 3485 %}
3468 3486
3469 // Unsigned (positive) Integer Immediate: 13-bit 3487 // Unsigned (positive) Integer Immediate: 13-bit
5542 size(4); 5560 size(4);
5543 format %{ "LDUB $mem,$dst\t! ubyte" %} 5561 format %{ "LDUB $mem,$dst\t! ubyte" %}
5544 ins_encode %{ 5562 ins_encode %{
5545 __ ldub($mem$$Address, $dst$$Register); 5563 __ ldub($mem$$Address, $dst$$Register);
5546 %} 5564 %}
5547 ins_pipe(iload_mask_mem); 5565 ins_pipe(iload_mem);
5548 %} 5566 %}
5549 5567
5550 // Load Unsigned Byte (8bit UNsigned) into a Long Register 5568 // Load Unsigned Byte (8bit UNsigned) into a Long Register
5551 instruct loadUB2L(iRegL dst, memory mem) %{ 5569 instruct loadUB2L(iRegL dst, memory mem) %{
5552 match(Set dst (ConvI2L (LoadUB mem))); 5570 match(Set dst (ConvI2L (LoadUB mem)));
5555 size(4); 5573 size(4);
5556 format %{ "LDUB $mem,$dst\t! ubyte -> long" %} 5574 format %{ "LDUB $mem,$dst\t! ubyte -> long" %}
5557 ins_encode %{ 5575 ins_encode %{
5558 __ ldub($mem$$Address, $dst$$Register); 5576 __ ldub($mem$$Address, $dst$$Register);
5559 %} 5577 %}
5560 ins_pipe(iload_mask_mem); 5578 ins_pipe(iload_mem);
5579 %}
5580
5581 // Load Unsigned Byte (8 bit UNsigned) with 8-bit mask into Long Register
5582 instruct loadUB2L_immI8(iRegL dst, memory mem, immI8 mask) %{
5583 match(Set dst (ConvI2L (AndI (LoadUB mem) mask)));
5584 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5585
5586 size(2*4);
5587 format %{ "LDUB $mem,$dst\t# ubyte & 8-bit mask -> long\n\t"
5588 "AND $dst,$mask,$dst" %}
5589 ins_encode %{
5590 __ ldub($mem$$Address, $dst$$Register);
5591 __ and3($dst$$Register, $mask$$constant, $dst$$Register);
5592 %}
5593 ins_pipe(iload_mem);
5561 %} 5594 %}
5562 5595
5563 // Load Short (16bit signed) 5596 // Load Short (16bit signed)
5564 instruct loadS(iRegI dst, memory mem) %{ 5597 instruct loadS(iRegI dst, memory mem) %{
5565 match(Set dst (LoadS mem)); 5598 match(Set dst (LoadS mem));
5608 size(4); 5641 size(4);
5609 format %{ "LDUH $mem,$dst\t! ushort/char" %} 5642 format %{ "LDUH $mem,$dst\t! ushort/char" %}
5610 ins_encode %{ 5643 ins_encode %{
5611 __ lduh($mem$$Address, $dst$$Register); 5644 __ lduh($mem$$Address, $dst$$Register);
5612 %} 5645 %}
5613 ins_pipe(iload_mask_mem); 5646 ins_pipe(iload_mem);
5614 %} 5647 %}
5615 5648
5616 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed) 5649 // Load Unsigned Short/Char (16 bit UNsigned) to Byte (8 bit signed)
5617 instruct loadUS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{ 5650 instruct loadUS2B(iRegI dst, indOffset13m7 mem, immI_24 twentyfour) %{
5618 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour)); 5651 match(Set dst (RShiftI (LShiftI (LoadUS mem) twentyfour) twentyfour));
5634 size(4); 5667 size(4);
5635 format %{ "LDUH $mem,$dst\t! ushort/char -> long" %} 5668 format %{ "LDUH $mem,$dst\t! ushort/char -> long" %}
5636 ins_encode %{ 5669 ins_encode %{
5637 __ lduh($mem$$Address, $dst$$Register); 5670 __ lduh($mem$$Address, $dst$$Register);
5638 %} 5671 %}
5639 ins_pipe(iload_mask_mem); 5672 ins_pipe(iload_mem);
5673 %}
5674
5675 // Load Unsigned Short/Char (16bit UNsigned) with mask 0xFF into a Long Register
5676 instruct loadUS2L_immI_255(iRegL dst, indOffset13m7 mem, immI_255 mask) %{
5677 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5678 ins_cost(MEMORY_REF_COST);
5679
5680 size(4);
5681 format %{ "LDUB $mem+1,$dst\t! ushort/char & 0xFF -> long" %}
5682 ins_encode %{
5683 __ ldub($mem$$Address, $dst$$Register, 1); // LSB is index+1 on BE
5684 %}
5685 ins_pipe(iload_mem);
5686 %}
5687
5688 // Load Unsigned Short/Char (16bit UNsigned) with a 13-bit mask into a Long Register
5689 instruct loadUS2L_immI13(iRegL dst, memory mem, immI13 mask) %{
5690 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5691 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5692
5693 size(2*4);
5694 format %{ "LDUH $mem,$dst\t! ushort/char & 13-bit mask -> long\n\t"
5695 "AND $dst,$mask,$dst" %}
5696 ins_encode %{
5697 Register Rdst = $dst$$Register;
5698 __ lduh($mem$$Address, Rdst);
5699 __ and3(Rdst, $mask$$constant, Rdst);
5700 %}
5701 ins_pipe(iload_mem);
5702 %}
5703
5704 // Load Unsigned Short/Char (16bit UNsigned) with a 16-bit mask into a Long Register
5705 instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{
5706 match(Set dst (ConvI2L (AndI (LoadUS mem) mask)));
5707 effect(TEMP dst, TEMP tmp);
5708 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5709
5710 size(3*4);
5711 format %{ "LDUH $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
5712 "SET $mask,$tmp\n\t"
5713 "AND $dst,$tmp,$dst" %}
5714 ins_encode %{
5715 Register Rdst = $dst$$Register;
5716 Register Rtmp = $tmp$$Register;
5717 __ lduh($mem$$Address, Rdst);
5718 __ set($mask$$constant, Rtmp);
5719 __ and3(Rdst, Rtmp, Rdst);
5720 %}
5721 ins_pipe(iload_mem);
5640 %} 5722 %}
5641 5723
5642 // Load Integer 5724 // Load Integer
5643 instruct loadI(iRegI dst, memory mem) %{ 5725 instruct loadI(iRegI dst, memory mem) %{
5644 match(Set dst (LoadI mem)); 5726 match(Set dst (LoadI mem));
5715 5797
5716 size(4); 5798 size(4);
5717 format %{ "LDSW $mem,$dst\t! int -> long" %} 5799 format %{ "LDSW $mem,$dst\t! int -> long" %}
5718 ins_encode %{ 5800 ins_encode %{
5719 __ ldsw($mem$$Address, $dst$$Register); 5801 __ ldsw($mem$$Address, $dst$$Register);
5802 %}
5803 ins_pipe(iload_mask_mem);
5804 %}
5805
5806 // Load Integer with mask 0xFF into a Long Register
5807 instruct loadI2L_immI_255(iRegL dst, indOffset13m7 mem, immI_255 mask) %{
5808 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5809 ins_cost(MEMORY_REF_COST);
5810
5811 size(4);
5812 format %{ "LDUB $mem+3,$dst\t! int & 0xFF -> long" %}
5813 ins_encode %{
5814 __ ldub($mem$$Address, $dst$$Register, 3); // LSB is index+3 on BE
5815 %}
5816 ins_pipe(iload_mem);
5817 %}
5818
5819 // Load Integer with mask 0xFFFF into a Long Register
5820 instruct loadI2L_immI_65535(iRegL dst, indOffset13m7 mem, immI_65535 mask) %{
5821 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5822 ins_cost(MEMORY_REF_COST);
5823
5824 size(4);
5825 format %{ "LDUH $mem+2,$dst\t! int & 0xFFFF -> long" %}
5826 ins_encode %{
5827 __ lduh($mem$$Address, $dst$$Register, 2); // LSW is index+2 on BE
5828 %}
5829 ins_pipe(iload_mem);
5830 %}
5831
5832 // Load Integer with a 13-bit mask into a Long Register
5833 instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
5834 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5835 ins_cost(MEMORY_REF_COST + DEFAULT_COST);
5836
5837 size(2*4);
5838 format %{ "LDUW $mem,$dst\t! int & 13-bit mask -> long\n\t"
5839 "AND $dst,$mask,$dst" %}
5840 ins_encode %{
5841 Register Rdst = $dst$$Register;
5842 __ lduw($mem$$Address, Rdst);
5843 __ and3(Rdst, $mask$$constant, Rdst);
5844 %}
5845 ins_pipe(iload_mem);
5846 %}
5847
5848 // Load Integer with a 32-bit mask into a Long Register
5849 instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
5850 match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
5851 effect(TEMP dst, TEMP tmp);
5852 ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
5853
5854 size(3*4);
5855 format %{ "LDUW $mem,$dst\t! int & 32-bit mask -> long\n\t"
5856 "SET $mask,$tmp\n\t"
5857 "AND $dst,$tmp,$dst" %}
5858 ins_encode %{
5859 Register Rdst = $dst$$Register;
5860 Register Rtmp = $tmp$$Register;
5861 __ lduw($mem$$Address, Rdst);
5862 __ set($mask$$constant, Rtmp);
5863 __ and3(Rdst, Rtmp, Rdst);
5720 %} 5864 %}
5721 ins_pipe(iload_mem); 5865 ins_pipe(iload_mem);
5722 %} 5866 %}
5723 5867
5724 // Load Unsigned Integer into a Long Register 5868 // Load Unsigned Integer into a Long Register

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