1266 //============================================================================= |
1266 //============================================================================= |
1267 #ifndef PRODUCT |
1267 #ifndef PRODUCT |
1268 void MachEpilogNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { |
1268 void MachEpilogNode::format( PhaseRegAlloc *ra_, outputStream *st ) const { |
1269 Compile* C = ra_->C; |
1269 Compile* C = ra_->C; |
1270 |
1270 |
1271 if( do_polling() && ra_->C->is_method_compilation() ) { |
1271 if(do_polling() && ra_->C->is_method_compilation()) { |
1272 st->print("SETHI #PollAddr,L0\t! Load Polling address\n\t"); |
1272 st->print("SETHI #PollAddr,L0\t! Load Polling address\n\t"); |
1273 #ifdef _LP64 |
1273 #ifdef _LP64 |
1274 st->print("LDX [L0],G0\t!Poll for Safepointing\n\t"); |
1274 st->print("LDX [L0],G0\t!Poll for Safepointing\n\t"); |
1275 #else |
1275 #else |
1276 st->print("LDUW [L0],G0\t!Poll for Safepointing\n\t"); |
1276 st->print("LDUW [L0],G0\t!Poll for Safepointing\n\t"); |
1277 #endif |
1277 #endif |
1278 } |
1278 } |
1279 |
1279 |
1280 if( do_polling() ) |
1280 if(do_polling()) { |
|
1281 if (UseCBCond && !ra_->C->is_method_compilation()) { |
|
1282 st->print("NOP\n\t"); |
|
1283 } |
1281 st->print("RET\n\t"); |
1284 st->print("RET\n\t"); |
|
1285 } |
1282 |
1286 |
1283 st->print("RESTORE"); |
1287 st->print("RESTORE"); |
1284 } |
1288 } |
1285 #endif |
1289 #endif |
1286 |
1290 |
1289 Compile* C = ra_->C; |
1293 Compile* C = ra_->C; |
1290 |
1294 |
1291 __ verify_thread(); |
1295 __ verify_thread(); |
1292 |
1296 |
1293 // If this does safepoint polling, then do it here |
1297 // If this does safepoint polling, then do it here |
1294 if( do_polling() && ra_->C->is_method_compilation() ) { |
1298 if(do_polling() && ra_->C->is_method_compilation()) { |
1295 AddressLiteral polling_page(os::get_polling_page()); |
1299 AddressLiteral polling_page(os::get_polling_page()); |
1296 __ sethi(polling_page, L0); |
1300 __ sethi(polling_page, L0); |
1297 __ relocate(relocInfo::poll_return_type); |
1301 __ relocate(relocInfo::poll_return_type); |
1298 __ ld_ptr( L0, 0, G0 ); |
1302 __ ld_ptr(L0, 0, G0); |
1299 } |
1303 } |
1300 |
1304 |
1301 // If this is a return, then stuff the restore in the delay slot |
1305 // If this is a return, then stuff the restore in the delay slot |
1302 if( do_polling() ) { |
1306 if(do_polling()) { |
|
1307 if (UseCBCond && !ra_->C->is_method_compilation()) { |
|
1308 // Insert extra padding for the case when the epilogue is preceded by |
|
1309 // a cbcond jump, which can't be followed by a CTI instruction |
|
1310 __ nop(); |
|
1311 } |
1303 __ ret(); |
1312 __ ret(); |
1304 __ delayed()->restore(); |
1313 __ delayed()->restore(); |
1305 } else { |
1314 } else { |
1306 __ restore(); |
1315 __ restore(); |
1307 } |
1316 } |
3328 op_attrib op_cost(1); // Required cost attribute |
3337 op_attrib op_cost(1); // Required cost attribute |
3329 |
3338 |
3330 //----------Instruction Attributes--------------------------------------------- |
3339 //----------Instruction Attributes--------------------------------------------- |
3331 ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute |
3340 ins_attrib ins_cost(DEFAULT_COST); // Required cost attribute |
3332 ins_attrib ins_size(32); // Required size attribute (in bits) |
3341 ins_attrib ins_size(32); // Required size attribute (in bits) |
3333 ins_attrib ins_avoid_back_to_back(0); // instruction should not be generated back to back |
3342 |
|
3343 // avoid_back_to_back attribute is an expression that must return |
|
3344 // one of the following values defined in MachNode: |
|
3345 // AVOID_NONE - instruction can be placed anywhere |
|
3346 // AVOID_BEFORE - instruction cannot be placed after an |
|
3347 // instruction with MachNode::AVOID_AFTER |
|
3348 // AVOID_AFTER - the next instruction cannot be the one |
|
3349 // with MachNode::AVOID_BEFORE |
|
3350 // AVOID_BEFORE_AND_AFTER - BEFORE and AFTER attributes at |
|
3351 // the same time |
|
3352 ins_attrib ins_avoid_back_to_back(MachNode::AVOID_NONE); |
|
3353 |
3334 ins_attrib ins_short_branch(0); // Required flag: is this instruction a |
3354 ins_attrib ins_short_branch(0); // Required flag: is this instruction a |
3335 // non-matching short branch variant of some |
3355 // non-matching short branch variant of some |
3336 // long branch? |
3356 // long branch? |
3337 |
3357 |
3338 //----------OPERANDS----------------------------------------------------------- |
3358 //----------OPERANDS----------------------------------------------------------- |
6628 match(Set dst (EncodeP src)); |
6648 match(Set dst (EncodeP src)); |
6629 format %{ "encode_heap_oop $src, $dst" %} |
6649 format %{ "encode_heap_oop $src, $dst" %} |
6630 ins_encode %{ |
6650 ins_encode %{ |
6631 __ encode_heap_oop($src$$Register, $dst$$Register); |
6651 __ encode_heap_oop($src$$Register, $dst$$Register); |
6632 %} |
6652 %} |
|
6653 ins_avoid_back_to_back(Universe::narrow_oop_base() == NULL ? AVOID_NONE : AVOID_BEFORE); |
6633 ins_pipe(ialu_reg); |
6654 ins_pipe(ialu_reg); |
6634 %} |
6655 %} |
6635 |
6656 |
6636 instruct encodeHeapOop_not_null(iRegN dst, iRegP src) %{ |
6657 instruct encodeHeapOop_not_null(iRegN dst, iRegP src) %{ |
6637 predicate(n->bottom_type()->make_ptr()->ptr() == TypePtr::NotNull); |
6658 predicate(n->bottom_type()->make_ptr()->ptr() == TypePtr::NotNull); |
9215 Label* L = $labl$$label; |
9237 Label* L = $labl$$label; |
9216 assert(__ use_cbcond(*L), "back to back cbcond"); |
9238 assert(__ use_cbcond(*L), "back to back cbcond"); |
9217 __ ba_short(*L); |
9239 __ ba_short(*L); |
9218 %} |
9240 %} |
9219 ins_short_branch(1); |
9241 ins_short_branch(1); |
9220 ins_avoid_back_to_back(1); |
9242 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9221 ins_pipe(cbcond_reg_imm); |
9243 ins_pipe(cbcond_reg_imm); |
9222 %} |
9244 %} |
9223 |
9245 |
9224 // Conditional Direct Branch |
9246 // Conditional Direct Branch |
9225 instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{ |
9247 instruct branchCon(cmpOp cmp, flagsReg icc, label labl) %{ |
9229 size(8); |
9251 size(8); |
9230 ins_cost(BRANCH_COST); |
9252 ins_cost(BRANCH_COST); |
9231 format %{ "BP$cmp $icc,$labl" %} |
9253 format %{ "BP$cmp $icc,$labl" %} |
9232 // Prim = bits 24-22, Secnd = bits 31-30 |
9254 // Prim = bits 24-22, Secnd = bits 31-30 |
9233 ins_encode( enc_bp( labl, cmp, icc ) ); |
9255 ins_encode( enc_bp( labl, cmp, icc ) ); |
|
9256 ins_avoid_back_to_back(AVOID_BEFORE); |
9234 ins_pipe(br_cc); |
9257 ins_pipe(br_cc); |
9235 %} |
9258 %} |
9236 |
9259 |
9237 instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9260 instruct branchConU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9238 match(If cmp icc); |
9261 match(If cmp icc); |
9240 |
9263 |
9241 ins_cost(BRANCH_COST); |
9264 ins_cost(BRANCH_COST); |
9242 format %{ "BP$cmp $icc,$labl" %} |
9265 format %{ "BP$cmp $icc,$labl" %} |
9243 // Prim = bits 24-22, Secnd = bits 31-30 |
9266 // Prim = bits 24-22, Secnd = bits 31-30 |
9244 ins_encode( enc_bp( labl, cmp, icc ) ); |
9267 ins_encode( enc_bp( labl, cmp, icc ) ); |
|
9268 ins_avoid_back_to_back(AVOID_BEFORE); |
9245 ins_pipe(br_cc); |
9269 ins_pipe(br_cc); |
9246 %} |
9270 %} |
9247 |
9271 |
9248 instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{ |
9272 instruct branchConP(cmpOpP cmp, flagsRegP pcc, label labl) %{ |
9249 match(If cmp pcc); |
9273 match(If cmp pcc); |
9258 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9282 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9259 |
9283 |
9260 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L); |
9284 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::ptr_cc, predict_taken, *L); |
9261 __ delayed()->nop(); |
9285 __ delayed()->nop(); |
9262 %} |
9286 %} |
|
9287 ins_avoid_back_to_back(AVOID_BEFORE); |
9263 ins_pipe(br_cc); |
9288 ins_pipe(br_cc); |
9264 %} |
9289 %} |
9265 |
9290 |
9266 instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{ |
9291 instruct branchConF(cmpOpF cmp, flagsRegF fcc, label labl) %{ |
9267 match(If cmp fcc); |
9292 match(If cmp fcc); |
9276 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9301 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9277 |
9302 |
9278 __ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L); |
9303 __ fbp( (Assembler::Condition)($cmp$$cmpcode), false, (Assembler::CC)($fcc$$reg), predict_taken, *L); |
9279 __ delayed()->nop(); |
9304 __ delayed()->nop(); |
9280 %} |
9305 %} |
|
9306 ins_avoid_back_to_back(AVOID_BEFORE); |
9281 ins_pipe(br_fcc); |
9307 ins_pipe(br_fcc); |
9282 %} |
9308 %} |
9283 |
9309 |
9284 instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{ |
9310 instruct branchLoopEnd(cmpOp cmp, flagsReg icc, label labl) %{ |
9285 match(CountedLoopEnd cmp icc); |
9311 match(CountedLoopEnd cmp icc); |
9288 size(8); |
9314 size(8); |
9289 ins_cost(BRANCH_COST); |
9315 ins_cost(BRANCH_COST); |
9290 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9316 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9291 // Prim = bits 24-22, Secnd = bits 31-30 |
9317 // Prim = bits 24-22, Secnd = bits 31-30 |
9292 ins_encode( enc_bp( labl, cmp, icc ) ); |
9318 ins_encode( enc_bp( labl, cmp, icc ) ); |
|
9319 ins_avoid_back_to_back(AVOID_BEFORE); |
9293 ins_pipe(br_cc); |
9320 ins_pipe(br_cc); |
9294 %} |
9321 %} |
9295 |
9322 |
9296 instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9323 instruct branchLoopEndU(cmpOpU cmp, flagsRegU icc, label labl) %{ |
9297 match(CountedLoopEnd cmp icc); |
9324 match(CountedLoopEnd cmp icc); |
9300 size(8); |
9327 size(8); |
9301 ins_cost(BRANCH_COST); |
9328 ins_cost(BRANCH_COST); |
9302 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9329 format %{ "BP$cmp $icc,$labl\t! Loop end" %} |
9303 // Prim = bits 24-22, Secnd = bits 31-30 |
9330 // Prim = bits 24-22, Secnd = bits 31-30 |
9304 ins_encode( enc_bp( labl, cmp, icc ) ); |
9331 ins_encode( enc_bp( labl, cmp, icc ) ); |
|
9332 ins_avoid_back_to_back(AVOID_BEFORE); |
9305 ins_pipe(br_cc); |
9333 ins_pipe(br_cc); |
9306 %} |
9334 %} |
9307 |
9335 |
9308 // Compare and branch instructions |
9336 // Compare and branch instructions |
9309 instruct cmpI_reg_branch(cmpOp cmp, iRegI op1, iRegI op2, label labl, flagsReg icc) %{ |
9337 instruct cmpI_reg_branch(cmpOp cmp, iRegI op1, iRegI op2, label labl, flagsReg icc) %{ |
9550 Label* L = $labl$$label; |
9578 Label* L = $labl$$label; |
9551 assert(__ use_cbcond(*L), "back to back cbcond"); |
9579 assert(__ use_cbcond(*L), "back to back cbcond"); |
9552 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9580 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9553 %} |
9581 %} |
9554 ins_short_branch(1); |
9582 ins_short_branch(1); |
9555 ins_avoid_back_to_back(1); |
9583 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9556 ins_pipe(cbcond_reg_reg); |
9584 ins_pipe(cbcond_reg_reg); |
9557 %} |
9585 %} |
9558 |
9586 |
9559 instruct cmpI_imm_branch_short(cmpOp cmp, iRegI op1, immI5 op2, label labl, flagsReg icc) %{ |
9587 instruct cmpI_imm_branch_short(cmpOp cmp, iRegI op1, immI5 op2, label labl, flagsReg icc) %{ |
9560 match(If cmp (CmpI op1 op2)); |
9588 match(If cmp (CmpI op1 op2)); |
9568 Label* L = $labl$$label; |
9596 Label* L = $labl$$label; |
9569 assert(__ use_cbcond(*L), "back to back cbcond"); |
9597 assert(__ use_cbcond(*L), "back to back cbcond"); |
9570 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9598 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9571 %} |
9599 %} |
9572 ins_short_branch(1); |
9600 ins_short_branch(1); |
9573 ins_avoid_back_to_back(1); |
9601 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9574 ins_pipe(cbcond_reg_imm); |
9602 ins_pipe(cbcond_reg_imm); |
9575 %} |
9603 %} |
9576 |
9604 |
9577 instruct cmpU_reg_branch_short(cmpOpU cmp, iRegI op1, iRegI op2, label labl, flagsRegU icc) %{ |
9605 instruct cmpU_reg_branch_short(cmpOpU cmp, iRegI op1, iRegI op2, label labl, flagsRegU icc) %{ |
9578 match(If cmp (CmpU op1 op2)); |
9606 match(If cmp (CmpU op1 op2)); |
9586 Label* L = $labl$$label; |
9614 Label* L = $labl$$label; |
9587 assert(__ use_cbcond(*L), "back to back cbcond"); |
9615 assert(__ use_cbcond(*L), "back to back cbcond"); |
9588 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9616 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9589 %} |
9617 %} |
9590 ins_short_branch(1); |
9618 ins_short_branch(1); |
9591 ins_avoid_back_to_back(1); |
9619 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9592 ins_pipe(cbcond_reg_reg); |
9620 ins_pipe(cbcond_reg_reg); |
9593 %} |
9621 %} |
9594 |
9622 |
9595 instruct cmpU_imm_branch_short(cmpOpU cmp, iRegI op1, immI5 op2, label labl, flagsRegU icc) %{ |
9623 instruct cmpU_imm_branch_short(cmpOpU cmp, iRegI op1, immI5 op2, label labl, flagsRegU icc) %{ |
9596 match(If cmp (CmpU op1 op2)); |
9624 match(If cmp (CmpU op1 op2)); |
9604 Label* L = $labl$$label; |
9632 Label* L = $labl$$label; |
9605 assert(__ use_cbcond(*L), "back to back cbcond"); |
9633 assert(__ use_cbcond(*L), "back to back cbcond"); |
9606 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9634 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9607 %} |
9635 %} |
9608 ins_short_branch(1); |
9636 ins_short_branch(1); |
9609 ins_avoid_back_to_back(1); |
9637 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9610 ins_pipe(cbcond_reg_imm); |
9638 ins_pipe(cbcond_reg_imm); |
9611 %} |
9639 %} |
9612 |
9640 |
9613 instruct cmpL_reg_branch_short(cmpOp cmp, iRegL op1, iRegL op2, label labl, flagsRegL xcc) %{ |
9641 instruct cmpL_reg_branch_short(cmpOp cmp, iRegL op1, iRegL op2, label labl, flagsRegL xcc) %{ |
9614 match(If cmp (CmpL op1 op2)); |
9642 match(If cmp (CmpL op1 op2)); |
9622 Label* L = $labl$$label; |
9650 Label* L = $labl$$label; |
9623 assert(__ use_cbcond(*L), "back to back cbcond"); |
9651 assert(__ use_cbcond(*L), "back to back cbcond"); |
9624 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::xcc, $op1$$Register, $op2$$Register, *L); |
9652 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::xcc, $op1$$Register, $op2$$Register, *L); |
9625 %} |
9653 %} |
9626 ins_short_branch(1); |
9654 ins_short_branch(1); |
9627 ins_avoid_back_to_back(1); |
9655 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9628 ins_pipe(cbcond_reg_reg); |
9656 ins_pipe(cbcond_reg_reg); |
9629 %} |
9657 %} |
9630 |
9658 |
9631 instruct cmpL_imm_branch_short(cmpOp cmp, iRegL op1, immL5 op2, label labl, flagsRegL xcc) %{ |
9659 instruct cmpL_imm_branch_short(cmpOp cmp, iRegL op1, immL5 op2, label labl, flagsRegL xcc) %{ |
9632 match(If cmp (CmpL op1 op2)); |
9660 match(If cmp (CmpL op1 op2)); |
9640 Label* L = $labl$$label; |
9668 Label* L = $labl$$label; |
9641 assert(__ use_cbcond(*L), "back to back cbcond"); |
9669 assert(__ use_cbcond(*L), "back to back cbcond"); |
9642 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::xcc, $op1$$Register, $op2$$constant, *L); |
9670 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::xcc, $op1$$Register, $op2$$constant, *L); |
9643 %} |
9671 %} |
9644 ins_short_branch(1); |
9672 ins_short_branch(1); |
9645 ins_avoid_back_to_back(1); |
9673 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9646 ins_pipe(cbcond_reg_imm); |
9674 ins_pipe(cbcond_reg_imm); |
9647 %} |
9675 %} |
9648 |
9676 |
9649 // Compare Pointers and branch |
9677 // Compare Pointers and branch |
9650 instruct cmpP_reg_branch_short(cmpOpP cmp, iRegP op1, iRegP op2, label labl, flagsRegP pcc) %{ |
9678 instruct cmpP_reg_branch_short(cmpOpP cmp, iRegP op1, iRegP op2, label labl, flagsRegP pcc) %{ |
9663 Label* L = $labl$$label; |
9691 Label* L = $labl$$label; |
9664 assert(__ use_cbcond(*L), "back to back cbcond"); |
9692 assert(__ use_cbcond(*L), "back to back cbcond"); |
9665 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::ptr_cc, $op1$$Register, $op2$$Register, *L); |
9693 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::ptr_cc, $op1$$Register, $op2$$Register, *L); |
9666 %} |
9694 %} |
9667 ins_short_branch(1); |
9695 ins_short_branch(1); |
9668 ins_avoid_back_to_back(1); |
9696 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9669 ins_pipe(cbcond_reg_reg); |
9697 ins_pipe(cbcond_reg_reg); |
9670 %} |
9698 %} |
9671 |
9699 |
9672 instruct cmpP_null_branch_short(cmpOpP cmp, iRegP op1, immP0 null, label labl, flagsRegP pcc) %{ |
9700 instruct cmpP_null_branch_short(cmpOpP cmp, iRegP op1, immP0 null, label labl, flagsRegP pcc) %{ |
9673 match(If cmp (CmpP op1 null)); |
9701 match(If cmp (CmpP op1 null)); |
9685 Label* L = $labl$$label; |
9713 Label* L = $labl$$label; |
9686 assert(__ use_cbcond(*L), "back to back cbcond"); |
9714 assert(__ use_cbcond(*L), "back to back cbcond"); |
9687 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::ptr_cc, $op1$$Register, G0, *L); |
9715 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::ptr_cc, $op1$$Register, G0, *L); |
9688 %} |
9716 %} |
9689 ins_short_branch(1); |
9717 ins_short_branch(1); |
9690 ins_avoid_back_to_back(1); |
9718 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9691 ins_pipe(cbcond_reg_reg); |
9719 ins_pipe(cbcond_reg_reg); |
9692 %} |
9720 %} |
9693 |
9721 |
9694 instruct cmpN_reg_branch_short(cmpOp cmp, iRegN op1, iRegN op2, label labl, flagsReg icc) %{ |
9722 instruct cmpN_reg_branch_short(cmpOp cmp, iRegN op1, iRegN op2, label labl, flagsReg icc) %{ |
9695 match(If cmp (CmpN op1 op2)); |
9723 match(If cmp (CmpN op1 op2)); |
9703 Label* L = $labl$$label; |
9731 Label* L = $labl$$label; |
9704 assert(__ use_cbcond(*L), "back to back cbcond"); |
9732 assert(__ use_cbcond(*L), "back to back cbcond"); |
9705 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9733 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9706 %} |
9734 %} |
9707 ins_short_branch(1); |
9735 ins_short_branch(1); |
9708 ins_avoid_back_to_back(1); |
9736 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9709 ins_pipe(cbcond_reg_reg); |
9737 ins_pipe(cbcond_reg_reg); |
9710 %} |
9738 %} |
9711 |
9739 |
9712 instruct cmpN_null_branch_short(cmpOp cmp, iRegN op1, immN0 null, label labl, flagsReg icc) %{ |
9740 instruct cmpN_null_branch_short(cmpOp cmp, iRegN op1, immN0 null, label labl, flagsReg icc) %{ |
9713 match(If cmp (CmpN op1 null)); |
9741 match(If cmp (CmpN op1 null)); |
9721 Label* L = $labl$$label; |
9749 Label* L = $labl$$label; |
9722 assert(__ use_cbcond(*L), "back to back cbcond"); |
9750 assert(__ use_cbcond(*L), "back to back cbcond"); |
9723 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, G0, *L); |
9751 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, G0, *L); |
9724 %} |
9752 %} |
9725 ins_short_branch(1); |
9753 ins_short_branch(1); |
9726 ins_avoid_back_to_back(1); |
9754 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9727 ins_pipe(cbcond_reg_reg); |
9755 ins_pipe(cbcond_reg_reg); |
9728 %} |
9756 %} |
9729 |
9757 |
9730 // Loop back branch |
9758 // Loop back branch |
9731 instruct cmpI_reg_branchLoopEnd_short(cmpOp cmp, iRegI op1, iRegI op2, label labl, flagsReg icc) %{ |
9759 instruct cmpI_reg_branchLoopEnd_short(cmpOp cmp, iRegI op1, iRegI op2, label labl, flagsReg icc) %{ |
9740 Label* L = $labl$$label; |
9768 Label* L = $labl$$label; |
9741 assert(__ use_cbcond(*L), "back to back cbcond"); |
9769 assert(__ use_cbcond(*L), "back to back cbcond"); |
9742 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9770 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$Register, *L); |
9743 %} |
9771 %} |
9744 ins_short_branch(1); |
9772 ins_short_branch(1); |
9745 ins_avoid_back_to_back(1); |
9773 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9746 ins_pipe(cbcond_reg_reg); |
9774 ins_pipe(cbcond_reg_reg); |
9747 %} |
9775 %} |
9748 |
9776 |
9749 instruct cmpI_imm_branchLoopEnd_short(cmpOp cmp, iRegI op1, immI5 op2, label labl, flagsReg icc) %{ |
9777 instruct cmpI_imm_branchLoopEnd_short(cmpOp cmp, iRegI op1, immI5 op2, label labl, flagsReg icc) %{ |
9750 match(CountedLoopEnd cmp (CmpI op1 op2)); |
9778 match(CountedLoopEnd cmp (CmpI op1 op2)); |
9758 Label* L = $labl$$label; |
9786 Label* L = $labl$$label; |
9759 assert(__ use_cbcond(*L), "back to back cbcond"); |
9787 assert(__ use_cbcond(*L), "back to back cbcond"); |
9760 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9788 __ cbcond((Assembler::Condition)($cmp$$cmpcode), Assembler::icc, $op1$$Register, $op2$$constant, *L); |
9761 %} |
9789 %} |
9762 ins_short_branch(1); |
9790 ins_short_branch(1); |
9763 ins_avoid_back_to_back(1); |
9791 ins_avoid_back_to_back(AVOID_BEFORE_AND_AFTER); |
9764 ins_pipe(cbcond_reg_imm); |
9792 ins_pipe(cbcond_reg_imm); |
9765 %} |
9793 %} |
9766 |
9794 |
9767 // Branch-on-register tests all 64 bits. We assume that values |
9795 // Branch-on-register tests all 64 bits. We assume that values |
9768 // in 64-bit registers always remains zero or sign extended |
9796 // in 64-bit registers always remains zero or sign extended |
9775 |
9803 |
9776 size(8); |
9804 size(8); |
9777 ins_cost(BRANCH_COST); |
9805 ins_cost(BRANCH_COST); |
9778 format %{ "BR$cmp $op1,$labl" %} |
9806 format %{ "BR$cmp $op1,$labl" %} |
9779 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9807 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
|
9808 ins_avoid_back_to_back(AVOID_BEFORE); |
9780 ins_pipe(br_reg); |
9809 ins_pipe(br_reg); |
9781 %} |
9810 %} |
9782 |
9811 |
9783 instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{ |
9812 instruct branchCon_regP(cmpOp_reg cmp, iRegP op1, immP0 null, label labl) %{ |
9784 match(If cmp (CmpP op1 null)); |
9813 match(If cmp (CmpP op1 null)); |
9787 |
9816 |
9788 size(8); |
9817 size(8); |
9789 ins_cost(BRANCH_COST); |
9818 ins_cost(BRANCH_COST); |
9790 format %{ "BR$cmp $op1,$labl" %} |
9819 format %{ "BR$cmp $op1,$labl" %} |
9791 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9820 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
|
9821 ins_avoid_back_to_back(AVOID_BEFORE); |
9792 ins_pipe(br_reg); |
9822 ins_pipe(br_reg); |
9793 %} |
9823 %} |
9794 |
9824 |
9795 instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{ |
9825 instruct branchCon_regL(cmpOp_reg cmp, iRegL op1, immL0 zero, label labl) %{ |
9796 match(If cmp (CmpL op1 zero)); |
9826 match(If cmp (CmpL op1 zero)); |
9799 |
9829 |
9800 size(8); |
9830 size(8); |
9801 ins_cost(BRANCH_COST); |
9831 ins_cost(BRANCH_COST); |
9802 format %{ "BR$cmp $op1,$labl" %} |
9832 format %{ "BR$cmp $op1,$labl" %} |
9803 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
9833 ins_encode( enc_bpr( labl, cmp, op1 ) ); |
|
9834 ins_avoid_back_to_back(AVOID_BEFORE); |
9804 ins_pipe(br_reg); |
9835 ins_pipe(br_reg); |
9805 %} |
9836 %} |
9806 |
9837 |
9807 |
9838 |
9808 // ============================================================================ |
9839 // ============================================================================ |
9839 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9870 cbuf.is_backward_branch(*L) ? Assembler::pt : Assembler::pn; |
9840 |
9871 |
9841 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L); |
9872 __ bp( (Assembler::Condition)($cmp$$cmpcode), false, Assembler::xcc, predict_taken, *L); |
9842 __ delayed()->nop(); |
9873 __ delayed()->nop(); |
9843 %} |
9874 %} |
|
9875 ins_avoid_back_to_back(AVOID_BEFORE); |
9844 ins_pipe(br_cc); |
9876 ins_pipe(br_cc); |
9845 %} |
9877 %} |
9846 |
9878 |
9847 // Manifest a CmpL3 result in an integer register. Very painful. |
9879 // Manifest a CmpL3 result in an integer register. Very painful. |
9848 // This is the test to avoid. |
9880 // This is the test to avoid. |
9966 |
9998 |
9967 size(8); |
9999 size(8); |
9968 ins_cost(CALL_COST); |
10000 ins_cost(CALL_COST); |
9969 format %{ "CALL,static ; NOP ==> " %} |
10001 format %{ "CALL,static ; NOP ==> " %} |
9970 ins_encode( Java_Static_Call( meth ), call_epilog ); |
10002 ins_encode( Java_Static_Call( meth ), call_epilog ); |
|
10003 ins_avoid_back_to_back(AVOID_BEFORE); |
9971 ins_pipe(simple_call); |
10004 ins_pipe(simple_call); |
9972 %} |
10005 %} |
9973 |
10006 |
9974 // Call Java Static Instruction (method handle version) |
10007 // Call Java Static Instruction (method handle version) |
9975 instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{ |
10008 instruct CallStaticJavaHandle(method meth, l7RegP l7_mh_SP_save) %{ |
10002 effect(USE meth, KILL l7); |
10035 effect(USE meth, KILL l7); |
10003 ins_cost(CALL_COST); |
10036 ins_cost(CALL_COST); |
10004 format %{ "CALL,runtime" %} |
10037 format %{ "CALL,runtime" %} |
10005 ins_encode( Java_To_Runtime( meth ), |
10038 ins_encode( Java_To_Runtime( meth ), |
10006 call_epilog, adjust_long_from_native_call ); |
10039 call_epilog, adjust_long_from_native_call ); |
|
10040 ins_avoid_back_to_back(AVOID_BEFORE); |
10007 ins_pipe(simple_call); |
10041 ins_pipe(simple_call); |
10008 %} |
10042 %} |
10009 |
10043 |
10010 // Call runtime without safepoint - same as CallRuntime |
10044 // Call runtime without safepoint - same as CallRuntime |
10011 instruct CallLeafDirect(method meth, l7RegP l7) %{ |
10045 instruct CallLeafDirect(method meth, l7RegP l7) %{ |
10014 ins_cost(CALL_COST); |
10048 ins_cost(CALL_COST); |
10015 format %{ "CALL,runtime leaf" %} |
10049 format %{ "CALL,runtime leaf" %} |
10016 ins_encode( Java_To_Runtime( meth ), |
10050 ins_encode( Java_To_Runtime( meth ), |
10017 call_epilog, |
10051 call_epilog, |
10018 adjust_long_from_native_call ); |
10052 adjust_long_from_native_call ); |
|
10053 ins_avoid_back_to_back(AVOID_BEFORE); |
10019 ins_pipe(simple_call); |
10054 ins_pipe(simple_call); |
10020 %} |
10055 %} |
10021 |
10056 |
10022 // Call runtime without safepoint - same as CallLeaf |
10057 // Call runtime without safepoint - same as CallLeaf |
10023 instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{ |
10058 instruct CallLeafNoFPDirect(method meth, l7RegP l7) %{ |
10026 ins_cost(CALL_COST); |
10061 ins_cost(CALL_COST); |
10027 format %{ "CALL,runtime leaf nofp" %} |
10062 format %{ "CALL,runtime leaf nofp" %} |
10028 ins_encode( Java_To_Runtime( meth ), |
10063 ins_encode( Java_To_Runtime( meth ), |
10029 call_epilog, |
10064 call_epilog, |
10030 adjust_long_from_native_call ); |
10065 adjust_long_from_native_call ); |
|
10066 ins_avoid_back_to_back(AVOID_BEFORE); |
10031 ins_pipe(simple_call); |
10067 ins_pipe(simple_call); |
10032 %} |
10068 %} |
10033 |
10069 |
10034 // Tail Call; Jump from runtime stub to Java code. |
10070 // Tail Call; Jump from runtime stub to Java code. |
10035 // Also known as an 'interprocedural jump'. |
10071 // Also known as an 'interprocedural jump'. |
10039 match(TailCall jump_target method_oop ); |
10075 match(TailCall jump_target method_oop ); |
10040 |
10076 |
10041 ins_cost(CALL_COST); |
10077 ins_cost(CALL_COST); |
10042 format %{ "Jmp $jump_target ; NOP \t! $method_oop holds method oop" %} |
10078 format %{ "Jmp $jump_target ; NOP \t! $method_oop holds method oop" %} |
10043 ins_encode(form_jmpl(jump_target)); |
10079 ins_encode(form_jmpl(jump_target)); |
|
10080 ins_avoid_back_to_back(AVOID_BEFORE); |
10044 ins_pipe(tail_call); |
10081 ins_pipe(tail_call); |
10045 %} |
10082 %} |
10046 |
10083 |
10047 |
10084 |
10048 // Return Instruction |
10085 // Return Instruction |
10070 "Jmp $jump_target ; ADD O7,8,O1 \t! $ex_oop holds exc. oop" %} |
10107 "Jmp $jump_target ; ADD O7,8,O1 \t! $ex_oop holds exc. oop" %} |
10071 ins_encode(form_jmpl_set_exception_pc(jump_target)); |
10108 ins_encode(form_jmpl_set_exception_pc(jump_target)); |
10072 // opcode(Assembler::jmpl_op3, Assembler::arith_op); |
10109 // opcode(Assembler::jmpl_op3, Assembler::arith_op); |
10073 // The hack duplicates the exception oop into G3, so that CreateEx can use it there. |
10110 // The hack duplicates the exception oop into G3, so that CreateEx can use it there. |
10074 // ins_encode( form3_rs1_simm13_rd( jump_target, 0x00, R_G0 ), move_return_pc_to_o1() ); |
10111 // ins_encode( form3_rs1_simm13_rd( jump_target, 0x00, R_G0 ), move_return_pc_to_o1() ); |
|
10112 ins_avoid_back_to_back(AVOID_BEFORE); |
10075 ins_pipe(tail_call); |
10113 ins_pipe(tail_call); |
10076 %} |
10114 %} |
10077 |
10115 |
10078 // Create exception oop: created by stack-crawling runtime code. |
10116 // Create exception oop: created by stack-crawling runtime code. |
10079 // Created exception is now available to this handler, and is setup |
10117 // Created exception is now available to this handler, and is setup |
10128 match(Set index (PartialSubtypeCheck sub super)); |
10167 match(Set index (PartialSubtypeCheck sub super)); |
10129 effect( KILL pcc, KILL o7 ); |
10168 effect( KILL pcc, KILL o7 ); |
10130 ins_cost(DEFAULT_COST*10); |
10169 ins_cost(DEFAULT_COST*10); |
10131 format %{ "CALL PartialSubtypeCheck\n\tNOP" %} |
10170 format %{ "CALL PartialSubtypeCheck\n\tNOP" %} |
10132 ins_encode( enc_PartialSubtypeCheck() ); |
10171 ins_encode( enc_PartialSubtypeCheck() ); |
|
10172 ins_avoid_back_to_back(AVOID_BEFORE); |
10133 ins_pipe(partial_subtype_check_pipe); |
10173 ins_pipe(partial_subtype_check_pipe); |
10134 %} |
10174 %} |
10135 |
10175 |
10136 instruct partialSubtypeCheck_vs_zero( flagsRegP pcc, o1RegP sub, o2RegP super, immP0 zero, o0RegP idx, o7RegP o7 ) %{ |
10176 instruct partialSubtypeCheck_vs_zero( flagsRegP pcc, o1RegP sub, o2RegP super, immP0 zero, o0RegP idx, o7RegP o7 ) %{ |
10137 match(Set pcc (CmpP (PartialSubtypeCheck sub super) zero)); |
10177 match(Set pcc (CmpP (PartialSubtypeCheck sub super) zero)); |
10138 effect( KILL idx, KILL o7 ); |
10178 effect( KILL idx, KILL o7 ); |
10139 ins_cost(DEFAULT_COST*10); |
10179 ins_cost(DEFAULT_COST*10); |
10140 format %{ "CALL PartialSubtypeCheck\n\tNOP\t# (sets condition codes)" %} |
10180 format %{ "CALL PartialSubtypeCheck\n\tNOP\t# (sets condition codes)" %} |
10141 ins_encode( enc_PartialSubtypeCheck() ); |
10181 ins_encode( enc_PartialSubtypeCheck() ); |
|
10182 ins_avoid_back_to_back(AVOID_BEFORE); |
10142 ins_pipe(partial_subtype_check_pipe); |
10183 ins_pipe(partial_subtype_check_pipe); |
10143 %} |
10184 %} |
10144 |
10185 |
10145 |
10186 |
10146 // ============================================================================ |
10187 // ============================================================================ |