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comparison: src/cpu/x86/vm/assembler_x86.hpp

src/cpu/x86/vm/assembler_x86.hpp

changeset 3388
127b3692c168
parent 3310
6729bbc1fcd6
child 3390
65149e74c706
equal deleted inserted replaced
3387:d725f0affb1a 3388:127b3692c168
501 REX_WX = 0x4A, 501 REX_WX = 0x4A,
502 REX_WXB = 0x4B, 502 REX_WXB = 0x4B,
503 REX_WR = 0x4C, 503 REX_WR = 0x4C,
504 REX_WRB = 0x4D, 504 REX_WRB = 0x4D,
505 REX_WRX = 0x4E, 505 REX_WRX = 0x4E,
506 REX_WRXB = 0x4F 506 REX_WRXB = 0x4F,
507
508 VEX_3bytes = 0xC4,
509 VEX_2bytes = 0xC5
510 };
511
512 enum VexPrefix {
513 VEX_B = 0x20,
514 VEX_X = 0x40,
515 VEX_R = 0x80,
516 VEX_W = 0x80
517 };
518
519 enum VexSimdPrefix {
520 VEX_SIMD_NONE = 0x0,
521 VEX_SIMD_66 = 0x1,
522 VEX_SIMD_F3 = 0x2,
523 VEX_SIMD_F2 = 0x3
524 };
525
526 enum VexOpcode {
527 VEX_OPCODE_NONE = 0x0,
528 VEX_OPCODE_0F = 0x1,
529 VEX_OPCODE_0F_38 = 0x2,
530 VEX_OPCODE_0F_3A = 0x3
507 }; 531 };
508 532
509 enum WhichOperand { 533 enum WhichOperand {
510 // input to locate_operand, and format code for relocations 534 // input to locate_operand, and format code for relocations
511 imm_operand = 0, // embedded 32-bit|64-bit immediate operand 535 imm_operand = 0, // embedded 32-bit|64-bit immediate operand
544 void prefix(Register reg); 568 void prefix(Register reg);
545 void prefix(Address adr); 569 void prefix(Address adr);
546 void prefixq(Address adr); 570 void prefixq(Address adr);
547 571
548 void prefix(Address adr, Register reg, bool byteinst = false); 572 void prefix(Address adr, Register reg, bool byteinst = false);
573 void prefix(Address adr, XMMRegister reg);
549 void prefixq(Address adr, Register reg); 574 void prefixq(Address adr, Register reg);
550 575 void prefixq(Address adr, XMMRegister reg);
551 void prefix(Address adr, XMMRegister reg);
552 576
553 void prefetch_prefix(Address src); 577 void prefetch_prefix(Address src);
578
579 void rex_prefix(Address adr, XMMRegister xreg,
580 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
581 int rex_prefix_and_encode(int dst_enc, int src_enc,
582 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
583
584 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
585 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
586 bool vector256);
587
588 void vex_prefix(Address adr, int nds_enc, int xreg_enc,
589 VexSimdPrefix pre, VexOpcode opc,
590 bool vex_w, bool vector256);
591
592 int vex_prefix_and_encode(int dst_enc, int nds_enc, int src_enc,
593 VexSimdPrefix pre, VexOpcode opc,
594 bool vex_w, bool vector256);
595
596
597 void simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr,
598 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
599 bool rex_w = false, bool vector256 = false);
600
601 void simd_prefix(XMMRegister dst, Address src,
602 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
603 simd_prefix(dst, xnoreg, src, pre, opc);
604 }
605 void simd_prefix(Address dst, XMMRegister src, VexSimdPrefix pre) {
606 simd_prefix(src, dst, pre);
607 }
608 void simd_prefix_q(XMMRegister dst, XMMRegister nds, Address src,
609 VexSimdPrefix pre) {
610 bool rex_w = true;
611 simd_prefix(dst, nds, src, pre, VEX_OPCODE_0F, rex_w);
612 }
613
614
615 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
616 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F,
617 bool rex_w = false, bool vector256 = false);
618
619 int simd_prefix_and_encode(XMMRegister dst, XMMRegister src,
620 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
621 return simd_prefix_and_encode(dst, xnoreg, src, pre, opc);
622 }
623
624 // Move/convert 32-bit integer value.
625 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, Register src,
626 VexSimdPrefix pre) {
627 // It is OK to cast from Register to XMMRegister to pass argument here
628 // since only encoding is used in simd_prefix_and_encode() and number of
629 // Gen and Xmm registers are the same.
630 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre);
631 }
632 int simd_prefix_and_encode(XMMRegister dst, Register src, VexSimdPrefix pre) {
633 return simd_prefix_and_encode(dst, xnoreg, src, pre);
634 }
635 int simd_prefix_and_encode(Register dst, XMMRegister src,
636 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
637 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc);
638 }
639
640 // Move/convert 64-bit integer value.
641 int simd_prefix_and_encode_q(XMMRegister dst, XMMRegister nds, Register src,
642 VexSimdPrefix pre) {
643 bool rex_w = true;
644 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre, VEX_OPCODE_0F, rex_w);
645 }
646 int simd_prefix_and_encode_q(XMMRegister dst, Register src, VexSimdPrefix pre) {
647 return simd_prefix_and_encode_q(dst, xnoreg, src, pre);
648 }
649 int simd_prefix_and_encode_q(Register dst, XMMRegister src,
650 VexSimdPrefix pre, VexOpcode opc = VEX_OPCODE_0F) {
651 bool rex_w = true;
652 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc, rex_w);
653 }
554 654
555 // Helper functions for groups of instructions 655 // Helper functions for groups of instructions
556 void emit_arith_b(int op1, int op2, Register dst, int imm8); 656 void emit_arith_b(int op1, int op2, Register dst, int imm8);
557 657
558 void emit_arith(int op1, int op2, Register dst, int32_t imm32); 658 void emit_arith(int op1, int op2, Register dst, int32_t imm32);
762 862
763 // Add Scalar Single-Precision Floating-Point Values 863 // Add Scalar Single-Precision Floating-Point Values
764 void addss(XMMRegister dst, Address src); 864 void addss(XMMRegister dst, Address src);
765 void addss(XMMRegister dst, XMMRegister src); 865 void addss(XMMRegister dst, XMMRegister src);
766 866
867 void andl(Address dst, int32_t imm32);
767 void andl(Register dst, int32_t imm32); 868 void andl(Register dst, int32_t imm32);
768 void andl(Register dst, Address src); 869 void andl(Register dst, Address src);
769 void andl(Register dst, Register src); 870 void andl(Register dst, Register src);
770 871
771 void andq(Address dst, int32_t imm32); 872 void andq(Address dst, int32_t imm32);
772 void andq(Register dst, int32_t imm32); 873 void andq(Register dst, int32_t imm32);
773 void andq(Register dst, Address src); 874 void andq(Register dst, Address src);
774 void andq(Register dst, Register src); 875 void andq(Register dst, Register src);
775 876
776 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values 877 // Bitwise Logical AND of Packed Double-Precision Floating-Point Values
777 void andpd(XMMRegister dst, Address src);
778 void andpd(XMMRegister dst, XMMRegister src); 878 void andpd(XMMRegister dst, XMMRegister src);
879
880 // Bitwise Logical AND of Packed Single-Precision Floating-Point Values
881 void andps(XMMRegister dst, XMMRegister src);
779 882
780 void bsfl(Register dst, Register src); 883 void bsfl(Register dst, Register src);
781 void bsrl(Register dst, Register src); 884 void bsrl(Register dst, Register src);
782 885
783 #ifdef _LP64 886 #ifdef _LP64
835 938
836 void cmpxchgq(Register reg, Address adr); 939 void cmpxchgq(Register reg, Address adr);
837 940
838 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS 941 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
839 void comisd(XMMRegister dst, Address src); 942 void comisd(XMMRegister dst, Address src);
943 void comisd(XMMRegister dst, XMMRegister src);
840 944
841 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS 945 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
842 void comiss(XMMRegister dst, Address src); 946 void comiss(XMMRegister dst, Address src);
947 void comiss(XMMRegister dst, XMMRegister src);
843 948
844 // Identify processor type and features 949 // Identify processor type and features
845 void cpuid() { 950 void cpuid() {
846 emit_byte(0x0F); 951 emit_byte(0x0F);
847 emit_byte(0xA2); 952 emit_byte(0xA2);
848 } 953 }
849 954
850 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value 955 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
851 void cvtsd2ss(XMMRegister dst, XMMRegister src); 956 void cvtsd2ss(XMMRegister dst, XMMRegister src);
957 void cvtsd2ss(XMMRegister dst, Address src);
852 958
853 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value 959 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
854 void cvtsi2sdl(XMMRegister dst, Register src); 960 void cvtsi2sdl(XMMRegister dst, Register src);
961 void cvtsi2sdl(XMMRegister dst, Address src);
855 void cvtsi2sdq(XMMRegister dst, Register src); 962 void cvtsi2sdq(XMMRegister dst, Register src);
963 void cvtsi2sdq(XMMRegister dst, Address src);
856 964
857 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value 965 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
858 void cvtsi2ssl(XMMRegister dst, Register src); 966 void cvtsi2ssl(XMMRegister dst, Register src);
967 void cvtsi2ssl(XMMRegister dst, Address src);
859 void cvtsi2ssq(XMMRegister dst, Register src); 968 void cvtsi2ssq(XMMRegister dst, Register src);
969 void cvtsi2ssq(XMMRegister dst, Address src);
860 970
861 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value 971 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
862 void cvtdq2pd(XMMRegister dst, XMMRegister src); 972 void cvtdq2pd(XMMRegister dst, XMMRegister src);
863 973
864 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value 974 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
865 void cvtdq2ps(XMMRegister dst, XMMRegister src); 975 void cvtdq2ps(XMMRegister dst, XMMRegister src);
866 976
867 // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value 977 // Convert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
868 void cvtss2sd(XMMRegister dst, XMMRegister src); 978 void cvtss2sd(XMMRegister dst, XMMRegister src);
979 void cvtss2sd(XMMRegister dst, Address src);
869 980
870 // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer 981 // Convert with Truncation Scalar Double-Precision Floating-Point Value to Doubleword Integer
871 void cvttsd2sil(Register dst, Address src); 982 void cvttsd2sil(Register dst, Address src);
872 void cvttsd2sil(Register dst, XMMRegister src); 983 void cvttsd2sil(Register dst, XMMRegister src);
873 void cvttsd2siq(Register dst, XMMRegister src); 984 void cvttsd2siq(Register dst, XMMRegister src);
1138 // Move Double Quadword 1249 // Move Double Quadword
1139 void movdq(XMMRegister dst, Register src); 1250 void movdq(XMMRegister dst, Register src);
1140 void movdq(Register dst, XMMRegister src); 1251 void movdq(Register dst, XMMRegister src);
1141 1252
1142 // Move Aligned Double Quadword 1253 // Move Aligned Double Quadword
1143 void movdqa(Address dst, XMMRegister src);
1144 void movdqa(XMMRegister dst, Address src);
1145 void movdqa(XMMRegister dst, XMMRegister src); 1254 void movdqa(XMMRegister dst, XMMRegister src);
1146 1255
1147 // Move Unaligned Double Quadword 1256 // Move Unaligned Double Quadword
1148 void movdqu(Address dst, XMMRegister src); 1257 void movdqu(Address dst, XMMRegister src);
1149 void movdqu(XMMRegister dst, Address src); 1258 void movdqu(XMMRegister dst, Address src);
1259 void orq(Address dst, int32_t imm32); 1368 void orq(Address dst, int32_t imm32);
1260 void orq(Register dst, int32_t imm32); 1369 void orq(Register dst, int32_t imm32);
1261 void orq(Register dst, Address src); 1370 void orq(Register dst, Address src);
1262 void orq(Register dst, Register src); 1371 void orq(Register dst, Register src);
1263 1372
1373 // Pack with unsigned saturation
1374 void packuswb(XMMRegister dst, XMMRegister src);
1375 void packuswb(XMMRegister dst, Address src);
1376
1264 // SSE4.2 string instructions 1377 // SSE4.2 string instructions
1265 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8); 1378 void pcmpestri(XMMRegister xmm1, XMMRegister xmm2, int imm8);
1266 void pcmpestri(XMMRegister xmm1, Address src, int imm8); 1379 void pcmpestri(XMMRegister xmm1, Address src, int imm8);
1380
1381 // SSE4.1 packed move
1382 void pmovzxbw(XMMRegister dst, XMMRegister src);
1383 void pmovzxbw(XMMRegister dst, Address src);
1267 1384
1268 #ifndef _LP64 // no 32bit push/pop on amd64 1385 #ifndef _LP64 // no 32bit push/pop on amd64
1269 void popl(Address dst); 1386 void popl(Address dst);
1270 #endif 1387 #endif
1271 1388
1290 void prefetcht2(Address src); 1407 void prefetcht2(Address src);
1291 void prefetchw(Address src); 1408 void prefetchw(Address src);
1292 1409
1293 // POR - Bitwise logical OR 1410 // POR - Bitwise logical OR
1294 void por(XMMRegister dst, XMMRegister src); 1411 void por(XMMRegister dst, XMMRegister src);
1412 void por(XMMRegister dst, Address src);
1295 1413
1296 // Shuffle Packed Doublewords 1414 // Shuffle Packed Doublewords
1297 void pshufd(XMMRegister dst, XMMRegister src, int mode); 1415 void pshufd(XMMRegister dst, XMMRegister src, int mode);
1298 void pshufd(XMMRegister dst, Address src, int mode); 1416 void pshufd(XMMRegister dst, Address src, int mode);
1299 1417
1311 void ptest(XMMRegister dst, XMMRegister src); 1429 void ptest(XMMRegister dst, XMMRegister src);
1312 void ptest(XMMRegister dst, Address src); 1430 void ptest(XMMRegister dst, Address src);
1313 1431
1314 // Interleave Low Bytes 1432 // Interleave Low Bytes
1315 void punpcklbw(XMMRegister dst, XMMRegister src); 1433 void punpcklbw(XMMRegister dst, XMMRegister src);
1434 void punpcklbw(XMMRegister dst, Address src);
1435
1436 // Interleave Low Doublewords
1437 void punpckldq(XMMRegister dst, XMMRegister src);
1438 void punpckldq(XMMRegister dst, Address src);
1316 1439
1317 #ifndef _LP64 // no 32bit push/pop on amd64 1440 #ifndef _LP64 // no 32bit push/pop on amd64
1318 void pushl(Address src); 1441 void pushl(Address src);
1319 #endif 1442 #endif
1320 1443
1427 void xchgl(Register dst, Register src); 1550 void xchgl(Register dst, Register src);
1428 1551
1429 void xchgq(Register reg, Address adr); 1552 void xchgq(Register reg, Address adr);
1430 void xchgq(Register dst, Register src); 1553 void xchgq(Register dst, Register src);
1431 1554
1555 // Get Value of Extended Control Register
1556 void xgetbv() {
1557 emit_byte(0x0F);
1558 emit_byte(0x01);
1559 emit_byte(0xD0);
1560 }
1561
1432 void xorl(Register dst, int32_t imm32); 1562 void xorl(Register dst, int32_t imm32);
1433 void xorl(Register dst, Address src); 1563 void xorl(Register dst, Address src);
1434 void xorl(Register dst, Register src); 1564 void xorl(Register dst, Register src);
1435 1565
1436 void xorq(Register dst, Address src); 1566 void xorq(Register dst, Address src);
1437 void xorq(Register dst, Register src); 1567 void xorq(Register dst, Register src);
1438 1568
1439 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values 1569 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
1570 void xorpd(XMMRegister dst, XMMRegister src);
1571
1572 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1573 void xorps(XMMRegister dst, XMMRegister src);
1574
1575 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
1576
1577 protected:
1578 // Next instructions require address alignment 16 bytes SSE mode.
1579 // They should be called only from corresponding MacroAssembler instructions.
1580 void andpd(XMMRegister dst, Address src);
1581 void andps(XMMRegister dst, Address src);
1440 void xorpd(XMMRegister dst, Address src); 1582 void xorpd(XMMRegister dst, Address src);
1441 void xorpd(XMMRegister dst, XMMRegister src);
1442
1443 // Bitwise Logical XOR of Packed Single-Precision Floating-Point Values
1444 void xorps(XMMRegister dst, Address src); 1583 void xorps(XMMRegister dst, Address src);
1445 void xorps(XMMRegister dst, XMMRegister src); 1584
1446
1447 void set_byte_if_not_zero(Register dst); // sets reg to 1 if not zero, otherwise 0
1448 }; 1585 };
1449 1586
1450 1587
1451 // MacroAssembler extends Assembler by frequently used macros. 1588 // MacroAssembler extends Assembler by frequently used macros.
1452 // 1589 //
2173 // Floating 2310 // Floating
2174 2311
2175 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); } 2312 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
2176 void andpd(XMMRegister dst, AddressLiteral src); 2313 void andpd(XMMRegister dst, AddressLiteral src);
2177 2314
2315 void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
2316 void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
2317 void andps(XMMRegister dst, AddressLiteral src);
2318
2319 void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
2178 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); } 2320 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
2179 void comiss(XMMRegister dst, AddressLiteral src); 2321 void comiss(XMMRegister dst, AddressLiteral src);
2180 2322
2323 void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
2181 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); } 2324 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
2182 void comisd(XMMRegister dst, AddressLiteral src); 2325 void comisd(XMMRegister dst, AddressLiteral src);
2183 2326
2184 void fadd_s(Address src) { Assembler::fadd_s(src); } 2327 void fadd_s(Address src) { Assembler::fadd_s(src); }
2185 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); } 2328 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
2209 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); } 2352 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); }
2210 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); } 2353 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
2211 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); } 2354 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); }
2212 void movss(XMMRegister dst, AddressLiteral src); 2355 void movss(XMMRegister dst, AddressLiteral src);
2213 2356
2214 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); } 2357 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); }
2215 void movlpd(XMMRegister dst, AddressLiteral src); 2358 void movlpd(XMMRegister dst, AddressLiteral src);
2216 2359
2217 public: 2360 public:
2218 2361
2219 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); } 2362 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); }
2220 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); } 2363 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); }
2221 void addsd(XMMRegister dst, AddressLiteral src) { Assembler::addsd(dst, as_Address(src)); } 2364 void addsd(XMMRegister dst, AddressLiteral src);
2222 2365
2223 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); } 2366 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); }
2224 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); } 2367 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); }
2225 void addss(XMMRegister dst, AddressLiteral src) { Assembler::addss(dst, as_Address(src)); } 2368 void addss(XMMRegister dst, AddressLiteral src);
2226 2369
2227 void divsd(XMMRegister dst, XMMRegister src) { Assembler::divsd(dst, src); } 2370 void divsd(XMMRegister dst, XMMRegister src) { Assembler::divsd(dst, src); }
2228 void divsd(XMMRegister dst, Address src) { Assembler::divsd(dst, src); } 2371 void divsd(XMMRegister dst, Address src) { Assembler::divsd(dst, src); }
2229 void divsd(XMMRegister dst, AddressLiteral src) { Assembler::divsd(dst, as_Address(src)); } 2372 void divsd(XMMRegister dst, AddressLiteral src);
2230 2373
2231 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); } 2374 void divss(XMMRegister dst, XMMRegister src) { Assembler::divss(dst, src); }
2232 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); } 2375 void divss(XMMRegister dst, Address src) { Assembler::divss(dst, src); }
2233 void divss(XMMRegister dst, AddressLiteral src) { Assembler::divss(dst, as_Address(src)); } 2376 void divss(XMMRegister dst, AddressLiteral src);
2234 2377
2235 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); } 2378 void movsd(XMMRegister dst, XMMRegister src) { Assembler::movsd(dst, src); }
2236 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); } 2379 void movsd(Address dst, XMMRegister src) { Assembler::movsd(dst, src); }
2237 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); } 2380 void movsd(XMMRegister dst, Address src) { Assembler::movsd(dst, src); }
2238 void movsd(XMMRegister dst, AddressLiteral src) { Assembler::movsd(dst, as_Address(src)); } 2381 void movsd(XMMRegister dst, AddressLiteral src);
2239 2382
2240 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); } 2383 void mulsd(XMMRegister dst, XMMRegister src) { Assembler::mulsd(dst, src); }
2241 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); } 2384 void mulsd(XMMRegister dst, Address src) { Assembler::mulsd(dst, src); }
2242 void mulsd(XMMRegister dst, AddressLiteral src) { Assembler::mulsd(dst, as_Address(src)); } 2385 void mulsd(XMMRegister dst, AddressLiteral src);
2243 2386
2244 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); } 2387 void mulss(XMMRegister dst, XMMRegister src) { Assembler::mulss(dst, src); }
2245 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); } 2388 void mulss(XMMRegister dst, Address src) { Assembler::mulss(dst, src); }
2246 void mulss(XMMRegister dst, AddressLiteral src) { Assembler::mulss(dst, as_Address(src)); } 2389 void mulss(XMMRegister dst, AddressLiteral src);
2247 2390
2248 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); } 2391 void sqrtsd(XMMRegister dst, XMMRegister src) { Assembler::sqrtsd(dst, src); }
2249 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); } 2392 void sqrtsd(XMMRegister dst, Address src) { Assembler::sqrtsd(dst, src); }
2250 void sqrtsd(XMMRegister dst, AddressLiteral src) { Assembler::sqrtsd(dst, as_Address(src)); } 2393 void sqrtsd(XMMRegister dst, AddressLiteral src);
2251 2394
2252 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); } 2395 void sqrtss(XMMRegister dst, XMMRegister src) { Assembler::sqrtss(dst, src); }
2253 void sqrtss(XMMRegister dst, Address src) { Assembler::sqrtss(dst, src); } 2396 void sqrtss(XMMRegister dst, Address src) { Assembler::sqrtss(dst, src); }
2254 void sqrtss(XMMRegister dst, AddressLiteral src) { Assembler::sqrtss(dst, as_Address(src)); } 2397 void sqrtss(XMMRegister dst, AddressLiteral src);
2255 2398
2256 void subsd(XMMRegister dst, XMMRegister src) { Assembler::subsd(dst, src); } 2399 void subsd(XMMRegister dst, XMMRegister src) { Assembler::subsd(dst, src); }
2257 void subsd(XMMRegister dst, Address src) { Assembler::subsd(dst, src); } 2400 void subsd(XMMRegister dst, Address src) { Assembler::subsd(dst, src); }
2258 void subsd(XMMRegister dst, AddressLiteral src) { Assembler::subsd(dst, as_Address(src)); } 2401 void subsd(XMMRegister dst, AddressLiteral src);
2259 2402
2260 void subss(XMMRegister dst, XMMRegister src) { Assembler::subss(dst, src); } 2403 void subss(XMMRegister dst, XMMRegister src) { Assembler::subss(dst, src); }
2261 void subss(XMMRegister dst, Address src) { Assembler::subss(dst, src); } 2404 void subss(XMMRegister dst, Address src) { Assembler::subss(dst, src); }
2262 void subss(XMMRegister dst, AddressLiteral src) { Assembler::subss(dst, as_Address(src)); } 2405 void subss(XMMRegister dst, AddressLiteral src);
2263 2406
2264 void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); } 2407 void ucomiss(XMMRegister dst, XMMRegister src) { Assembler::ucomiss(dst, src); }
2265 void ucomiss(XMMRegister dst, Address src) { Assembler::ucomiss(dst, src); } 2408 void ucomiss(XMMRegister dst, Address src) { Assembler::ucomiss(dst, src); }
2266 void ucomiss(XMMRegister dst, AddressLiteral src); 2409 void ucomiss(XMMRegister dst, AddressLiteral src);
2267 2410
2268 void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); } 2411 void ucomisd(XMMRegister dst, XMMRegister src) { Assembler::ucomisd(dst, src); }
2269 void ucomisd(XMMRegister dst, Address src) { Assembler::ucomisd(dst, src); } 2412 void ucomisd(XMMRegister dst, Address src) { Assembler::ucomisd(dst, src); }
2270 void ucomisd(XMMRegister dst, AddressLiteral src); 2413 void ucomisd(XMMRegister dst, AddressLiteral src);
2271 2414
2272 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values 2415 // Bitwise Logical XOR of Packed Double-Precision Floating-Point Values
2273 void xorpd(XMMRegister dst, XMMRegister src) { Assembler::xorpd(dst, src); } 2416 void xorpd(XMMRegister dst, XMMRegister src) { Assembler::xorpd(dst, src); }
2274 void xorpd(XMMRegister dst, Address src) { Assembler::xorpd(dst, src); } 2417 void xorpd(XMMRegister dst, Address src) { Assembler::xorpd(dst, src); }

Mercurial Repository: jdk8-mips64-public/hotspot

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