src/cpu/mips/vm/sharedRuntime_mips_64.cpp

changeset 376
030cb2764106
parent 375
fb7da68ac0c3
child 386
f50649f9eda6
equal deleted inserted replaced
375:fb7da68ac0c3 376:030cb2764106
2160 Label exception_pending; 2160 Label exception_pending;
2161 2161
2162 __ verify_oop(receiver); 2162 __ verify_oop(receiver);
2163 //__ lw(AT, receiver, oopDesc::klass_offset_in_bytes()); 2163 //__ lw(AT, receiver, oopDesc::klass_offset_in_bytes());
2164 //add for compressedoops 2164 //add for compressedoops
2165 __ load_klass(AT, receiver); 2165 __ load_klass(T9, receiver);
2166 __ beq(AT, ic_reg, hit); 2166 __ beq(T9, ic_reg, hit);
2167 __ delayed()->nop(); 2167 __ delayed()->nop();
2168 __ jmp(ic_miss, relocInfo::runtime_call_type); 2168 __ jmp(ic_miss, relocInfo::runtime_call_type);
2169 __ delayed()->nop(); 2169 __ delayed()->nop();
2170 // verified entry must be aligned for code patching. 2170 // verified entry must be aligned for code patching.
2171 // and the first 5 bytes must be in the same cache line 2171 // and the first 5 bytes must be in the same cache line

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