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src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp@f03d0a26bf83 (annotated)

src/os_cpu/linux_x86/vm/orderAccess_linux_x86.inline.hpp

Thu, 22 Apr 2010 13:23:15 -0700

author
jcoomes
date
Thu, 22 Apr 2010 13:23:15 -0700
changeset 1845
f03d0a26bf83
parent 1279
bd02caa94611
child 1907
c18cbe5936b8
permissions
-rw-r--r--

6888954: argument formatting for assert() and friends
Reviewed-by: kvn, twisti, apetrusenko, never, dcubed

duke@435 1 /*
xdono@1279 2 * Copyright 2003-2009 Sun Microsystems, Inc. All Rights Reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
duke@435 19 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435 20 * CA 95054 USA or visit www.sun.com if you need additional information or
duke@435 21 * have any questions.
duke@435 22 *
duke@435 23 */
duke@435 24
duke@435 25 // Implementation of class OrderAccess.
duke@435 26
duke@435 27 inline void OrderAccess::loadload() { acquire(); }
duke@435 28 inline void OrderAccess::storestore() { release(); }
duke@435 29 inline void OrderAccess::loadstore() { acquire(); }
duke@435 30 inline void OrderAccess::storeload() { fence(); }
duke@435 31
duke@435 32 inline void OrderAccess::acquire() {
duke@435 33 volatile intptr_t dummy;
duke@435 34 #ifdef AMD64
duke@435 35 __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (dummy) : : "memory");
duke@435 36 #else
duke@435 37 __asm__ volatile ("movl 0(%%esp),%0" : "=r" (dummy) : : "memory");
duke@435 38 #endif // AMD64
duke@435 39 }
duke@435 40
duke@435 41 inline void OrderAccess::release() {
duke@435 42 dummy = 0;
duke@435 43 }
duke@435 44
duke@435 45 inline void OrderAccess::fence() {
duke@435 46 if (os::is_MP()) {
never@1106 47 // always use locked addl since mfence is sometimes expensive
duke@435 48 #ifdef AMD64
never@1106 49 __asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
duke@435 50 #else
duke@435 51 __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
never@1106 52 #endif
duke@435 53 }
duke@435 54 }
duke@435 55
duke@435 56 inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { return *p; }
duke@435 57 inline jshort OrderAccess::load_acquire(volatile jshort* p) { return *p; }
duke@435 58 inline jint OrderAccess::load_acquire(volatile jint* p) { return *p; }
duke@435 59 inline jlong OrderAccess::load_acquire(volatile jlong* p) { return *p; }
duke@435 60 inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { return *p; }
duke@435 61 inline jushort OrderAccess::load_acquire(volatile jushort* p) { return *p; }
duke@435 62 inline juint OrderAccess::load_acquire(volatile juint* p) { return *p; }
duke@435 63 inline julong OrderAccess::load_acquire(volatile julong* p) { return *p; }
duke@435 64 inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { return *p; }
duke@435 65 inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { return *p; }
duke@435 66
duke@435 67 inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return *p; }
duke@435 68 inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return *(void* volatile *)p; }
duke@435 69 inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return *(void* const volatile *)p; }
duke@435 70
duke@435 71 inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { *p = v; }
duke@435 72 inline void OrderAccess::release_store(volatile jshort* p, jshort v) { *p = v; }
duke@435 73 inline void OrderAccess::release_store(volatile jint* p, jint v) { *p = v; }
duke@435 74 inline void OrderAccess::release_store(volatile jlong* p, jlong v) { *p = v; }
duke@435 75 inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { *p = v; }
duke@435 76 inline void OrderAccess::release_store(volatile jushort* p, jushort v) { *p = v; }
duke@435 77 inline void OrderAccess::release_store(volatile juint* p, juint v) { *p = v; }
duke@435 78 inline void OrderAccess::release_store(volatile julong* p, julong v) { *p = v; }
duke@435 79 inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { *p = v; }
duke@435 80 inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { *p = v; }
duke@435 81
duke@435 82 inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { *p = v; }
duke@435 83 inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { *(void* volatile *)p = v; }
duke@435 84
duke@435 85 inline void OrderAccess::store_fence(jbyte* p, jbyte v) {
duke@435 86 __asm__ volatile ( "xchgb (%2),%0"
duke@435 87 : "=r" (v)
duke@435 88 : "0" (v), "r" (p)
duke@435 89 : "memory");
duke@435 90 }
duke@435 91 inline void OrderAccess::store_fence(jshort* p, jshort v) {
duke@435 92 __asm__ volatile ( "xchgw (%2),%0"
duke@435 93 : "=r" (v)
duke@435 94 : "0" (v), "r" (p)
duke@435 95 : "memory");
duke@435 96 }
duke@435 97 inline void OrderAccess::store_fence(jint* p, jint v) {
duke@435 98 __asm__ volatile ( "xchgl (%2),%0"
duke@435 99 : "=r" (v)
duke@435 100 : "0" (v), "r" (p)
duke@435 101 : "memory");
duke@435 102 }
duke@435 103
duke@435 104 inline void OrderAccess::store_fence(jlong* p, jlong v) {
duke@435 105 #ifdef AMD64
duke@435 106 __asm__ __volatile__ ("xchgq (%2), %0"
duke@435 107 : "=r" (v)
duke@435 108 : "0" (v), "r" (p)
duke@435 109 : "memory");
duke@435 110 #else
duke@435 111 *p = v; fence();
duke@435 112 #endif // AMD64
duke@435 113 }
duke@435 114
duke@435 115 // AMD64 copied the bodies for the the signed version. 32bit did this. As long as the
duke@435 116 // compiler does the inlining this is simpler.
duke@435 117 inline void OrderAccess::store_fence(jubyte* p, jubyte v) { store_fence((jbyte*)p, (jbyte)v); }
duke@435 118 inline void OrderAccess::store_fence(jushort* p, jushort v) { store_fence((jshort*)p, (jshort)v); }
duke@435 119 inline void OrderAccess::store_fence(juint* p, juint v) { store_fence((jint*)p, (jint)v); }
duke@435 120 inline void OrderAccess::store_fence(julong* p, julong v) { store_fence((jlong*)p, (jlong)v); }
duke@435 121 inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); }
duke@435 122 inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; fence(); }
duke@435 123
duke@435 124 inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) {
duke@435 125 #ifdef AMD64
duke@435 126 __asm__ __volatile__ ("xchgq (%2), %0"
duke@435 127 : "=r" (v)
duke@435 128 : "0" (v), "r" (p)
duke@435 129 : "memory");
duke@435 130 #else
duke@435 131 store_fence((jint*)p, (jint)v);
duke@435 132 #endif // AMD64
duke@435 133 }
duke@435 134
duke@435 135 inline void OrderAccess::store_ptr_fence(void** p, void* v) {
duke@435 136 #ifdef AMD64
duke@435 137 __asm__ __volatile__ ("xchgq (%2), %0"
duke@435 138 : "=r" (v)
duke@435 139 : "0" (v), "r" (p)
duke@435 140 : "memory");
duke@435 141 #else
duke@435 142 store_fence((jint*)p, (jint)v);
duke@435 143 #endif // AMD64
duke@435 144 }
duke@435 145
duke@435 146 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile.
duke@435 147 inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) {
duke@435 148 __asm__ volatile ( "xchgb (%2),%0"
duke@435 149 : "=r" (v)
duke@435 150 : "0" (v), "r" (p)
duke@435 151 : "memory");
duke@435 152 }
duke@435 153 inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) {
duke@435 154 __asm__ volatile ( "xchgw (%2),%0"
duke@435 155 : "=r" (v)
duke@435 156 : "0" (v), "r" (p)
duke@435 157 : "memory");
duke@435 158 }
duke@435 159 inline void OrderAccess::release_store_fence(volatile jint* p, jint v) {
duke@435 160 __asm__ volatile ( "xchgl (%2),%0"
duke@435 161 : "=r" (v)
duke@435 162 : "0" (v), "r" (p)
duke@435 163 : "memory");
duke@435 164 }
duke@435 165
duke@435 166 inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) {
duke@435 167 #ifdef AMD64
duke@435 168 __asm__ __volatile__ ( "xchgq (%2), %0"
duke@435 169 : "=r" (v)
duke@435 170 : "0" (v), "r" (p)
duke@435 171 : "memory");
duke@435 172 #else
duke@435 173 *p = v; fence();
duke@435 174 #endif // AMD64
duke@435 175 }
duke@435 176
duke@435 177 inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store_fence((volatile jbyte*)p, (jbyte)v); }
duke@435 178 inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store_fence((volatile jshort*)p, (jshort)v); }
duke@435 179 inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store_fence((volatile jint*)p, (jint)v); }
duke@435 180 inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store_fence((volatile jlong*)p, (jlong)v); }
duke@435 181
duke@435 182 inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { *p = v; fence(); }
duke@435 183 inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { *p = v; fence(); }
duke@435 184
duke@435 185 inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) {
duke@435 186 #ifdef AMD64
duke@435 187 __asm__ __volatile__ ( "xchgq (%2), %0"
duke@435 188 : "=r" (v)
duke@435 189 : "0" (v), "r" (p)
duke@435 190 : "memory");
duke@435 191 #else
duke@435 192 release_store_fence((volatile jint*)p, (jint)v);
duke@435 193 #endif // AMD64
duke@435 194 }
duke@435 195 inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) {
duke@435 196 #ifdef AMD64
duke@435 197 __asm__ __volatile__ ( "xchgq (%2), %0"
duke@435 198 : "=r" (v)
duke@435 199 : "0" (v), "r" (p)
duke@435 200 : "memory");
duke@435 201 #else
duke@435 202 release_store_fence((volatile jint*)p, (jint)v);
duke@435 203 #endif // AMD64
duke@435 204 }

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