src/cpu/x86/vm/relocInfo_x86.hpp

Wed, 02 Jun 2010 22:45:42 -0700

author
jrose
date
Wed, 02 Jun 2010 22:45:42 -0700
changeset 1934
e9ff18c4ace7
parent 1907
c18cbe5936b8
child 2314
f95d63e2154a
permissions
-rw-r--r--

Merge

duke@435 1 /*
trims@1907 2 * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
duke@435 25 // machine-dependent parts of class relocInfo
duke@435 26 private:
duke@435 27 enum {
duke@435 28 // Intel instructions are byte-aligned.
duke@435 29 offset_unit = 1,
duke@435 30
duke@435 31 // Encodes Assembler::disp32_operand vs. Assembler::imm32_operand.
kvn@599 32 #ifndef AMD64
duke@435 33 format_width = 1
kvn@599 34 #else
kvn@599 35 // vs Assembler::narrow_oop_operand.
kvn@599 36 format_width = 2
kvn@599 37 #endif
duke@435 38 };

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