Wed, 08 Apr 2009 10:56:49 -0700
6655638: dynamic languages need method handles
Summary: initial implementation, with known omissions (x86/64, sparc, compiler optim., c-oops, C++ interp.)
Reviewed-by: kvn, twisti, never
duke@435 | 1 | /* |
duke@435 | 2 | * Copyright 2000-2006 Sun Microsystems, Inc. All Rights Reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
duke@435 | 19 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
duke@435 | 20 | * CA 95054 USA or visit www.sun.com if you need additional information or |
duke@435 | 21 | * have any questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
duke@435 | 25 | private: |
duke@435 | 26 | |
duke@435 | 27 | ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// |
duke@435 | 28 | // |
duke@435 | 29 | // Sparc load/store emission |
duke@435 | 30 | // |
duke@435 | 31 | // The sparc ld/st instructions cannot accomodate displacements > 13 bits long. |
duke@435 | 32 | // The following "pseudo" sparc instructions (load/store) make it easier to use the indexed addressing mode |
duke@435 | 33 | // by allowing 32 bit displacements: |
duke@435 | 34 | // |
duke@435 | 35 | // When disp <= 13 bits long, a single load or store instruction is emitted with (disp + [d]). |
duke@435 | 36 | // When disp > 13 bits long, code is emitted to set the displacement into the O7 register, |
duke@435 | 37 | // and then a load or store is emitted with ([O7] + [d]). |
duke@435 | 38 | // |
duke@435 | 39 | |
duke@435 | 40 | // some load/store variants return the code_offset for proper positioning of debug info for null checks |
duke@435 | 41 | |
duke@435 | 42 | // load/store with 32 bit displacement |
duke@435 | 43 | int load(Register s, int disp, Register d, BasicType ld_type, CodeEmitInfo* info = NULL); |
duke@435 | 44 | void store(Register value, Register base, int offset, BasicType type, CodeEmitInfo *info = NULL); |
duke@435 | 45 | |
duke@435 | 46 | // loadf/storef with 32 bit displacement |
duke@435 | 47 | void load(Register s, int disp, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL); |
duke@435 | 48 | void store(FloatRegister d, Register s1, int disp, BasicType st_type, CodeEmitInfo* info = NULL); |
duke@435 | 49 | |
duke@435 | 50 | // convienence methods for calling load/store with an Address |
duke@435 | 51 | void load(const Address& a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0); |
duke@435 | 52 | void store(Register d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0); |
duke@435 | 53 | void load(const Address& a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL, int offset = 0); |
duke@435 | 54 | void store(FloatRegister d, const Address& a, BasicType st_type, CodeEmitInfo* info = NULL, int offset = 0); |
duke@435 | 55 | |
duke@435 | 56 | // convienence methods for calling load/store with an LIR_Address |
duke@435 | 57 | void load(LIR_Address* a, Register d, BasicType ld_type, CodeEmitInfo* info = NULL); |
duke@435 | 58 | void store(Register d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL); |
duke@435 | 59 | void load(LIR_Address* a, FloatRegister d, BasicType ld_type, CodeEmitInfo* info = NULL); |
duke@435 | 60 | void store(FloatRegister d, LIR_Address* a, BasicType st_type, CodeEmitInfo* info = NULL); |
duke@435 | 61 | |
duke@435 | 62 | int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool unaligned = false); |
duke@435 | 63 | int store(LIR_Opr from_reg, Register base, Register disp, BasicType type); |
duke@435 | 64 | |
duke@435 | 65 | int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool unaligned = false); |
duke@435 | 66 | int load(Register base, Register disp, LIR_Opr to_reg, BasicType type); |
duke@435 | 67 | |
duke@435 | 68 | void monitorexit(LIR_Opr obj_opr, LIR_Opr lock_opr, Register hdr, int monitor_no); |
duke@435 | 69 | |
duke@435 | 70 | int shift_amount(BasicType t); |
duke@435 | 71 | |
duke@435 | 72 | static bool is_single_instruction(LIR_Op* op); |
duke@435 | 73 | |
duke@435 | 74 | public: |
duke@435 | 75 | void pack64( Register rs, Register rd ); |
duke@435 | 76 | void unpack64( Register rd ); |
duke@435 | 77 | |
duke@435 | 78 | enum { |
duke@435 | 79 | #ifdef _LP64 |
duke@435 | 80 | call_stub_size = 68, |
duke@435 | 81 | #else |
duke@435 | 82 | call_stub_size = 20, |
duke@435 | 83 | #endif // _LP64 |
duke@435 | 84 | exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4), |
duke@435 | 85 | deopt_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4) }; |