src/share/vm/c1/c1_Defs.hpp

Mon, 24 Jan 2011 13:34:18 -0800

author
never
date
Mon, 24 Jan 2011 13:34:18 -0800
changeset 2488
e4fee0bdaa85
parent 2314
f95d63e2154a
child 2508
b92c45f2bc75
permissions
-rw-r--r--

7008809: should report the class in ArrayStoreExceptions from compiled code
Reviewed-by: iveresov, twisti

duke@435 1 /*
stefank@2314 2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #ifndef SHARE_VM_C1_C1_DEFS_HPP
stefank@2314 26 #define SHARE_VM_C1_C1_DEFS_HPP
stefank@2314 27
stefank@2314 28 #include "utilities/globalDefinitions.hpp"
stefank@2314 29 #ifdef TARGET_ARCH_x86
stefank@2314 30 # include "register_x86.hpp"
stefank@2314 31 #endif
stefank@2314 32 #ifdef TARGET_ARCH_sparc
stefank@2314 33 # include "register_sparc.hpp"
stefank@2314 34 #endif
stefank@2314 35 #ifdef TARGET_ARCH_zero
stefank@2314 36 # include "register_zero.hpp"
stefank@2314 37 #endif
stefank@2314 38
duke@435 39 // set frame size and return address offset to these values in blobs
duke@435 40 // (if the compiled frame uses ebp as link pointer on IA; otherwise,
duke@435 41 // the frame size must be fixed)
duke@435 42 enum {
duke@435 43 no_frame_size = -1
duke@435 44 };
duke@435 45
duke@435 46
stefank@2314 47 #ifdef TARGET_ARCH_x86
stefank@2314 48 # include "c1_Defs_x86.hpp"
stefank@2314 49 #endif
stefank@2314 50 #ifdef TARGET_ARCH_sparc
stefank@2314 51 # include "c1_Defs_sparc.hpp"
stefank@2314 52 #endif
stefank@2314 53
duke@435 54
duke@435 55 // native word offsets from memory address
duke@435 56 enum {
duke@435 57 lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes,
duke@435 58 hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes
duke@435 59 };
duke@435 60
duke@435 61
duke@435 62 // the processor may require explicit rounding operations to implement the strictFP mode
duke@435 63 enum {
duke@435 64 strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding
duke@435 65 };
duke@435 66
duke@435 67
duke@435 68 // for debug info: a float value in a register may be saved in double precision by runtime stubs
duke@435 69 enum {
duke@435 70 float_saved_as_double = pd_float_saved_as_double
duke@435 71 };
stefank@2314 72
stefank@2314 73 #endif // SHARE_VM_C1_C1_DEFS_HPP

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