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src/os_cpu/windows_x86/vm/os_windows_x86.hpp@d0994e5bebce (annotated)

src/os_cpu/windows_x86/vm/os_windows_x86.hpp

Thu, 26 Mar 2009 14:31:45 -0700

author

never

date

Thu, 26 Mar 2009 14:31:45 -0700

changeset 1106

d0994e5bebce

parent 435

a61af66fc99e

child 1279

bd02caa94611

permissions

-rw-r--r--

6822204: volatile fences should prefer lock:addl to actual mfence instructions
Reviewed-by: kvn, phh

duke@435	1	/*
duke@435	2	* Copyright 1999-2004 Sun Microsystems, Inc. All Rights Reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
duke@435	19	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
duke@435	20	* CA 95054 USA or visit www.sun.com if you need additional information or
duke@435	21	* have any questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
duke@435	25	//
duke@435	26	// NOTE: we are back in class os here, not win32
duke@435	27	//
duke@435	28	#ifdef AMD64
duke@435	29	static jint (*atomic_xchg_func) (jint, volatile jint*);
duke@435	30	static intptr_t (*atomic_xchg_ptr_func) (intptr_t, volatile intptr_t*);
duke@435	31
duke@435	32	static jint (*atomic_cmpxchg_func) (jint, volatile jint*, jint);
duke@435	33	static jlong (*atomic_cmpxchg_long_func) (jlong, volatile jlong*, jlong);
duke@435	34
duke@435	35	static jint (*atomic_add_func) (jint, volatile jint*);
duke@435	36	static intptr_t (*atomic_add_ptr_func) (intptr_t, volatile intptr_t*);
duke@435	37
duke@435	38	static jint atomic_xchg_bootstrap (jint, volatile jint*);
duke@435	39	static intptr_t atomic_xchg_ptr_bootstrap (intptr_t, volatile intptr_t*);
duke@435	40
duke@435	41	static jint atomic_cmpxchg_bootstrap (jint, volatile jint*, jint);
duke@435	42	#else
duke@435	43
duke@435	44	static jlong (*atomic_cmpxchg_long_func) (jlong, volatile jlong*, jlong);
duke@435	45
duke@435	46	#endif // AMD64
duke@435	47
duke@435	48	static jlong atomic_cmpxchg_long_bootstrap(jlong, volatile jlong*, jlong);
duke@435	49
duke@435	50	#ifdef AMD64
duke@435	51	static jint atomic_add_bootstrap (jint, volatile jint*);
duke@435	52	static intptr_t atomic_add_ptr_bootstrap (intptr_t, volatile intptr_t*);
duke@435	53	#endif // AMD64
duke@435	54
duke@435	55	static void setup_fpu();
duke@435	56	static bool supports_sse() { return true; }
duke@435	57
duke@435	58	static bool register_code_area(char *low, char *high);