Wed, 03 Jun 2015 14:22:57 +0200
8077504: Unsafe load can loose control dependency and cause crash
Summary: Node::depends_only_on_test() should return false for Unsafe loads
Reviewed-by: kvn, adinn
duke@435 | 1 | /* |
dlong@7598 | 2 | * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #include "precompiled.hpp" |
stefank@2314 | 26 | #include "opto/compile.hpp" |
stefank@2314 | 27 | #include "opto/regmask.hpp" |
dlong@7598 | 28 | #if defined AD_MD_HPP |
dlong@7598 | 29 | # include AD_MD_HPP |
dlong@7598 | 30 | #elif defined TARGET_ARCH_MODEL_x86_32 |
stefank@2314 | 31 | # include "adfiles/ad_x86_32.hpp" |
dlong@7598 | 32 | #elif defined TARGET_ARCH_MODEL_x86_64 |
stefank@2314 | 33 | # include "adfiles/ad_x86_64.hpp" |
dlong@7598 | 34 | #elif defined TARGET_ARCH_MODEL_sparc |
stefank@2314 | 35 | # include "adfiles/ad_sparc.hpp" |
dlong@7598 | 36 | #elif defined TARGET_ARCH_MODEL_zero |
stefank@2314 | 37 | # include "adfiles/ad_zero.hpp" |
dlong@7598 | 38 | #elif defined TARGET_ARCH_MODEL_ppc_64 |
goetz@6441 | 39 | # include "adfiles/ad_ppc_64.hpp" |
bobv@2508 | 40 | #endif |
duke@435 | 41 | |
duke@435 | 42 | #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */ |
duke@435 | 43 | |
duke@435 | 44 | //-------------Non-zero bit search methods used by RegMask--------------------- |
duke@435 | 45 | // Find lowest 1, or return 32 if empty |
duke@435 | 46 | int find_lowest_bit( uint32 mask ) { |
duke@435 | 47 | int n = 0; |
duke@435 | 48 | if( (mask & 0xffff) == 0 ) { |
duke@435 | 49 | mask >>= 16; |
duke@435 | 50 | n += 16; |
duke@435 | 51 | } |
duke@435 | 52 | if( (mask & 0xff) == 0 ) { |
duke@435 | 53 | mask >>= 8; |
duke@435 | 54 | n += 8; |
duke@435 | 55 | } |
duke@435 | 56 | if( (mask & 0xf) == 0 ) { |
duke@435 | 57 | mask >>= 4; |
duke@435 | 58 | n += 4; |
duke@435 | 59 | } |
duke@435 | 60 | if( (mask & 0x3) == 0 ) { |
duke@435 | 61 | mask >>= 2; |
duke@435 | 62 | n += 2; |
duke@435 | 63 | } |
duke@435 | 64 | if( (mask & 0x1) == 0 ) { |
duke@435 | 65 | mask >>= 1; |
duke@435 | 66 | n += 1; |
duke@435 | 67 | } |
duke@435 | 68 | if( mask == 0 ) { |
duke@435 | 69 | n = 32; |
duke@435 | 70 | } |
duke@435 | 71 | return n; |
duke@435 | 72 | } |
duke@435 | 73 | |
duke@435 | 74 | // Find highest 1, or return 32 if empty |
duke@435 | 75 | int find_hihghest_bit( uint32 mask ) { |
duke@435 | 76 | int n = 0; |
duke@435 | 77 | if( mask > 0xffff ) { |
duke@435 | 78 | mask >>= 16; |
duke@435 | 79 | n += 16; |
duke@435 | 80 | } |
duke@435 | 81 | if( mask > 0xff ) { |
duke@435 | 82 | mask >>= 8; |
duke@435 | 83 | n += 8; |
duke@435 | 84 | } |
duke@435 | 85 | if( mask > 0xf ) { |
duke@435 | 86 | mask >>= 4; |
duke@435 | 87 | n += 4; |
duke@435 | 88 | } |
duke@435 | 89 | if( mask > 0x3 ) { |
duke@435 | 90 | mask >>= 2; |
duke@435 | 91 | n += 2; |
duke@435 | 92 | } |
duke@435 | 93 | if( mask > 0x1 ) { |
duke@435 | 94 | mask >>= 1; |
duke@435 | 95 | n += 1; |
duke@435 | 96 | } |
duke@435 | 97 | if( mask == 0 ) { |
duke@435 | 98 | n = 32; |
duke@435 | 99 | } |
duke@435 | 100 | return n; |
duke@435 | 101 | } |
duke@435 | 102 | |
duke@435 | 103 | //------------------------------dump------------------------------------------- |
duke@435 | 104 | |
duke@435 | 105 | #ifndef PRODUCT |
kvn@4478 | 106 | void OptoReg::dump(int r, outputStream *st) { |
kvn@4478 | 107 | switch (r) { |
kvn@4478 | 108 | case Special: st->print("r---"); break; |
kvn@4478 | 109 | case Bad: st->print("rBAD"); break; |
duke@435 | 110 | default: |
drchase@6680 | 111 | if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]); |
kvn@4478 | 112 | else st->print("rS%d",r); |
duke@435 | 113 | break; |
duke@435 | 114 | } |
duke@435 | 115 | } |
duke@435 | 116 | #endif |
duke@435 | 117 | |
duke@435 | 118 | |
duke@435 | 119 | //============================================================================= |
duke@435 | 120 | const RegMask RegMask::Empty( |
duke@435 | 121 | # define BODY(I) 0, |
duke@435 | 122 | FORALL_BODY |
duke@435 | 123 | # undef BODY |
duke@435 | 124 | 0 |
duke@435 | 125 | ); |
duke@435 | 126 | |
kvn@3882 | 127 | //============================================================================= |
kvn@3882 | 128 | bool RegMask::is_vector(uint ireg) { |
kvn@3882 | 129 | return (ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY); |
kvn@3882 | 130 | } |
kvn@3882 | 131 | |
kvn@3882 | 132 | int RegMask::num_registers(uint ireg) { |
kvn@3882 | 133 | switch(ireg) { |
kvn@3882 | 134 | case Op_VecY: |
kvn@3882 | 135 | return 8; |
kvn@3882 | 136 | case Op_VecX: |
kvn@3882 | 137 | return 4; |
kvn@3882 | 138 | case Op_VecD: |
kvn@3882 | 139 | case Op_RegD: |
kvn@3882 | 140 | case Op_RegL: |
kvn@3882 | 141 | #ifdef _LP64 |
kvn@3882 | 142 | case Op_RegP: |
kvn@3882 | 143 | #endif |
kvn@3882 | 144 | return 2; |
kvn@3882 | 145 | } |
kvn@3882 | 146 | // Op_VecS and the rest ideal registers. |
kvn@3882 | 147 | return 1; |
kvn@3882 | 148 | } |
kvn@3882 | 149 | |
duke@435 | 150 | //------------------------------find_first_pair-------------------------------- |
duke@435 | 151 | // Find the lowest-numbered register pair in the mask. Return the |
duke@435 | 152 | // HIGHEST register number in the pair, or BAD if no pairs. |
duke@435 | 153 | OptoReg::Name RegMask::find_first_pair() const { |
kvn@3882 | 154 | verify_pairs(); |
duke@435 | 155 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 156 | if( _A[i] ) { // Found some bits |
duke@435 | 157 | int bit = _A[i] & -_A[i]; // Extract low bit |
duke@435 | 158 | // Convert to bit number, return hi bit in pair |
duke@435 | 159 | return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+1); |
duke@435 | 160 | } |
duke@435 | 161 | } |
duke@435 | 162 | return OptoReg::Bad; |
duke@435 | 163 | } |
duke@435 | 164 | |
duke@435 | 165 | //------------------------------ClearToPairs----------------------------------- |
duke@435 | 166 | // Clear out partial bits; leave only bit pairs |
kvn@3882 | 167 | void RegMask::clear_to_pairs() { |
duke@435 | 168 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 169 | int bits = _A[i]; |
duke@435 | 170 | bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair |
duke@435 | 171 | bits |= (bits>>1); // Smear 1 hi-bit into a pair |
duke@435 | 172 | _A[i] = bits; |
duke@435 | 173 | } |
kvn@3882 | 174 | verify_pairs(); |
duke@435 | 175 | } |
duke@435 | 176 | |
duke@435 | 177 | //------------------------------SmearToPairs----------------------------------- |
duke@435 | 178 | // Smear out partial bits; leave only bit pairs |
kvn@3882 | 179 | void RegMask::smear_to_pairs() { |
duke@435 | 180 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 181 | int bits = _A[i]; |
duke@435 | 182 | bits |= ((bits & 0x55555555)<<1); // Smear lo bit hi per pair |
duke@435 | 183 | bits |= ((bits & 0xAAAAAAAA)>>1); // Smear hi bit lo per pair |
duke@435 | 184 | _A[i] = bits; |
duke@435 | 185 | } |
kvn@3882 | 186 | verify_pairs(); |
duke@435 | 187 | } |
duke@435 | 188 | |
duke@435 | 189 | //------------------------------is_aligned_pairs------------------------------- |
kvn@3882 | 190 | bool RegMask::is_aligned_pairs() const { |
duke@435 | 191 | // Assert that the register mask contains only bit pairs. |
duke@435 | 192 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 193 | int bits = _A[i]; |
duke@435 | 194 | while( bits ) { // Check bits for pairing |
duke@435 | 195 | int bit = bits & -bits; // Extract low bit |
duke@435 | 196 | // Low bit is not odd means its mis-aligned. |
duke@435 | 197 | if( (bit & 0x55555555) == 0 ) return false; |
duke@435 | 198 | bits -= bit; // Remove bit from mask |
duke@435 | 199 | // Check for aligned adjacent bit |
duke@435 | 200 | if( (bits & (bit<<1)) == 0 ) return false; |
duke@435 | 201 | bits -= (bit<<1); // Remove other halve of pair |
duke@435 | 202 | } |
duke@435 | 203 | } |
duke@435 | 204 | return true; |
duke@435 | 205 | } |
duke@435 | 206 | |
duke@435 | 207 | //------------------------------is_bound1-------------------------------------- |
duke@435 | 208 | // Return TRUE if the mask contains a single bit |
duke@435 | 209 | int RegMask::is_bound1() const { |
duke@435 | 210 | if( is_AllStack() ) return false; |
duke@435 | 211 | int bit = -1; // Set to hold the one bit allowed |
duke@435 | 212 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 213 | if( _A[i] ) { // Found some bits |
duke@435 | 214 | if( bit != -1 ) return false; // Already had bits, so fail |
duke@435 | 215 | bit = _A[i] & -_A[i]; // Extract 1 bit from mask |
duke@435 | 216 | if( bit != _A[i] ) return false; // Found many bits, so fail |
duke@435 | 217 | } |
duke@435 | 218 | } |
duke@435 | 219 | // True for both the empty mask and for a single bit |
duke@435 | 220 | return true; |
duke@435 | 221 | } |
duke@435 | 222 | |
duke@435 | 223 | //------------------------------is_bound2-------------------------------------- |
duke@435 | 224 | // Return TRUE if the mask contains an adjacent pair of bits and no other bits. |
kvn@3882 | 225 | int RegMask::is_bound_pair() const { |
duke@435 | 226 | if( is_AllStack() ) return false; |
duke@435 | 227 | |
duke@435 | 228 | int bit = -1; // Set to hold the one bit allowed |
duke@435 | 229 | for( int i = 0; i < RM_SIZE; i++ ) { |
duke@435 | 230 | if( _A[i] ) { // Found some bits |
duke@435 | 231 | if( bit != -1 ) return false; // Already had bits, so fail |
duke@435 | 232 | bit = _A[i] & -(_A[i]); // Extract 1 bit from mask |
duke@435 | 233 | if( (bit << 1) != 0 ) { // Bit pair stays in same word? |
duke@435 | 234 | if( (bit | (bit<<1)) != _A[i] ) |
duke@435 | 235 | return false; // Require adjacent bit pair and no more bits |
duke@435 | 236 | } else { // Else its a split-pair case |
duke@435 | 237 | if( bit != _A[i] ) return false; // Found many bits, so fail |
duke@435 | 238 | i++; // Skip iteration forward |
drchase@4585 | 239 | if( i >= RM_SIZE || _A[i] != 1 ) |
drchase@4585 | 240 | return false; // Require 1 lo bit in next word |
duke@435 | 241 | } |
duke@435 | 242 | } |
duke@435 | 243 | } |
duke@435 | 244 | // True for both the empty mask and for a bit pair |
duke@435 | 245 | return true; |
duke@435 | 246 | } |
duke@435 | 247 | |
kvn@3882 | 248 | static int low_bits[3] = { 0x55555555, 0x11111111, 0x01010101 }; |
kvn@3882 | 249 | //------------------------------find_first_set--------------------------------- |
kvn@3882 | 250 | // Find the lowest-numbered register set in the mask. Return the |
kvn@3882 | 251 | // HIGHEST register number in the set, or BAD if no sets. |
kvn@3882 | 252 | // Works also for size 1. |
drchase@4585 | 253 | OptoReg::Name RegMask::find_first_set(const int size) const { |
kvn@3882 | 254 | verify_sets(size); |
kvn@3882 | 255 | for (int i = 0; i < RM_SIZE; i++) { |
kvn@3882 | 256 | if (_A[i]) { // Found some bits |
kvn@3882 | 257 | int bit = _A[i] & -_A[i]; // Extract low bit |
kvn@3882 | 258 | // Convert to bit number, return hi bit in pair |
kvn@3882 | 259 | return OptoReg::Name((i<<_LogWordBits)+find_lowest_bit(bit)+(size-1)); |
kvn@3882 | 260 | } |
kvn@3882 | 261 | } |
kvn@3882 | 262 | return OptoReg::Bad; |
kvn@3882 | 263 | } |
kvn@3882 | 264 | |
kvn@3882 | 265 | //------------------------------clear_to_sets---------------------------------- |
kvn@3882 | 266 | // Clear out partial bits; leave only aligned adjacent bit pairs |
drchase@4585 | 267 | void RegMask::clear_to_sets(const int size) { |
kvn@3882 | 268 | if (size == 1) return; |
kvn@3882 | 269 | assert(2 <= size && size <= 8, "update low bits table"); |
kvn@3882 | 270 | assert(is_power_of_2(size), "sanity"); |
kvn@3882 | 271 | int low_bits_mask = low_bits[size>>2]; |
kvn@3882 | 272 | for (int i = 0; i < RM_SIZE; i++) { |
kvn@3882 | 273 | int bits = _A[i]; |
kvn@3882 | 274 | int sets = (bits & low_bits_mask); |
kvn@3882 | 275 | for (int j = 1; j < size; j++) { |
kvn@3882 | 276 | sets = (bits & (sets<<1)); // filter bits which produce whole sets |
kvn@3882 | 277 | } |
kvn@3882 | 278 | sets |= (sets>>1); // Smear 1 hi-bit into a set |
kvn@3882 | 279 | if (size > 2) { |
kvn@3882 | 280 | sets |= (sets>>2); // Smear 2 hi-bits into a set |
kvn@3882 | 281 | if (size > 4) { |
kvn@3882 | 282 | sets |= (sets>>4); // Smear 4 hi-bits into a set |
kvn@3882 | 283 | } |
kvn@3882 | 284 | } |
kvn@3882 | 285 | _A[i] = sets; |
kvn@3882 | 286 | } |
kvn@3882 | 287 | verify_sets(size); |
kvn@3882 | 288 | } |
kvn@3882 | 289 | |
kvn@3882 | 290 | //------------------------------smear_to_sets---------------------------------- |
kvn@3882 | 291 | // Smear out partial bits to aligned adjacent bit sets |
drchase@4585 | 292 | void RegMask::smear_to_sets(const int size) { |
kvn@3882 | 293 | if (size == 1) return; |
kvn@3882 | 294 | assert(2 <= size && size <= 8, "update low bits table"); |
kvn@3882 | 295 | assert(is_power_of_2(size), "sanity"); |
kvn@3882 | 296 | int low_bits_mask = low_bits[size>>2]; |
kvn@3882 | 297 | for (int i = 0; i < RM_SIZE; i++) { |
kvn@3882 | 298 | int bits = _A[i]; |
kvn@3882 | 299 | int sets = 0; |
kvn@3882 | 300 | for (int j = 0; j < size; j++) { |
kvn@3882 | 301 | sets |= (bits & low_bits_mask); // collect partial bits |
kvn@3882 | 302 | bits = bits>>1; |
kvn@3882 | 303 | } |
kvn@3882 | 304 | sets |= (sets<<1); // Smear 1 lo-bit into a set |
kvn@3882 | 305 | if (size > 2) { |
kvn@3882 | 306 | sets |= (sets<<2); // Smear 2 lo-bits into a set |
kvn@3882 | 307 | if (size > 4) { |
kvn@3882 | 308 | sets |= (sets<<4); // Smear 4 lo-bits into a set |
kvn@3882 | 309 | } |
kvn@3882 | 310 | } |
kvn@3882 | 311 | _A[i] = sets; |
kvn@3882 | 312 | } |
kvn@3882 | 313 | verify_sets(size); |
kvn@3882 | 314 | } |
kvn@3882 | 315 | |
kvn@3882 | 316 | //------------------------------is_aligned_set-------------------------------- |
drchase@4585 | 317 | bool RegMask::is_aligned_sets(const int size) const { |
kvn@3882 | 318 | if (size == 1) return true; |
kvn@3882 | 319 | assert(2 <= size && size <= 8, "update low bits table"); |
kvn@3882 | 320 | assert(is_power_of_2(size), "sanity"); |
kvn@3882 | 321 | int low_bits_mask = low_bits[size>>2]; |
kvn@3882 | 322 | // Assert that the register mask contains only bit sets. |
kvn@3882 | 323 | for (int i = 0; i < RM_SIZE; i++) { |
kvn@3882 | 324 | int bits = _A[i]; |
kvn@3882 | 325 | while (bits) { // Check bits for pairing |
kvn@3882 | 326 | int bit = bits & -bits; // Extract low bit |
kvn@3882 | 327 | // Low bit is not odd means its mis-aligned. |
kvn@3882 | 328 | if ((bit & low_bits_mask) == 0) return false; |
kvn@3882 | 329 | // Do extra work since (bit << size) may overflow. |
kvn@3882 | 330 | int hi_bit = bit << (size-1); // high bit |
kvn@3882 | 331 | int set = hi_bit + ((hi_bit-1) & ~(bit-1)); |
kvn@3882 | 332 | // Check for aligned adjacent bits in this set |
kvn@3882 | 333 | if ((bits & set) != set) return false; |
kvn@3882 | 334 | bits -= set; // Remove this set |
kvn@3882 | 335 | } |
kvn@3882 | 336 | } |
kvn@3882 | 337 | return true; |
kvn@3882 | 338 | } |
kvn@3882 | 339 | |
kvn@3882 | 340 | //------------------------------is_bound_set----------------------------------- |
kvn@3882 | 341 | // Return TRUE if the mask contains one adjacent set of bits and no other bits. |
kvn@3882 | 342 | // Works also for size 1. |
drchase@4585 | 343 | int RegMask::is_bound_set(const int size) const { |
kvn@3882 | 344 | if( is_AllStack() ) return false; |
kvn@3882 | 345 | assert(1 <= size && size <= 8, "update low bits table"); |
kvn@3882 | 346 | int bit = -1; // Set to hold the one bit allowed |
kvn@3882 | 347 | for (int i = 0; i < RM_SIZE; i++) { |
kvn@3882 | 348 | if (_A[i] ) { // Found some bits |
kvn@3882 | 349 | if (bit != -1) |
kvn@3882 | 350 | return false; // Already had bits, so fail |
drchase@4585 | 351 | bit = _A[i] & -_A[i]; // Extract low bit from mask |
kvn@3882 | 352 | int hi_bit = bit << (size-1); // high bit |
kvn@3882 | 353 | if (hi_bit != 0) { // Bit set stays in same word? |
kvn@3882 | 354 | int set = hi_bit + ((hi_bit-1) & ~(bit-1)); |
kvn@3882 | 355 | if (set != _A[i]) |
kvn@3882 | 356 | return false; // Require adjacent bit set and no more bits |
kvn@3882 | 357 | } else { // Else its a split-set case |
kvn@3882 | 358 | if (((-1) & ~(bit-1)) != _A[i]) |
kvn@3882 | 359 | return false; // Found many bits, so fail |
kvn@3882 | 360 | i++; // Skip iteration forward and check high part |
kvn@3882 | 361 | // The lower 24 bits should be 0 since it is split case and size <= 8. |
kvn@3882 | 362 | int set = bit>>24; |
kvn@3882 | 363 | set = set & -set; // Remove sign extension. |
kvn@3882 | 364 | set = (((set << size) - 1) >> 8); |
drchase@4585 | 365 | if (i >= RM_SIZE || _A[i] != set) |
drchase@4585 | 366 | return false; // Require expected low bits in next word |
kvn@3882 | 367 | } |
kvn@3882 | 368 | } |
kvn@3882 | 369 | } |
kvn@3882 | 370 | // True for both the empty mask and for a bit set |
kvn@3882 | 371 | return true; |
kvn@3882 | 372 | } |
kvn@3882 | 373 | |
duke@435 | 374 | //------------------------------is_UP------------------------------------------ |
duke@435 | 375 | // UP means register only, Register plus stack, or stack only is DOWN |
duke@435 | 376 | bool RegMask::is_UP() const { |
duke@435 | 377 | // Quick common case check for DOWN (any stack slot is legal) |
duke@435 | 378 | if( is_AllStack() ) |
duke@435 | 379 | return false; |
duke@435 | 380 | // Slower check for any stack bits set (also DOWN) |
duke@435 | 381 | if( overlap(Matcher::STACK_ONLY_mask) ) |
duke@435 | 382 | return false; |
duke@435 | 383 | // Not DOWN, so must be UP |
duke@435 | 384 | return true; |
duke@435 | 385 | } |
duke@435 | 386 | |
duke@435 | 387 | //------------------------------Size------------------------------------------- |
duke@435 | 388 | // Compute size of register mask in bits |
duke@435 | 389 | uint RegMask::Size() const { |
duke@435 | 390 | extern uint8 bitsInByte[256]; |
duke@435 | 391 | uint sum = 0; |
duke@435 | 392 | for( int i = 0; i < RM_SIZE; i++ ) |
duke@435 | 393 | sum += |
duke@435 | 394 | bitsInByte[(_A[i]>>24) & 0xff] + |
duke@435 | 395 | bitsInByte[(_A[i]>>16) & 0xff] + |
duke@435 | 396 | bitsInByte[(_A[i]>> 8) & 0xff] + |
duke@435 | 397 | bitsInByte[ _A[i] & 0xff]; |
duke@435 | 398 | return sum; |
duke@435 | 399 | } |
duke@435 | 400 | |
duke@435 | 401 | #ifndef PRODUCT |
duke@435 | 402 | //------------------------------print------------------------------------------ |
kvn@4478 | 403 | void RegMask::dump(outputStream *st) const { |
kvn@4478 | 404 | st->print("["); |
duke@435 | 405 | RegMask rm = *this; // Structure copy into local temp |
duke@435 | 406 | |
duke@435 | 407 | OptoReg::Name start = rm.find_first_elem(); // Get a register |
kvn@4478 | 408 | if (OptoReg::is_valid(start)) { // Check for empty mask |
duke@435 | 409 | rm.Remove(start); // Yank from mask |
kvn@4478 | 410 | OptoReg::dump(start, st); // Print register |
duke@435 | 411 | OptoReg::Name last = start; |
duke@435 | 412 | |
duke@435 | 413 | // Now I have printed an initial register. |
duke@435 | 414 | // Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ". |
duke@435 | 415 | // Begin looping over the remaining registers. |
kvn@4478 | 416 | while (1) { // |
duke@435 | 417 | OptoReg::Name reg = rm.find_first_elem(); // Get a register |
kvn@4478 | 418 | if (!OptoReg::is_valid(reg)) |
duke@435 | 419 | break; // Empty mask, end loop |
duke@435 | 420 | rm.Remove(reg); // Yank from mask |
duke@435 | 421 | |
kvn@4478 | 422 | if (last+1 == reg) { // See if they are adjacent |
duke@435 | 423 | // Adjacent registers just collect into long runs, no printing. |
duke@435 | 424 | last = reg; |
duke@435 | 425 | } else { // Ending some kind of run |
kvn@4478 | 426 | if (start == last) { // 1-register run; no special printing |
kvn@4478 | 427 | } else if (start+1 == last) { |
kvn@4478 | 428 | st->print(","); // 2-register run; print as "rX,rY" |
kvn@4478 | 429 | OptoReg::dump(last, st); |
duke@435 | 430 | } else { // Multi-register run; print as "rX-rZ" |
kvn@4478 | 431 | st->print("-"); |
kvn@4478 | 432 | OptoReg::dump(last, st); |
duke@435 | 433 | } |
kvn@4478 | 434 | st->print(","); // Seperate start of new run |
duke@435 | 435 | start = last = reg; // Start a new register run |
kvn@4478 | 436 | OptoReg::dump(start, st); // Print register |
duke@435 | 437 | } // End of if ending a register run or not |
duke@435 | 438 | } // End of while regmask not empty |
duke@435 | 439 | |
kvn@4478 | 440 | if (start == last) { // 1-register run; no special printing |
kvn@4478 | 441 | } else if (start+1 == last) { |
kvn@4478 | 442 | st->print(","); // 2-register run; print as "rX,rY" |
kvn@4478 | 443 | OptoReg::dump(last, st); |
duke@435 | 444 | } else { // Multi-register run; print as "rX-rZ" |
kvn@4478 | 445 | st->print("-"); |
kvn@4478 | 446 | OptoReg::dump(last, st); |
duke@435 | 447 | } |
kvn@4478 | 448 | if (rm.is_AllStack()) st->print("..."); |
duke@435 | 449 | } |
kvn@4478 | 450 | st->print("]"); |
duke@435 | 451 | } |
duke@435 | 452 | #endif |