src/cpu/x86/vm/relocInfo_x86.cpp

Fri, 16 Aug 2019 16:50:17 +0200

author
eosterlund
date
Fri, 16 Aug 2019 16:50:17 +0200
changeset 9834
bb1da64b0492
parent 8647
0b611970fa8b
child 8856
ac27a9c85bea
permissions
-rw-r--r--

8229345: Memory leak due to vtable stubs not being shared on SPARC
Reviewed-by: mdoerr, dholmes, kvn

duke@435 1 /*
hseigel@5528 2 * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #include "precompiled.hpp"
twisti@4318 26 #include "asm/macroAssembler.hpp"
stefank@2314 27 #include "code/relocInfo.hpp"
stefank@2314 28 #include "nativeInst_x86.hpp"
stefank@2314 29 #include "oops/oop.inline.hpp"
stefank@2314 30 #include "runtime/safepoint.hpp"
duke@435 31
duke@435 32
never@2657 33 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
duke@435 34 #ifdef AMD64
duke@435 35 x += o;
duke@435 36 typedef Assembler::WhichOperand WhichOperand;
never@739 37 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
duke@435 38 assert(which == Assembler::disp32_operand ||
kvn@599 39 which == Assembler::narrow_oop_operand ||
never@739 40 which == Assembler::imm_operand, "format unpacks ok");
never@739 41 if (which == Assembler::imm_operand) {
never@2657 42 if (verify_only) {
poonam@8647 43 guarantee(*pd_address_in_code() == x, "instructions must match");
never@2657 44 } else {
never@2657 45 *pd_address_in_code() = x;
never@2657 46 }
kvn@599 47 } else if (which == Assembler::narrow_oop_operand) {
kvn@599 48 address disp = Assembler::locate_operand(addr(), which);
coleenp@4037 49 // both compressed oops and compressed classes look the same
coleenp@4037 50 if (Universe::heap()->is_in_reserved((oop)x)) {
never@2657 51 if (verify_only) {
poonam@8647 52 guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match");
never@2657 53 } else {
never@2657 54 *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x);
never@2657 55 }
duke@435 56 } else {
coleenp@4037 57 if (verify_only) {
poonam@8647 58 guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match");
coleenp@4037 59 } else {
hseigel@5528 60 *(int32_t*) disp = Klass::encode_klass((Klass*)x);
coleenp@4037 61 }
coleenp@4037 62 }
coleenp@4037 63 } else {
duke@435 64 // Note: Use runtime_call_type relocations for call32_operand.
duke@435 65 address ip = addr();
duke@435 66 address disp = Assembler::locate_operand(ip, which);
duke@435 67 address next_ip = Assembler::locate_next_instruction(ip);
never@2657 68 if (verify_only) {
poonam@8647 69 guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match");
never@2657 70 } else {
never@2657 71 *(int32_t*) disp = x - next_ip;
never@2657 72 }
duke@435 73 }
duke@435 74 #else
never@2657 75 if (verify_only) {
poonam@8647 76 guarantee(*pd_address_in_code() == (x + o), "instructions must match");
never@2657 77 } else {
never@2657 78 *pd_address_in_code() = x + o;
never@2657 79 }
duke@435 80 #endif // AMD64
duke@435 81 }
duke@435 82
duke@435 83
duke@435 84 address Relocation::pd_call_destination(address orig_addr) {
duke@435 85 intptr_t adj = 0;
duke@435 86 if (orig_addr != NULL) {
duke@435 87 // We just moved this call instruction from orig_addr to addr().
duke@435 88 // This means its target will appear to have grown by addr() - orig_addr.
duke@435 89 adj = -( addr() - orig_addr );
duke@435 90 }
duke@435 91 NativeInstruction* ni = nativeInstruction_at(addr());
duke@435 92 if (ni->is_call()) {
duke@435 93 return nativeCall_at(addr())->destination() + adj;
duke@435 94 } else if (ni->is_jump()) {
duke@435 95 return nativeJump_at(addr())->jump_destination() + adj;
duke@435 96 } else if (ni->is_cond_jump()) {
duke@435 97 return nativeGeneralJump_at(addr())->jump_destination() + adj;
duke@435 98 } else if (ni->is_mov_literal64()) {
duke@435 99 return (address) ((NativeMovConstReg*)ni)->data();
duke@435 100 } else {
duke@435 101 ShouldNotReachHere();
duke@435 102 return NULL;
duke@435 103 }
duke@435 104 }
duke@435 105
duke@435 106
duke@435 107 void Relocation::pd_set_call_destination(address x) {
duke@435 108 NativeInstruction* ni = nativeInstruction_at(addr());
duke@435 109 if (ni->is_call()) {
duke@435 110 nativeCall_at(addr())->set_destination(x);
duke@435 111 } else if (ni->is_jump()) {
duke@435 112 NativeJump* nj = nativeJump_at(addr());
never@739 113
never@739 114 // Unresolved jumps are recognized by a destination of -1
never@739 115 // However 64bit can't actually produce such an address
never@739 116 // and encodes a jump to self but jump_destination will
never@739 117 // return a -1 as the signal. We must not relocate this
never@739 118 // jmp or the ic code will not see it as unresolved.
never@739 119
duke@435 120 if (nj->jump_destination() == (address) -1) {
never@739 121 x = addr(); // jump to self
duke@435 122 }
duke@435 123 nj->set_jump_destination(x);
duke@435 124 } else if (ni->is_cond_jump()) {
duke@435 125 // %%%% kludge this, for now, until we get a jump_destination method
duke@435 126 address old_dest = nativeGeneralJump_at(addr())->jump_destination();
duke@435 127 address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
duke@435 128 *(jint*)disp += (x - old_dest);
duke@435 129 } else if (ni->is_mov_literal64()) {
duke@435 130 ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
duke@435 131 } else {
duke@435 132 ShouldNotReachHere();
duke@435 133 }
duke@435 134 }
duke@435 135
duke@435 136
duke@435 137 address* Relocation::pd_address_in_code() {
duke@435 138 // All embedded Intel addresses are stored in 32-bit words.
duke@435 139 // Since the addr points at the start of the instruction,
duke@435 140 // we must parse the instruction a bit to find the embedded word.
duke@435 141 assert(is_data(), "must be a DataRelocation");
duke@435 142 typedef Assembler::WhichOperand WhichOperand;
never@739 143 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
duke@435 144 #ifdef AMD64
duke@435 145 assert(which == Assembler::disp32_operand ||
duke@435 146 which == Assembler::call32_operand ||
never@739 147 which == Assembler::imm_operand, "format unpacks ok");
morris@4781 148 // The "address" in the code is a displacement can't return it as
morris@4781 149 // and address* since it is really a jint*
morris@4781 150 guarantee(which == Assembler::imm_operand, "must be immediate operand");
duke@435 151 #else
never@739 152 assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok");
duke@435 153 #endif // AMD64
duke@435 154 return (address*) Assembler::locate_operand(addr(), which);
duke@435 155 }
duke@435 156
duke@435 157
duke@435 158 address Relocation::pd_get_address_from_code() {
duke@435 159 #ifdef AMD64
duke@435 160 // All embedded Intel addresses are stored in 32-bit words.
duke@435 161 // Since the addr points at the start of the instruction,
duke@435 162 // we must parse the instruction a bit to find the embedded word.
duke@435 163 assert(is_data(), "must be a DataRelocation");
duke@435 164 typedef Assembler::WhichOperand WhichOperand;
never@739 165 WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
duke@435 166 assert(which == Assembler::disp32_operand ||
duke@435 167 which == Assembler::call32_operand ||
never@739 168 which == Assembler::imm_operand, "format unpacks ok");
never@739 169 if (which != Assembler::imm_operand) {
duke@435 170 address ip = addr();
duke@435 171 address disp = Assembler::locate_operand(ip, which);
duke@435 172 address next_ip = Assembler::locate_next_instruction(ip);
duke@435 173 address a = next_ip + *(int32_t*) disp;
duke@435 174 return a;
duke@435 175 }
duke@435 176 #endif // AMD64
duke@435 177 return *pd_address_in_code();
duke@435 178 }
duke@435 179
never@739 180 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
never@739 181 #ifdef _LP64
iveresov@2686 182 if (!Assembler::is_polling_page_far()) {
iveresov@2686 183 typedef Assembler::WhichOperand WhichOperand;
iveresov@2686 184 WhichOperand which = (WhichOperand) format();
iveresov@2686 185 // This format is imm but it is really disp32
iveresov@2686 186 which = Assembler::disp32_operand;
iveresov@2686 187 address orig_addr = old_addr_for(addr(), src, dest);
iveresov@2686 188 NativeInstruction* oni = nativeInstruction_at(orig_addr);
iveresov@2686 189 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
iveresov@2686 190 // This poll_addr is incorrect by the size of the instruction it is irrelevant
iveresov@2686 191 intptr_t poll_addr = (intptr_t)oni + *orig_disp;
never@739 192
iveresov@2686 193 NativeInstruction* ni = nativeInstruction_at(addr());
iveresov@2686 194 intptr_t new_disp = poll_addr - (intptr_t) ni;
never@739 195
iveresov@2686 196 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
iveresov@2686 197 * disp = (int32_t)new_disp;
iveresov@2686 198 }
never@739 199 #endif // _LP64
never@739 200 }
never@739 201
never@739 202 void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
never@739 203 #ifdef _LP64
iveresov@2686 204 if (!Assembler::is_polling_page_far()) {
iveresov@2686 205 typedef Assembler::WhichOperand WhichOperand;
iveresov@2686 206 WhichOperand which = (WhichOperand) format();
iveresov@2686 207 // This format is imm but it is really disp32
iveresov@2686 208 which = Assembler::disp32_operand;
iveresov@2686 209 address orig_addr = old_addr_for(addr(), src, dest);
iveresov@2686 210 NativeInstruction* oni = nativeInstruction_at(orig_addr);
iveresov@2686 211 int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
iveresov@2686 212 // This poll_addr is incorrect by the size of the instruction it is irrelevant
iveresov@2686 213 intptr_t poll_addr = (intptr_t)oni + *orig_disp;
never@739 214
iveresov@2686 215 NativeInstruction* ni = nativeInstruction_at(addr());
iveresov@2686 216 intptr_t new_disp = poll_addr - (intptr_t) ni;
never@739 217
iveresov@2686 218 int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
iveresov@2686 219 * disp = (int32_t)new_disp;
iveresov@2686 220 }
never@739 221 #endif // _LP64
never@739 222 }
coleenp@4037 223
coleenp@4037 224 void metadata_Relocation::pd_fix_value(address x) {
coleenp@4037 225 }

mercurial