Sat, 07 Nov 2020 10:30:02 +0800
Added tag mips-jdk8u275-b01 for changeset d3b4d62f391f
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 4 | * |
aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 7 | * published by the Free Software Foundation. |
aoqi@0 | 8 | * |
aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 13 | * accompanied this code). |
aoqi@0 | 14 | * |
aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 18 | * |
aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 21 | * questions. |
aoqi@0 | 22 | * |
aoqi@0 | 23 | */ |
aoqi@0 | 24 | |
aoqi@0 | 25 | #include "precompiled.hpp" |
aoqi@0 | 26 | #include "asm/macroAssembler.hpp" |
aoqi@0 | 27 | #include "code/relocInfo.hpp" |
aoqi@0 | 28 | #include "nativeInst_x86.hpp" |
aoqi@0 | 29 | #include "oops/oop.inline.hpp" |
aoqi@0 | 30 | #include "runtime/safepoint.hpp" |
aoqi@0 | 31 | |
aoqi@0 | 32 | |
aoqi@0 | 33 | void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) { |
aoqi@0 | 34 | #ifdef AMD64 |
aoqi@0 | 35 | x += o; |
aoqi@0 | 36 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@0 | 37 | WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop |
aoqi@0 | 38 | assert(which == Assembler::disp32_operand || |
aoqi@0 | 39 | which == Assembler::narrow_oop_operand || |
aoqi@0 | 40 | which == Assembler::imm_operand, "format unpacks ok"); |
aoqi@0 | 41 | if (which == Assembler::imm_operand) { |
aoqi@0 | 42 | if (verify_only) { |
poonam@8647 | 43 | guarantee(*pd_address_in_code() == x, "instructions must match"); |
aoqi@0 | 44 | } else { |
aoqi@0 | 45 | *pd_address_in_code() = x; |
aoqi@0 | 46 | } |
aoqi@0 | 47 | } else if (which == Assembler::narrow_oop_operand) { |
aoqi@0 | 48 | address disp = Assembler::locate_operand(addr(), which); |
aoqi@0 | 49 | // both compressed oops and compressed classes look the same |
aoqi@0 | 50 | if (Universe::heap()->is_in_reserved((oop)x)) { |
aoqi@0 | 51 | if (verify_only) { |
poonam@8647 | 52 | guarantee(*(uint32_t*) disp == oopDesc::encode_heap_oop((oop)x), "instructions must match"); |
aoqi@0 | 53 | } else { |
aoqi@0 | 54 | *(int32_t*) disp = oopDesc::encode_heap_oop((oop)x); |
aoqi@0 | 55 | } |
aoqi@0 | 56 | } else { |
aoqi@0 | 57 | if (verify_only) { |
poonam@8647 | 58 | guarantee(*(uint32_t*) disp == Klass::encode_klass((Klass*)x), "instructions must match"); |
aoqi@0 | 59 | } else { |
aoqi@0 | 60 | *(int32_t*) disp = Klass::encode_klass((Klass*)x); |
aoqi@0 | 61 | } |
aoqi@0 | 62 | } |
aoqi@0 | 63 | } else { |
aoqi@0 | 64 | // Note: Use runtime_call_type relocations for call32_operand. |
aoqi@0 | 65 | address ip = addr(); |
aoqi@0 | 66 | address disp = Assembler::locate_operand(ip, which); |
aoqi@0 | 67 | address next_ip = Assembler::locate_next_instruction(ip); |
aoqi@0 | 68 | if (verify_only) { |
poonam@8647 | 69 | guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match"); |
aoqi@0 | 70 | } else { |
aoqi@0 | 71 | *(int32_t*) disp = x - next_ip; |
aoqi@0 | 72 | } |
aoqi@0 | 73 | } |
aoqi@0 | 74 | #else |
aoqi@0 | 75 | if (verify_only) { |
poonam@8647 | 76 | guarantee(*pd_address_in_code() == (x + o), "instructions must match"); |
aoqi@0 | 77 | } else { |
aoqi@0 | 78 | *pd_address_in_code() = x + o; |
aoqi@0 | 79 | } |
aoqi@0 | 80 | #endif // AMD64 |
aoqi@0 | 81 | } |
aoqi@0 | 82 | |
aoqi@0 | 83 | |
aoqi@0 | 84 | address Relocation::pd_call_destination(address orig_addr) { |
aoqi@0 | 85 | intptr_t adj = 0; |
aoqi@0 | 86 | if (orig_addr != NULL) { |
aoqi@0 | 87 | // We just moved this call instruction from orig_addr to addr(). |
aoqi@0 | 88 | // This means its target will appear to have grown by addr() - orig_addr. |
aoqi@0 | 89 | adj = -( addr() - orig_addr ); |
aoqi@0 | 90 | } |
aoqi@0 | 91 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@0 | 92 | if (ni->is_call()) { |
aoqi@0 | 93 | return nativeCall_at(addr())->destination() + adj; |
aoqi@0 | 94 | } else if (ni->is_jump()) { |
aoqi@0 | 95 | return nativeJump_at(addr())->jump_destination() + adj; |
aoqi@0 | 96 | } else if (ni->is_cond_jump()) { |
aoqi@0 | 97 | return nativeGeneralJump_at(addr())->jump_destination() + adj; |
aoqi@0 | 98 | } else if (ni->is_mov_literal64()) { |
aoqi@0 | 99 | return (address) ((NativeMovConstReg*)ni)->data(); |
aoqi@0 | 100 | } else { |
aoqi@0 | 101 | ShouldNotReachHere(); |
aoqi@0 | 102 | return NULL; |
aoqi@0 | 103 | } |
aoqi@0 | 104 | } |
aoqi@0 | 105 | |
aoqi@0 | 106 | |
aoqi@0 | 107 | void Relocation::pd_set_call_destination(address x) { |
aoqi@0 | 108 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@0 | 109 | if (ni->is_call()) { |
aoqi@0 | 110 | nativeCall_at(addr())->set_destination(x); |
aoqi@0 | 111 | } else if (ni->is_jump()) { |
aoqi@0 | 112 | NativeJump* nj = nativeJump_at(addr()); |
aoqi@0 | 113 | |
aoqi@0 | 114 | // Unresolved jumps are recognized by a destination of -1 |
aoqi@0 | 115 | // However 64bit can't actually produce such an address |
aoqi@0 | 116 | // and encodes a jump to self but jump_destination will |
aoqi@0 | 117 | // return a -1 as the signal. We must not relocate this |
aoqi@0 | 118 | // jmp or the ic code will not see it as unresolved. |
aoqi@0 | 119 | |
aoqi@0 | 120 | if (nj->jump_destination() == (address) -1) { |
aoqi@0 | 121 | x = addr(); // jump to self |
aoqi@0 | 122 | } |
aoqi@0 | 123 | nj->set_jump_destination(x); |
aoqi@0 | 124 | } else if (ni->is_cond_jump()) { |
aoqi@0 | 125 | // %%%% kludge this, for now, until we get a jump_destination method |
aoqi@0 | 126 | address old_dest = nativeGeneralJump_at(addr())->jump_destination(); |
aoqi@0 | 127 | address disp = Assembler::locate_operand(addr(), Assembler::call32_operand); |
aoqi@0 | 128 | *(jint*)disp += (x - old_dest); |
aoqi@0 | 129 | } else if (ni->is_mov_literal64()) { |
aoqi@0 | 130 | ((NativeMovConstReg*)ni)->set_data((intptr_t)x); |
aoqi@0 | 131 | } else { |
aoqi@0 | 132 | ShouldNotReachHere(); |
aoqi@0 | 133 | } |
aoqi@0 | 134 | } |
aoqi@0 | 135 | |
aoqi@0 | 136 | |
aoqi@0 | 137 | address* Relocation::pd_address_in_code() { |
aoqi@0 | 138 | // All embedded Intel addresses are stored in 32-bit words. |
aoqi@0 | 139 | // Since the addr points at the start of the instruction, |
aoqi@0 | 140 | // we must parse the instruction a bit to find the embedded word. |
aoqi@0 | 141 | assert(is_data(), "must be a DataRelocation"); |
aoqi@0 | 142 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@0 | 143 | WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
aoqi@0 | 144 | #ifdef AMD64 |
aoqi@0 | 145 | assert(which == Assembler::disp32_operand || |
aoqi@0 | 146 | which == Assembler::call32_operand || |
aoqi@0 | 147 | which == Assembler::imm_operand, "format unpacks ok"); |
aoqi@0 | 148 | // The "address" in the code is a displacement can't return it as |
aoqi@0 | 149 | // and address* since it is really a jint* |
aoqi@0 | 150 | guarantee(which == Assembler::imm_operand, "must be immediate operand"); |
aoqi@0 | 151 | #else |
aoqi@0 | 152 | assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok"); |
aoqi@0 | 153 | #endif // AMD64 |
aoqi@0 | 154 | return (address*) Assembler::locate_operand(addr(), which); |
aoqi@0 | 155 | } |
aoqi@0 | 156 | |
aoqi@0 | 157 | |
aoqi@0 | 158 | address Relocation::pd_get_address_from_code() { |
aoqi@0 | 159 | #ifdef AMD64 |
aoqi@0 | 160 | // All embedded Intel addresses are stored in 32-bit words. |
aoqi@0 | 161 | // Since the addr points at the start of the instruction, |
aoqi@0 | 162 | // we must parse the instruction a bit to find the embedded word. |
aoqi@0 | 163 | assert(is_data(), "must be a DataRelocation"); |
aoqi@0 | 164 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@0 | 165 | WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32 |
aoqi@0 | 166 | assert(which == Assembler::disp32_operand || |
aoqi@0 | 167 | which == Assembler::call32_operand || |
aoqi@0 | 168 | which == Assembler::imm_operand, "format unpacks ok"); |
aoqi@0 | 169 | if (which != Assembler::imm_operand) { |
aoqi@0 | 170 | address ip = addr(); |
aoqi@0 | 171 | address disp = Assembler::locate_operand(ip, which); |
aoqi@0 | 172 | address next_ip = Assembler::locate_next_instruction(ip); |
aoqi@0 | 173 | address a = next_ip + *(int32_t*) disp; |
aoqi@0 | 174 | return a; |
aoqi@0 | 175 | } |
aoqi@0 | 176 | #endif // AMD64 |
aoqi@0 | 177 | return *pd_address_in_code(); |
aoqi@0 | 178 | } |
aoqi@0 | 179 | |
aoqi@0 | 180 | void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { |
aoqi@0 | 181 | #ifdef _LP64 |
aoqi@0 | 182 | if (!Assembler::is_polling_page_far()) { |
aoqi@0 | 183 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@0 | 184 | WhichOperand which = (WhichOperand) format(); |
aoqi@0 | 185 | // This format is imm but it is really disp32 |
aoqi@0 | 186 | which = Assembler::disp32_operand; |
aoqi@0 | 187 | address orig_addr = old_addr_for(addr(), src, dest); |
aoqi@0 | 188 | NativeInstruction* oni = nativeInstruction_at(orig_addr); |
aoqi@0 | 189 | int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
aoqi@0 | 190 | // This poll_addr is incorrect by the size of the instruction it is irrelevant |
aoqi@0 | 191 | intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
aoqi@0 | 192 | |
aoqi@0 | 193 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@0 | 194 | intptr_t new_disp = poll_addr - (intptr_t) ni; |
aoqi@0 | 195 | |
aoqi@0 | 196 | int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
aoqi@0 | 197 | * disp = (int32_t)new_disp; |
aoqi@0 | 198 | } |
aoqi@0 | 199 | #endif // _LP64 |
aoqi@0 | 200 | } |
aoqi@0 | 201 | |
aoqi@0 | 202 | void poll_return_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) { |
aoqi@0 | 203 | #ifdef _LP64 |
aoqi@0 | 204 | if (!Assembler::is_polling_page_far()) { |
aoqi@0 | 205 | typedef Assembler::WhichOperand WhichOperand; |
aoqi@0 | 206 | WhichOperand which = (WhichOperand) format(); |
aoqi@0 | 207 | // This format is imm but it is really disp32 |
aoqi@0 | 208 | which = Assembler::disp32_operand; |
aoqi@0 | 209 | address orig_addr = old_addr_for(addr(), src, dest); |
aoqi@0 | 210 | NativeInstruction* oni = nativeInstruction_at(orig_addr); |
aoqi@0 | 211 | int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which); |
aoqi@0 | 212 | // This poll_addr is incorrect by the size of the instruction it is irrelevant |
aoqi@0 | 213 | intptr_t poll_addr = (intptr_t)oni + *orig_disp; |
aoqi@0 | 214 | |
aoqi@0 | 215 | NativeInstruction* ni = nativeInstruction_at(addr()); |
aoqi@0 | 216 | intptr_t new_disp = poll_addr - (intptr_t) ni; |
aoqi@0 | 217 | |
aoqi@0 | 218 | int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which); |
aoqi@0 | 219 | * disp = (int32_t)new_disp; |
aoqi@0 | 220 | } |
aoqi@0 | 221 | #endif // _LP64 |
aoqi@0 | 222 | } |
aoqi@0 | 223 | |
aoqi@0 | 224 | void metadata_Relocation::pd_fix_value(address x) { |
aoqi@0 | 225 | } |