src/os_cpu/linux_x86/vm/prefetch_linux_x86.inline.hpp

Wed, 25 Sep 2013 13:58:13 +0200

author
dsimms
date
Wed, 25 Sep 2013 13:58:13 +0200
changeset 5781
899ecf76b570
parent 2314
f95d63e2154a
child 6876
710a3c8b516e
permissions
-rw-r--r--

8023956: Provide a work-around to broken Linux 32 bit "Exec Shield" using CS for NX emulation (crashing with SI_KERNEL)
Summary: Execute some code at a high virtual address value, and keep mapped
Reviewed-by: coleenp, zgu

duke@435 1 /*
stefank@2314 2 * Copyright (c) 2003, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #ifndef OS_CPU_LINUX_X86_VM_PREFETCH_LINUX_X86_INLINE_HPP
stefank@2314 26 #define OS_CPU_LINUX_X86_VM_PREFETCH_LINUX_X86_INLINE_HPP
stefank@2314 27
stefank@2314 28 #include "runtime/prefetch.hpp"
stefank@2314 29
duke@435 30
duke@435 31 inline void Prefetch::read (void *loc, intx interval) {
duke@435 32 #ifdef AMD64
duke@435 33 __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
duke@435 34 #endif // AMD64
duke@435 35 }
duke@435 36
duke@435 37 inline void Prefetch::write(void *loc, intx interval) {
duke@435 38 #ifdef AMD64
duke@435 39
duke@435 40 // Do not use the 3dnow prefetchw instruction. It isn't supported on em64t.
duke@435 41 // __asm__ ("prefetchw (%0,%1,1)" : : "r" (loc), "r" (interval));
duke@435 42 __asm__ ("prefetcht0 (%0,%1,1)" : : "r" (loc), "r" (interval));
duke@435 43
duke@435 44 #endif // AMD64
duke@435 45 }
stefank@2314 46
stefank@2314 47 #endif // OS_CPU_LINUX_X86_VM_PREFETCH_LINUX_X86_INLINE_HPP

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