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src/cpu/sparc/vm/vm_version_sparc.hpp@7e88bdae86ec (annotated)

src/cpu/sparc/vm/vm_version_sparc.hpp

Fri, 25 Mar 2011 09:35:39 +0100

author

roland

date

Fri, 25 Mar 2011 09:35:39 +0100

changeset 2683

7e88bdae86ec

parent 2403

c04052fd6ae1

child 3037

3d42f82cd811

permissions

-rw-r--r--

7029017: Additional architecture support for c2 compiler
Summary: Enables cross building of a c2 VM. Support masking of shift counts when the processor architecture mandates it.
Reviewed-by: kvn, never

duke@435	1	/*
kvn@2269	2	* Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#ifndef CPU_SPARC_VM_VM_VERSION_SPARC_HPP
stefank@2314	26	#define CPU_SPARC_VM_VM_VERSION_SPARC_HPP
stefank@2314	27
stefank@2314	28	#include "runtime/globals_extension.hpp"
stefank@2314	29	#include "runtime/vm_version.hpp"
stefank@2314	30
duke@435	31	class VM_Version: public Abstract_VM_Version {
duke@435	32	protected:
duke@435	33	enum Feature_Flag {
twisti@1076	34	v8_instructions = 0,
twisti@1076	35	hardware_mul32 = 1,
twisti@1076	36	hardware_div32 = 2,
twisti@1076	37	hardware_fsmuld = 3,
twisti@1078	38	hardware_popc = 4,
twisti@1078	39	v9_instructions = 5,
twisti@1078	40	vis1_instructions = 6,
twisti@1078	41	vis2_instructions = 7,
kvn@2269	42	sun4v_instructions = 8,
kvn@2269	43	blk_init_instructions = 9,
kvn@2403	44	fmaf_instructions = 10,
kvn@2403	45	fmau_instructions = 11,
kvn@2403	46	vis3_instructions = 12,
kvn@2403	47	sparc64_family = 13,
kvn@2403	48	T_family = 14,
kvn@2403	49	T1_model = 15
duke@435	50	};
duke@435	51
duke@435	52	enum Feature_Flag_Set {
twisti@1076	53	unknown_m = 0,
twisti@1076	54	all_features_m = -1,
duke@435	55
twisti@1076	56	v8_instructions_m = 1 << v8_instructions,
twisti@1076	57	hardware_mul32_m = 1 << hardware_mul32,
twisti@1076	58	hardware_div32_m = 1 << hardware_div32,
twisti@1076	59	hardware_fsmuld_m = 1 << hardware_fsmuld,
twisti@1078	60	hardware_popc_m = 1 << hardware_popc,
twisti@1076	61	v9_instructions_m = 1 << v9_instructions,
twisti@1076	62	vis1_instructions_m = 1 << vis1_instructions,
twisti@1076	63	vis2_instructions_m = 1 << vis2_instructions,
twisti@1076	64	sun4v_m = 1 << sun4v_instructions,
kvn@2269	65	blk_init_instructions_m = 1 << blk_init_instructions,
kvn@2269	66	fmaf_instructions_m = 1 << fmaf_instructions,
kvn@2403	67	fmau_instructions_m = 1 << fmau_instructions,
kvn@2403	68	vis3_instructions_m = 1 << vis3_instructions,
kvn@2403	69	sparc64_family_m = 1 << sparc64_family,
kvn@2403	70	T_family_m = 1 << T_family,
kvn@2403	71	T1_model_m = 1 << T1_model,
duke@435	72
twisti@1076	73	generic_v8_m = v8_instructions_m | hardware_mul32_m | hardware_div32_m | hardware_fsmuld_m,
twisti@1076	74	generic_v9_m = generic_v8_m | v9_instructions_m,
twisti@1076	75	ultra3_m = generic_v9_m | vis1_instructions_m | vis2_instructions_m,
duke@435	76
duke@435	77	// Temporary until we have something more accurate
twisti@1076	78	niagara1_unique_m = sun4v_m,
twisti@1076	79	niagara1_m = generic_v9_m | niagara1_unique_m
duke@435	80	};
duke@435	81
duke@435	82	static int _features;
duke@435	83	static const char* _features_str;
duke@435	84
duke@435	85	static void print_features();
duke@435	86	static int determine_features();
duke@435	87	static int platform_features(int features);
duke@435	88
kvn@2403	89	// Returns true if the platform is in the niagara line (T series)
kvn@2403	90	static bool is_T_family(int features) { return (features & T_family_m) != 0; }
kvn@2403	91	static bool is_niagara() { return is_T_family(_features); }
kvn@2403	92	DEBUG_ONLY( static bool is_niagara(int features) { return (features & sun4v_m) != 0; } )
kvn@2403	93
kvn@2403	94	// Returns true if it is niagara1 (T1).
kvn@2403	95	static bool is_T1_model(int features) { return is_T_family(features) && ((features & T1_model_m) != 0); }
duke@435	96
jmasa@445	97	static int maximum_niagara1_processor_count() { return 32; }
jmasa@445	98
duke@435	99	public:
duke@435	100	// Initialization
duke@435	101	static void initialize();
duke@435	102
duke@435	103	// Instruction support
duke@435	104	static bool has_v8() { return (_features & v8_instructions_m) != 0; }
duke@435	105	static bool has_v9() { return (_features & v9_instructions_m) != 0; }
twisti@1076	106	static bool has_hardware_mul32() { return (_features & hardware_mul32_m) != 0; }
twisti@1076	107	static bool has_hardware_div32() { return (_features & hardware_div32_m) != 0; }
duke@435	108	static bool has_hardware_fsmuld() { return (_features & hardware_fsmuld_m) != 0; }
twisti@1078	109	static bool has_hardware_popc() { return (_features & hardware_popc_m) != 0; }
duke@435	110	static bool has_vis1() { return (_features & vis1_instructions_m) != 0; }
duke@435	111	static bool has_vis2() { return (_features & vis2_instructions_m) != 0; }
kvn@2403	112	static bool has_vis3() { return (_features & vis3_instructions_m) != 0; }
kvn@2269	113	static bool has_blk_init() { return (_features & blk_init_instructions_m) != 0; }
duke@435	114
duke@435	115	static bool supports_compare_and_exchange()
duke@435	116	{ return has_v9(); }
duke@435	117
duke@435	118	static bool is_ultra3() { return (_features & ultra3_m) == ultra3_m; }
duke@435	119	static bool is_sun4v() { return (_features & sun4v_m) != 0; }
kvn@2403	120	// Returns true if the platform is in the niagara line (T series)
kvn@2403	121	// and newer than the niagara1.
kvn@2403	122	static bool is_niagara_plus() { return is_T_family(_features) && !is_T1_model(_features); }
kvn@2403	123	// Fujitsu SPARC64
kvn@2403	124	static bool is_sparc64() { return (_features & sparc64_family_m) != 0; }
duke@435	125
kvn@2403	126	static bool has_fast_fxtof() { return is_niagara() || is_sparc64() || has_v9() && !is_ultra3(); }
kvn@2403	127	static bool has_fast_idiv() { return is_niagara_plus() || is_sparc64(); }
duke@435	128
duke@435	129	static const char* cpu_features() { return _features_str; }
duke@435	130
duke@435	131	static intx L1_data_cache_line_size() {
duke@435	132	return 64; // default prefetch block size on sparc
duke@435	133	}
duke@435	134
duke@435	135	// Prefetch
duke@435	136	static intx prefetch_copy_interval_in_bytes() {
duke@435	137	intx interval = PrefetchCopyIntervalInBytes;
duke@435	138	return interval >= 0 ? interval : (has_v9() ? 512 : 0);
duke@435	139	}
duke@435	140	static intx prefetch_scan_interval_in_bytes() {
duke@435	141	intx interval = PrefetchScanIntervalInBytes;
duke@435	142	return interval >= 0 ? interval : (has_v9() ? 512 : 0);
duke@435	143	}
duke@435	144	static intx prefetch_fields_ahead() {
duke@435	145	intx count = PrefetchFieldsAhead;
duke@435	146	return count >= 0 ? count : (is_ultra3() ? 1 : 0);
duke@435	147	}
duke@435	148
duke@435	149	static intx allocate_prefetch_distance() {
duke@435	150	// This method should be called before allocate_prefetch_style().
duke@435	151	intx count = AllocatePrefetchDistance;
duke@435	152	if (count < 0) { // default is not defined ?
duke@435	153	count = 512;
duke@435	154	}
duke@435	155	return count;
duke@435	156	}
duke@435	157	static intx allocate_prefetch_style() {
duke@435	158	assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive");
duke@435	159	// Return 0 if AllocatePrefetchDistance was not defined.
duke@435	160	return AllocatePrefetchDistance > 0 ? AllocatePrefetchStyle : 0;
duke@435	161	}
duke@435	162
duke@435	163	// Legacy
duke@435	164	static bool v8_instructions_work() { return has_v8() && !has_v9(); }
duke@435	165	static bool v9_instructions_work() { return has_v9(); }
duke@435	166
duke@435	167	// Assembler testing
duke@435	168	static void allow_all();
duke@435	169	static void revert();
duke@435	170
duke@435	171	// Override the Abstract_VM_Version implementation.
duke@435	172	static uint page_size_count() { return is_sun4v() ? 4 : 2; }
jmasa@445	173
jmasa@445	174	// Calculates the number of parallel threads
jmasa@445	175	static unsigned int calc_parallel_worker_threads();
duke@435	176	};
stefank@2314	177
stefank@2314	178	#endif // CPU_SPARC_VM_VM_VERSION_SPARC_HPP