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src/share/vm/c1/c1_Defs.hpp@710a3c8b516e (annotated)
src/share/vm/c1/c1_Defs.hpp
Tue, 08 Aug 2017 15:57:29 +0800
- author
- aoqi
- date
- Tue, 08 Aug 2017 15:57:29 +0800
- changeset 6876
- 710a3c8b516e
- parent 2708
- 1d1603768966
- parent 1
- 2d8a650513c2
- permissions
- -rw-r--r--
merge
| aoqi@0 | 1 | /* |
| aoqi@0 | 2 | * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. |
| aoqi@0 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| aoqi@0 | 4 | * |
| aoqi@0 | 5 | * This code is free software; you can redistribute it and/or modify it |
| aoqi@0 | 6 | * under the terms of the GNU General Public License version 2 only, as |
| aoqi@0 | 7 | * published by the Free Software Foundation. |
| aoqi@0 | 8 | * |
| aoqi@0 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
| aoqi@0 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| aoqi@0 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| aoqi@0 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
| aoqi@0 | 13 | * accompanied this code). |
| aoqi@0 | 14 | * |
| aoqi@0 | 15 | * You should have received a copy of the GNU General Public License version |
| aoqi@0 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
| aoqi@0 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| aoqi@0 | 18 | * |
| aoqi@0 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| aoqi@0 | 20 | * or visit www.oracle.com if you need additional information or have any |
| aoqi@0 | 21 | * questions. |
| aoqi@0 | 22 | * |
| aoqi@0 | 23 | */ |
| aoqi@0 | 24 | |
| aoqi@1 | 25 | /* |
| aoqi@1 | 26 | * This file has been modified by Loongson Technology in 2015. These |
| aoqi@1 | 27 | * modifications are Copyright (c) 2015 Loongson Technology, and are made |
| aoqi@1 | 28 | * available on the same license terms set forth above. |
| aoqi@1 | 29 | */ |
| aoqi@1 | 30 | |
| aoqi@0 | 31 | #ifndef SHARE_VM_C1_C1_DEFS_HPP |
| aoqi@0 | 32 | #define SHARE_VM_C1_C1_DEFS_HPP |
| aoqi@0 | 33 | |
| aoqi@0 | 34 | #include "utilities/globalDefinitions.hpp" |
| aoqi@0 | 35 | #ifdef TARGET_ARCH_x86 |
| aoqi@0 | 36 | # include "register_x86.hpp" |
| aoqi@0 | 37 | #endif |
| aoqi@1 | 38 | #ifdef TARGET_ARCH_mips |
| aoqi@1 | 39 | # include "register_mips.hpp" |
| aoqi@1 | 40 | #endif |
| aoqi@0 | 41 | #ifdef TARGET_ARCH_sparc |
| aoqi@0 | 42 | # include "register_sparc.hpp" |
| aoqi@0 | 43 | #endif |
| aoqi@0 | 44 | #ifdef TARGET_ARCH_zero |
| aoqi@0 | 45 | # include "register_zero.hpp" |
| aoqi@0 | 46 | #endif |
| aoqi@0 | 47 | #ifdef TARGET_ARCH_arm |
| aoqi@0 | 48 | # include "register_arm.hpp" |
| aoqi@0 | 49 | #endif |
| aoqi@0 | 50 | #ifdef TARGET_ARCH_ppc |
| aoqi@0 | 51 | # include "register_ppc.hpp" |
| aoqi@0 | 52 | #endif |
| aoqi@0 | 53 | |
| aoqi@0 | 54 | // set frame size and return address offset to these values in blobs |
| aoqi@0 | 55 | // (if the compiled frame uses ebp as link pointer on IA; otherwise, |
| aoqi@0 | 56 | // the frame size must be fixed) |
| aoqi@0 | 57 | enum { |
| aoqi@0 | 58 | no_frame_size = -1 |
| aoqi@0 | 59 | }; |
| aoqi@0 | 60 | |
| aoqi@0 | 61 | |
| aoqi@0 | 62 | #ifdef TARGET_ARCH_x86 |
| aoqi@0 | 63 | # include "c1_Defs_x86.hpp" |
| aoqi@0 | 64 | #endif |
| aoqi@1 | 65 | #ifdef TARGET_ARCH_mips |
| aoqi@1 | 66 | # include "c1_Defs_mips.hpp" |
| aoqi@1 | 67 | #endif |
| aoqi@0 | 68 | #ifdef TARGET_ARCH_sparc |
| aoqi@0 | 69 | # include "c1_Defs_sparc.hpp" |
| aoqi@0 | 70 | #endif |
| aoqi@0 | 71 | #ifdef TARGET_ARCH_arm |
| aoqi@0 | 72 | # include "c1_Defs_arm.hpp" |
| aoqi@0 | 73 | #endif |
| aoqi@0 | 74 | #ifdef TARGET_ARCH_ppc |
| aoqi@0 | 75 | # include "c1_Defs_ppc.hpp" |
| aoqi@0 | 76 | #endif |
| aoqi@0 | 77 | |
| aoqi@0 | 78 | |
| aoqi@0 | 79 | // native word offsets from memory address |
| aoqi@0 | 80 | enum { |
| aoqi@0 | 81 | lo_word_offset_in_bytes = pd_lo_word_offset_in_bytes, |
| aoqi@0 | 82 | hi_word_offset_in_bytes = pd_hi_word_offset_in_bytes |
| aoqi@0 | 83 | }; |
| aoqi@0 | 84 | |
| aoqi@0 | 85 | |
| aoqi@0 | 86 | // the processor may require explicit rounding operations to implement the strictFP mode |
| aoqi@0 | 87 | enum { |
| aoqi@0 | 88 | strict_fp_requires_explicit_rounding = pd_strict_fp_requires_explicit_rounding |
| aoqi@0 | 89 | }; |
| aoqi@0 | 90 | |
| aoqi@0 | 91 | |
| aoqi@0 | 92 | // for debug info: a float value in a register may be saved in double precision by runtime stubs |
| aoqi@0 | 93 | enum { |
| aoqi@0 | 94 | float_saved_as_double = pd_float_saved_as_double |
| aoqi@0 | 95 | }; |
| aoqi@0 | 96 | |
| aoqi@0 | 97 | #endif // SHARE_VM_C1_C1_DEFS_HPP |
