Tue, 08 Aug 2017 15:57:29 +0800
merge
aoqi@0 | 1 | /* |
aoqi@0 | 2 | * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved. |
aoqi@0 | 3 | * Copyright 2012, 2013 SAP AG. All rights reserved. |
aoqi@0 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@0 | 5 | * |
aoqi@0 | 6 | * This code is free software; you can redistribute it and/or modify it |
aoqi@0 | 7 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@0 | 8 | * published by the Free Software Foundation. |
aoqi@0 | 9 | * |
aoqi@0 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@0 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@0 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@0 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@0 | 14 | * accompanied this code). |
aoqi@0 | 15 | * |
aoqi@0 | 16 | * You should have received a copy of the GNU General Public License version |
aoqi@0 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@0 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@0 | 19 | * |
aoqi@0 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@0 | 21 | * or visit www.oracle.com if you need additional information or have any |
aoqi@0 | 22 | * questions. |
aoqi@0 | 23 | * |
aoqi@0 | 24 | */ |
aoqi@0 | 25 | |
aoqi@0 | 26 | #ifndef OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP |
aoqi@0 | 27 | #define OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP |
aoqi@0 | 28 | |
aoqi@0 | 29 | #include "runtime/orderAccess.hpp" |
aoqi@0 | 30 | #include "vm_version_ppc.hpp" |
aoqi@0 | 31 | |
aoqi@0 | 32 | // Implementation of class OrderAccess. |
aoqi@0 | 33 | |
aoqi@0 | 34 | // |
aoqi@0 | 35 | // Machine barrier instructions: |
aoqi@0 | 36 | // |
aoqi@0 | 37 | // - sync Two-way memory barrier, aka fence. |
aoqi@0 | 38 | // - lwsync orders Store|Store, |
aoqi@0 | 39 | // Load|Store, |
aoqi@0 | 40 | // Load|Load, |
aoqi@0 | 41 | // but not Store|Load |
aoqi@0 | 42 | // - eieio orders Store|Store |
aoqi@0 | 43 | // - isync Invalidates speculatively executed instructions, |
aoqi@0 | 44 | // but isync may complete before storage accesses |
aoqi@0 | 45 | // associated with instructions preceding isync have |
aoqi@0 | 46 | // been performed. |
aoqi@0 | 47 | // |
aoqi@0 | 48 | // Semantic barrier instructions: |
aoqi@0 | 49 | // (as defined in orderAccess.hpp) |
aoqi@0 | 50 | // |
aoqi@0 | 51 | // - release orders Store|Store, (maps to lwsync) |
aoqi@0 | 52 | // Load|Store |
aoqi@0 | 53 | // - acquire orders Load|Store, (maps to lwsync) |
aoqi@0 | 54 | // Load|Load |
aoqi@0 | 55 | // - fence orders Store|Store, (maps to sync) |
aoqi@0 | 56 | // Load|Store, |
aoqi@0 | 57 | // Load|Load, |
aoqi@0 | 58 | // Store|Load |
aoqi@0 | 59 | // |
aoqi@0 | 60 | |
aoqi@0 | 61 | #define inlasm_sync() __asm__ __volatile__ ("sync" : : : "memory"); |
aoqi@0 | 62 | #define inlasm_lwsync() __asm__ __volatile__ ("lwsync" : : : "memory"); |
aoqi@0 | 63 | #define inlasm_eieio() __asm__ __volatile__ ("eieio" : : : "memory"); |
aoqi@0 | 64 | #define inlasm_isync() __asm__ __volatile__ ("isync" : : : "memory"); |
aoqi@0 | 65 | #define inlasm_release() inlasm_lwsync(); |
aoqi@0 | 66 | #define inlasm_acquire() inlasm_lwsync(); |
aoqi@0 | 67 | // Use twi-isync for load_acquire (faster than lwsync). |
aoqi@0 | 68 | // ATTENTION: seems like xlC 10.1 has problems with this inline assembler macro (VerifyMethodHandles found "bad vminfo in AMH.conv"): |
aoqi@0 | 69 | // #define inlasm_acquire_reg(X) __asm__ __volatile__ ("twi 0,%0,0\n isync\n" : : "r" (X) : "memory"); |
aoqi@0 | 70 | #define inlasm_acquire_reg(X) inlasm_lwsync(); |
aoqi@0 | 71 | #define inlasm_fence() inlasm_sync(); |
aoqi@0 | 72 | |
aoqi@0 | 73 | inline void OrderAccess::loadload() { inlasm_lwsync(); } |
aoqi@0 | 74 | inline void OrderAccess::storestore() { inlasm_lwsync(); } |
aoqi@0 | 75 | inline void OrderAccess::loadstore() { inlasm_lwsync(); } |
aoqi@0 | 76 | inline void OrderAccess::storeload() { inlasm_fence(); } |
aoqi@0 | 77 | |
aoqi@0 | 78 | inline void OrderAccess::acquire() { inlasm_acquire(); } |
aoqi@0 | 79 | inline void OrderAccess::release() { inlasm_release(); } |
aoqi@0 | 80 | inline void OrderAccess::fence() { inlasm_fence(); } |
aoqi@0 | 81 | |
aoqi@0 | 82 | inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { register jbyte t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 83 | inline jshort OrderAccess::load_acquire(volatile jshort* p) { register jshort t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 84 | inline jint OrderAccess::load_acquire(volatile jint* p) { register jint t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 85 | inline jlong OrderAccess::load_acquire(volatile jlong* p) { register jlong t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 86 | inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { register jubyte t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 87 | inline jushort OrderAccess::load_acquire(volatile jushort* p) { register jushort t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 88 | inline juint OrderAccess::load_acquire(volatile juint* p) { register juint t = *p; inlasm_acquire_reg(t); return t; } |
aoqi@0 | 89 | inline julong OrderAccess::load_acquire(volatile julong* p) { return (julong)load_acquire((volatile jlong*)p); } |
aoqi@0 | 90 | inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { register jfloat t = *p; inlasm_acquire(); return t; } |
aoqi@0 | 91 | inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { register jdouble t = *p; inlasm_acquire(); return t; } |
aoqi@0 | 92 | |
aoqi@0 | 93 | inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return (intptr_t)load_acquire((volatile jlong*)p); } |
aoqi@0 | 94 | inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return (void*) load_acquire((volatile jlong*)p); } |
aoqi@0 | 95 | inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return (void*) load_acquire((volatile jlong*)p); } |
aoqi@0 | 96 | |
aoqi@0 | 97 | inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { inlasm_release(); *p = v; } |
aoqi@0 | 98 | inline void OrderAccess::release_store(volatile jshort* p, jshort v) { inlasm_release(); *p = v; } |
aoqi@0 | 99 | inline void OrderAccess::release_store(volatile jint* p, jint v) { inlasm_release(); *p = v; } |
aoqi@0 | 100 | inline void OrderAccess::release_store(volatile jlong* p, jlong v) { inlasm_release(); *p = v; } |
aoqi@0 | 101 | inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { inlasm_release(); *p = v; } |
aoqi@0 | 102 | inline void OrderAccess::release_store(volatile jushort* p, jushort v) { inlasm_release(); *p = v; } |
aoqi@0 | 103 | inline void OrderAccess::release_store(volatile juint* p, juint v) { inlasm_release(); *p = v; } |
aoqi@0 | 104 | inline void OrderAccess::release_store(volatile julong* p, julong v) { inlasm_release(); *p = v; } |
aoqi@0 | 105 | inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { inlasm_release(); *p = v; } |
aoqi@0 | 106 | inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; } |
aoqi@0 | 107 | |
aoqi@0 | 108 | inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; } |
aoqi@0 | 109 | inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { inlasm_release(); *(void* volatile *)p = v; } |
aoqi@0 | 110 | |
aoqi@0 | 111 | inline void OrderAccess::store_fence(jbyte* p, jbyte v) { *p = v; inlasm_fence(); } |
aoqi@0 | 112 | inline void OrderAccess::store_fence(jshort* p, jshort v) { *p = v; inlasm_fence(); } |
aoqi@0 | 113 | inline void OrderAccess::store_fence(jint* p, jint v) { *p = v; inlasm_fence(); } |
aoqi@0 | 114 | inline void OrderAccess::store_fence(jlong* p, jlong v) { *p = v; inlasm_fence(); } |
aoqi@0 | 115 | inline void OrderAccess::store_fence(jubyte* p, jubyte v) { *p = v; inlasm_fence(); } |
aoqi@0 | 116 | inline void OrderAccess::store_fence(jushort* p, jushort v) { *p = v; inlasm_fence(); } |
aoqi@0 | 117 | inline void OrderAccess::store_fence(juint* p, juint v) { *p = v; inlasm_fence(); } |
aoqi@0 | 118 | inline void OrderAccess::store_fence(julong* p, julong v) { *p = v; inlasm_fence(); } |
aoqi@0 | 119 | inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; inlasm_fence(); } |
aoqi@0 | 120 | inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; inlasm_fence(); } |
aoqi@0 | 121 | |
aoqi@0 | 122 | inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) { *p = v; inlasm_fence(); } |
aoqi@0 | 123 | inline void OrderAccess::store_ptr_fence(void** p, void* v) { *p = v; inlasm_fence(); } |
aoqi@0 | 124 | |
aoqi@0 | 125 | inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 126 | inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 127 | inline void OrderAccess::release_store_fence(volatile jint* p, jint v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 128 | inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 129 | inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 130 | inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 131 | inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 132 | inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 133 | inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 134 | inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 135 | |
aoqi@0 | 136 | inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) { inlasm_release(); *p = v; inlasm_fence(); } |
aoqi@0 | 137 | inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) { inlasm_release(); *(void* volatile *)p = v; inlasm_fence(); } |
aoqi@0 | 138 | |
aoqi@0 | 139 | #undef inlasm_sync |
aoqi@0 | 140 | #undef inlasm_lwsync |
aoqi@0 | 141 | #undef inlasm_eieio |
aoqi@0 | 142 | #undef inlasm_isync |
aoqi@0 | 143 | #undef inlasm_release |
aoqi@0 | 144 | #undef inlasm_acquire |
aoqi@0 | 145 | #undef inlasm_fence |
aoqi@0 | 146 | |
aoqi@0 | 147 | #endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP |