src/share/vm/c1/c1_FrameMap.hpp

Wed, 15 Apr 2020 11:49:55 +0800

author
aoqi
date
Wed, 15 Apr 2020 11:49:55 +0800
changeset 9852
70aa912cebe5
parent 6876
710a3c8b516e
parent 9835
39b41ab3366c
permissions
-rw-r--r--

Merge

duke@435 1 /*
mikael@6198 2 * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
aoqi@1 25 /*
aoqi@1 26 * This file has been modified by Loongson Technology in 2015. These
aoqi@1 27 * modifications are Copyright (c) 2015 Loongson Technology, and are made
aoqi@1 28 * available on the same license terms set forth above.
aoqi@1 29 */
aoqi@1 30
stefank@2314 31 #ifndef SHARE_VM_C1_C1_FRAMEMAP_HPP
stefank@2314 32 #define SHARE_VM_C1_C1_FRAMEMAP_HPP
stefank@2314 33
stefank@2314 34 #include "asm/assembler.hpp"
stefank@2314 35 #include "c1/c1_Defs.hpp"
stefank@2314 36 #include "c1/c1_LIR.hpp"
stefank@2314 37 #include "code/vmreg.hpp"
stefank@2314 38 #include "memory/allocation.hpp"
stefank@2314 39 #include "runtime/frame.hpp"
stefank@2314 40 #include "runtime/synchronizer.hpp"
stefank@2314 41 #include "utilities/globalDefinitions.hpp"
stefank@2314 42
duke@435 43 class ciMethod;
duke@435 44 class CallingConvention;
duke@435 45 class BasicTypeArray;
duke@435 46 class BasicTypeList;
duke@435 47
duke@435 48 //--------------------------------------------------------
duke@435 49 // FrameMap
duke@435 50 //--------------------------------------------------------
duke@435 51
duke@435 52 // This class is responsible of mapping items (locals, monitors, spill
duke@435 53 // slots and registers to their frame location
duke@435 54 //
duke@435 55 // The monitors are specified by a consecutive index, although each monitor entry
duke@435 56 // occupies two words. The monitor_index is 0.._num_monitors
duke@435 57 // The spill index is similar to local index; it is in range 0..(open)
duke@435 58 //
duke@435 59 // The CPU registers are mapped using a fixed table; register with number 0
duke@435 60 // is the most used one.
duke@435 61
duke@435 62
duke@435 63 // stack grow direction --> SP
duke@435 64 // +----------+---+----------+-------+------------------------+-----+
duke@435 65 // |arguments | x | monitors | spill | reserved argument area | ABI |
duke@435 66 // +----------+---+----------+-------+------------------------+-----+
duke@435 67 //
duke@435 68 // x = ABI area (SPARC) or return adress and link (i486)
duke@435 69 // ABI = ABI area (SPARC) or nothing (i486)
duke@435 70
duke@435 71
duke@435 72 class LIR_OprDesc;
duke@435 73 typedef LIR_OprDesc* LIR_Opr;
duke@435 74
duke@435 75
duke@435 76 class FrameMap : public CompilationResourceObj {
duke@435 77 public:
duke@435 78 enum {
duke@435 79 nof_cpu_regs = pd_nof_cpu_regs_frame_map,
duke@435 80 nof_fpu_regs = pd_nof_fpu_regs_frame_map,
duke@435 81
duke@435 82 nof_cpu_regs_reg_alloc = pd_nof_cpu_regs_reg_alloc,
duke@435 83 nof_fpu_regs_reg_alloc = pd_nof_fpu_regs_reg_alloc,
duke@435 84
iveresov@2344 85 max_nof_caller_save_cpu_regs = pd_nof_caller_save_cpu_regs_frame_map,
iveresov@2344 86 nof_caller_save_fpu_regs = pd_nof_caller_save_fpu_regs_frame_map,
duke@435 87
duke@435 88 spill_slot_size_in_bytes = 4
duke@435 89 };
duke@435 90
stefank@2314 91 #ifdef TARGET_ARCH_x86
stefank@2314 92 # include "c1_FrameMap_x86.hpp"
stefank@2314 93 #endif
aoqi@1 94 #ifdef TARGET_ARCH_mips
aoqi@1 95 # include "c1_FrameMap_mips.hpp"
aoqi@1 96 #endif
stefank@2314 97 #ifdef TARGET_ARCH_sparc
stefank@2314 98 # include "c1_FrameMap_sparc.hpp"
stefank@2314 99 #endif
bobv@2508 100 #ifdef TARGET_ARCH_arm
bobv@2508 101 # include "c1_FrameMap_arm.hpp"
bobv@2508 102 #endif
bobv@2508 103 #ifdef TARGET_ARCH_ppc
bobv@2508 104 # include "c1_FrameMap_ppc.hpp"
bobv@2508 105 #endif
stefank@2314 106
duke@435 107
duke@435 108 friend class LIR_OprDesc;
duke@435 109
duke@435 110 private:
duke@435 111 static bool _init_done;
duke@435 112 static Register _cpu_rnr2reg [nof_cpu_regs];
duke@435 113 static int _cpu_reg2rnr [nof_cpu_regs];
duke@435 114
iveresov@2344 115 static LIR_Opr _caller_save_cpu_regs [max_nof_caller_save_cpu_regs];
duke@435 116 static LIR_Opr _caller_save_fpu_regs [nof_caller_save_fpu_regs];
duke@435 117
duke@435 118 int _framesize;
duke@435 119 int _argcount;
duke@435 120 int _num_monitors;
duke@435 121 int _num_spills;
duke@435 122 int _reserved_argument_area_size;
duke@435 123 int _oop_map_arg_count;
duke@435 124
duke@435 125 CallingConvention* _incoming_arguments;
duke@435 126 intArray* _argument_locations;
duke@435 127
duke@435 128 void check_spill_index (int spill_index) const { assert(spill_index >= 0, "bad index"); }
duke@435 129 void check_monitor_index (int monitor_index) const { assert(monitor_index >= 0 &&
duke@435 130 monitor_index < _num_monitors, "bad index"); }
duke@435 131
duke@435 132 static Register cpu_rnr2reg (int rnr) {
duke@435 133 assert(_init_done, "tables not initialized");
duke@435 134 debug_only(cpu_range_check(rnr);)
duke@435 135 return _cpu_rnr2reg[rnr];
duke@435 136 }
duke@435 137
duke@435 138 static int cpu_reg2rnr (Register reg) {
duke@435 139 assert(_init_done, "tables not initialized");
duke@435 140 debug_only(cpu_range_check(reg->encoding());)
duke@435 141 return _cpu_reg2rnr[reg->encoding()];
duke@435 142 }
duke@435 143
duke@435 144 static void map_register(int rnr, Register reg) {
duke@435 145 debug_only(cpu_range_check(rnr);)
duke@435 146 debug_only(cpu_range_check(reg->encoding());)
duke@435 147 _cpu_rnr2reg[rnr] = reg;
duke@435 148 _cpu_reg2rnr[reg->encoding()] = rnr;
duke@435 149 }
duke@435 150
duke@435 151 void update_reserved_argument_area_size (int size) {
duke@435 152 assert(size >= 0, "check");
duke@435 153 _reserved_argument_area_size = MAX2(_reserved_argument_area_size, size);
duke@435 154 }
duke@435 155
duke@435 156 protected:
duke@435 157 #ifndef PRODUCT
duke@435 158 static void cpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_cpu_regs, "cpu register number is too big"); }
duke@435 159 static void fpu_range_check (int rnr) { assert(0 <= rnr && rnr < nof_fpu_regs, "fpu register number is too big"); }
duke@435 160 #endif
duke@435 161
duke@435 162
duke@435 163 ByteSize sp_offset_for_monitor_base(const int idx) const;
duke@435 164
duke@435 165 Address make_new_address(ByteSize sp_offset) const;
duke@435 166
duke@435 167 ByteSize sp_offset_for_slot(const int idx) const;
duke@435 168 ByteSize sp_offset_for_double_slot(const int idx) const;
duke@435 169 ByteSize sp_offset_for_spill(const int idx) const;
duke@435 170 ByteSize sp_offset_for_monitor_lock(int monitor_index) const;
duke@435 171 ByteSize sp_offset_for_monitor_object(int monitor_index) const;
duke@435 172
duke@435 173 VMReg sp_offset2vmreg(ByteSize offset) const;
duke@435 174
duke@435 175 // platform dependent hook used to check that frame is properly
duke@435 176 // addressable on the platform. Used by sparc to verify that all
duke@435 177 // stack addresses are expressable in a simm13.
duke@435 178 bool validate_frame();
duke@435 179
duke@435 180 static LIR_Opr map_to_opr(BasicType type, VMRegPair* reg, bool incoming);
duke@435 181
duke@435 182 public:
duke@435 183 // Opr representing the stack_pointer on this platform
duke@435 184 static LIR_Opr stack_pointer();
duke@435 185
twisti@1919 186 // JSR 292
twisti@1919 187 static LIR_Opr method_handle_invoke_SP_save_opr();
twisti@1919 188
duke@435 189 static BasicTypeArray* signature_type_array_for(const ciMethod* method);
duke@435 190
duke@435 191 // for outgoing calls, these also update the reserved area to
duke@435 192 // include space for arguments and any ABI area.
twisti@3969 193 CallingConvention* c_calling_convention(const BasicTypeArray* signature);
twisti@3969 194 CallingConvention* java_calling_convention(const BasicTypeArray* signature, bool outgoing);
duke@435 195
duke@435 196 // deopt support
duke@435 197 ByteSize sp_offset_for_orig_pc() { return sp_offset_for_monitor_base(_num_monitors); }
duke@435 198
duke@435 199 static LIR_Opr as_opr(Register r) {
duke@435 200 return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
duke@435 201 }
duke@435 202 static LIR_Opr as_oop_opr(Register r) {
duke@435 203 return LIR_OprFact::single_cpu_oop(cpu_reg2rnr(r));
duke@435 204 }
duke@435 205
roland@4051 206 static LIR_Opr as_metadata_opr(Register r) {
roland@4051 207 return LIR_OprFact::single_cpu_metadata(cpu_reg2rnr(r));
roland@4051 208 }
roland@4051 209
mdoerr@9835 210 static LIR_Opr as_address_opr(Register r) {
mdoerr@9835 211 return LIR_OprFact::single_cpu_address(cpu_reg2rnr(r));
mdoerr@9835 212 }
mdoerr@9835 213
duke@435 214 FrameMap(ciMethod* method, int monitors, int reserved_argument_area_size);
duke@435 215 bool finalize_frame(int nof_slots);
duke@435 216
duke@435 217 int reserved_argument_area_size () const { return _reserved_argument_area_size; }
duke@435 218 int framesize () const { assert(_framesize != -1, "hasn't been calculated"); return _framesize; }
duke@435 219 ByteSize framesize_in_bytes () const { return in_ByteSize(framesize() * 4); }
duke@435 220 int num_monitors () const { return _num_monitors; }
duke@435 221 int num_spills () const { assert(_num_spills >= 0, "not set"); return _num_spills; }
duke@435 222 int argcount () const { assert(_argcount >= 0, "not set"); return _argcount; }
duke@435 223
duke@435 224 int oop_map_arg_count() const { return _oop_map_arg_count; }
duke@435 225
duke@435 226 CallingConvention* incoming_arguments() const { return _incoming_arguments; }
duke@435 227
duke@435 228 // convenience routines
duke@435 229 Address address_for_slot(int index, int sp_adjust = 0) const {
duke@435 230 return make_new_address(sp_offset_for_slot(index) + in_ByteSize(sp_adjust));
duke@435 231 }
duke@435 232 Address address_for_double_slot(int index, int sp_adjust = 0) const {
duke@435 233 return make_new_address(sp_offset_for_double_slot(index) + in_ByteSize(sp_adjust));
duke@435 234 }
duke@435 235 Address address_for_monitor_lock(int monitor_index) const {
duke@435 236 return make_new_address(sp_offset_for_monitor_lock(monitor_index));
duke@435 237 }
duke@435 238 Address address_for_monitor_object(int monitor_index) const {
duke@435 239 return make_new_address(sp_offset_for_monitor_object(monitor_index));
duke@435 240 }
duke@435 241
duke@435 242 // Creates Location describing desired slot and returns it via pointer
duke@435 243 // to Location object. Returns true if the stack frame offset was legal
duke@435 244 // (as defined by Location::legal_offset_in_bytes()), false otherwise.
duke@435 245 // Do not use the returned location if this returns false.
duke@435 246 bool location_for_sp_offset(ByteSize byte_offset_from_sp,
duke@435 247 Location::Type loc_type, Location* loc) const;
duke@435 248
duke@435 249 bool location_for_monitor_lock (int monitor_index, Location* loc) const {
duke@435 250 return location_for_sp_offset(sp_offset_for_monitor_lock(monitor_index), Location::normal, loc);
duke@435 251 }
duke@435 252 bool location_for_monitor_object(int monitor_index, Location* loc) const {
duke@435 253 return location_for_sp_offset(sp_offset_for_monitor_object(monitor_index), Location::oop, loc);
duke@435 254 }
duke@435 255 bool locations_for_slot (int index, Location::Type loc_type,
duke@435 256 Location* loc, Location* second = NULL) const;
duke@435 257
duke@435 258 VMReg slot_regname(int index) const {
duke@435 259 return sp_offset2vmreg(sp_offset_for_slot(index));
duke@435 260 }
duke@435 261 VMReg monitor_object_regname(int monitor_index) const {
duke@435 262 return sp_offset2vmreg(sp_offset_for_monitor_object(monitor_index));
duke@435 263 }
duke@435 264 VMReg regname(LIR_Opr opr) const;
duke@435 265
duke@435 266 static LIR_Opr caller_save_cpu_reg_at(int i) {
iveresov@2344 267 assert(i >= 0 && i < max_nof_caller_save_cpu_regs, "out of bounds");
duke@435 268 return _caller_save_cpu_regs[i];
duke@435 269 }
duke@435 270
duke@435 271 static LIR_Opr caller_save_fpu_reg_at(int i) {
duke@435 272 assert(i >= 0 && i < nof_caller_save_fpu_regs, "out of bounds");
duke@435 273 return _caller_save_fpu_regs[i];
duke@435 274 }
duke@435 275
iveresov@1939 276 static void initialize();
duke@435 277 };
duke@435 278
duke@435 279 // CallingConvention
duke@435 280 //--------------------------------------------------------
duke@435 281
duke@435 282 class CallingConvention: public ResourceObj {
duke@435 283 private:
duke@435 284 LIR_OprList* _args;
duke@435 285 int _reserved_stack_slots;
duke@435 286
duke@435 287 public:
duke@435 288 CallingConvention (LIR_OprList* args, int reserved_stack_slots)
duke@435 289 : _args(args)
duke@435 290 , _reserved_stack_slots(reserved_stack_slots) {}
duke@435 291
duke@435 292 LIR_OprList* args() { return _args; }
duke@435 293
duke@435 294 LIR_Opr at(int i) const { return _args->at(i); }
duke@435 295 int length() const { return _args->length(); }
duke@435 296
duke@435 297 // Indicates number of real frame slots used by arguments passed on stack.
duke@435 298 int reserved_stack_slots() const { return _reserved_stack_slots; }
duke@435 299
duke@435 300 #ifndef PRODUCT
duke@435 301 void print () const {
duke@435 302 for (int i = 0; i < length(); i++) {
duke@435 303 at(i)->print();
duke@435 304 }
duke@435 305 }
duke@435 306 #endif // PRODUCT
duke@435 307 };
stefank@2314 308
stefank@2314 309 #endif // SHARE_VM_C1_C1_FRAMEMAP_HPP

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