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src/cpu/sparc/vm/icBuffer_sparc.cpp@6e5a59a8e4a7 (annotated)

src/cpu/sparc/vm/icBuffer_sparc.cpp

Tue, 09 Oct 2012 07:41:27 +0200

author

rbackman

date

Tue, 09 Oct 2012 07:41:27 +0200

changeset 4151

6e5a59a8e4a7

parent 4037

da91efe96a93

child 4323

f0c2369fda5a

permissions

-rw-r--r--

Merge

duke@435	1	/*
coleenp@4037	2	* Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#include "precompiled.hpp"
stefank@2314	26	#include "asm/assembler.hpp"
stefank@2314	27	#include "assembler_sparc.inline.hpp"
stefank@2314	28	#include "code/icBuffer.hpp"
stefank@2314	29	#include "gc_interface/collectedHeap.inline.hpp"
stefank@2314	30	#include "interpreter/bytecodes.hpp"
stefank@2314	31	#include "memory/resourceArea.hpp"
stefank@2314	32	#include "nativeInst_sparc.hpp"
stefank@2314	33	#include "oops/oop.inline.hpp"
stefank@2314	34	#include "oops/oop.inline2.hpp"
duke@435	35
duke@435	36	int InlineCacheBuffer::ic_stub_code_size() {
duke@435	37	#ifdef _LP64
duke@435	38	if (TraceJumps) return 600 * wordSize;
duke@435	39	return (NativeMovConstReg::instruction_size + // sethi;add
duke@435	40	NativeJump::instruction_size + // sethi; jmp; delay slot
duke@435	41	(1*BytesPerInstWord) + 1); // flush + 1 extra byte
duke@435	42	#else
duke@435	43	if (TraceJumps) return 300 * wordSize;
duke@435	44	return (2+2+ 1) * wordSize + 1; // set/jump_to/nop + 1 byte so that code_end can be set in CodeBuffer
duke@435	45	#endif
duke@435	46	}
duke@435	47
coleenp@4037	48	void InlineCacheBuffer::assemble_ic_buffer_code(address code_begin, void* cached_value, address entry_point) {
duke@435	49	ResourceMark rm;
duke@435	50	CodeBuffer code(code_begin, ic_stub_code_size());
duke@435	51	MacroAssembler* masm = new MacroAssembler(&code);
coleenp@4037	52	// note: even though the code contains an embedded metadata, we do not need reloc info
duke@435	53	// because
coleenp@4037	54	// (1) the metadata is old (i.e., doesn't matter for scavenges)
duke@435	55	// (2) these ICStubs are removed *before* a GC happens, so the roots disappear
coleenp@4037	56	AddressLiteral cached_value_addrlit((address)cached_value, relocInfo::none);
twisti@1162	57	// Force the set to generate the fixed sequence so next_instruction_address works
coleenp@4037	58	masm->patchable_set(cached_value_addrlit, G5_inline_cache_reg);
duke@435	59	assert(G3_scratch != G5_method, "Do not clobber the method oop in the transition stub");
duke@435	60	assert(G3_scratch != G5_inline_cache_reg, "Do not clobber the inline cache register in the transition stub");
twisti@1162	61	AddressLiteral entry(entry_point);
twisti@1162	62	masm->JUMP(entry, G3_scratch, 0);
duke@435	63	masm->delayed()->nop();
duke@435	64	masm->flush();
duke@435	65	}
duke@435	66
duke@435	67
duke@435	68	address InlineCacheBuffer::ic_buffer_entry_point(address code_begin) {
duke@435	69	NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
duke@435	70	NativeJump* jump = nativeJump_at(move->next_instruction_address());
duke@435	71	return jump->jump_destination();
duke@435	72	}
duke@435	73
duke@435	74
coleenp@4037	75	void* InlineCacheBuffer::ic_buffer_cached_value(address code_begin) {
duke@435	76	NativeMovConstReg* move = nativeMovConstReg_at(code_begin); // creation also verifies the object
duke@435	77	NativeJump* jump = nativeJump_at(move->next_instruction_address());
coleenp@4037	78	void* o = (void*)move->data();
coleenp@4037	79	return o;
duke@435	80	}