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src/cpu/x86/vm/assembler_x86.inline.hpp@6ab62ad83507 (annotated)
src/cpu/x86/vm/assembler_x86.inline.hpp
Fri, 30 Nov 2012 11:44:05 -0800
- author
- twisti
- date
- Fri, 30 Nov 2012 11:44:05 -0800
- changeset 4317
- 6ab62ad83507
- parent 3388
- 127b3692c168
- child 4318
- cd3d6a6b95d9
- permissions
- -rw-r--r--
8003195: AbstractAssembler should not store code pointers but use the CodeSection directly
Reviewed-by: twisti, kvn
Contributed-by: Bharadwaj Yadavalli <bharadwaj.yadavalli@oracle.com>
| duke@435 | 1 | /* |
| stefank@2314 | 2 | * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. |
| duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| duke@435 | 4 | * |
| duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
| duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
| duke@435 | 7 | * published by the Free Software Foundation. |
| duke@435 | 8 | * |
| duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
| duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
| duke@435 | 13 | * accompanied this code). |
| duke@435 | 14 | * |
| duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
| duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
| duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
| duke@435 | 18 | * |
| trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
| trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
| trims@1907 | 21 | * questions. |
| duke@435 | 22 | * |
| duke@435 | 23 | */ |
| duke@435 | 24 | |
| stefank@2314 | 25 | #ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP |
| stefank@2314 | 26 | #define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP |
| stefank@2314 | 27 | |
| stefank@2314 | 28 | #include "asm/assembler.inline.hpp" |
| stefank@2314 | 29 | #include "asm/codeBuffer.hpp" |
| stefank@2314 | 30 | #include "code/codeCache.hpp" |
| stefank@2314 | 31 | #include "runtime/handles.inline.hpp" |
| stefank@2314 | 32 | |
| duke@435 | 33 | inline void MacroAssembler::pd_patch_instruction(address branch, address target) { |
| duke@435 | 34 | unsigned char op = branch[0]; |
| duke@435 | 35 | assert(op == 0xE8 /* call */ || |
| duke@435 | 36 | op == 0xE9 /* jmp */ || |
| duke@435 | 37 | op == 0xEB /* short jmp */ || |
| duke@435 | 38 | (op & 0xF0) == 0x70 /* short jcc */ || |
| duke@435 | 39 | op == 0x0F && (branch[1] & 0xF0) == 0x80 /* jcc */, |
| duke@435 | 40 | "Invalid opcode at patch point"); |
| duke@435 | 41 | |
| duke@435 | 42 | if (op == 0xEB || (op & 0xF0) == 0x70) { |
| duke@435 | 43 | // short offset operators (jmp and jcc) |
| duke@435 | 44 | char* disp = (char*) &branch[1]; |
| duke@435 | 45 | int imm8 = target - (address) &disp[1]; |
| duke@435 | 46 | guarantee(this->is8bit(imm8), "Short forward jump exceeds 8-bit offset"); |
| duke@435 | 47 | *disp = imm8; |
| duke@435 | 48 | } else { |
| duke@435 | 49 | int* disp = (int*) &branch[(op == 0x0F)? 2: 1]; |
| duke@435 | 50 | int imm32 = target - (address) &disp[1]; |
| duke@435 | 51 | *disp = imm32; |
| duke@435 | 52 | } |
| duke@435 | 53 | } |
| duke@435 | 54 | |
| duke@435 | 55 | #ifndef PRODUCT |
| duke@435 | 56 | inline void MacroAssembler::pd_print_patched_instruction(address branch) { |
| duke@435 | 57 | const char* s; |
| duke@435 | 58 | unsigned char op = branch[0]; |
| duke@435 | 59 | if (op == 0xE8) { |
| duke@435 | 60 | s = "call"; |
| duke@435 | 61 | } else if (op == 0xE9 || op == 0xEB) { |
| duke@435 | 62 | s = "jmp"; |
| duke@435 | 63 | } else if ((op & 0xF0) == 0x70) { |
| duke@435 | 64 | s = "jcc"; |
| duke@435 | 65 | } else if (op == 0x0F) { |
| duke@435 | 66 | s = "jcc"; |
| duke@435 | 67 | } else { |
| duke@435 | 68 | s = "????"; |
| duke@435 | 69 | } |
| duke@435 | 70 | tty->print("%s (unresolved)", s); |
| duke@435 | 71 | } |
| duke@435 | 72 | #endif // ndef PRODUCT |
| never@739 | 73 | |
| never@739 | 74 | #ifndef _LP64 |
| never@739 | 75 | inline int Assembler::prefix_and_encode(int reg_enc, bool byteinst) { return reg_enc; } |
| never@739 | 76 | inline int Assembler::prefixq_and_encode(int reg_enc) { return reg_enc; } |
| never@739 | 77 | |
| never@739 | 78 | inline int Assembler::prefix_and_encode(int dst_enc, int src_enc, bool byteinst) { return dst_enc << 3 | src_enc; } |
| never@739 | 79 | inline int Assembler::prefixq_and_encode(int dst_enc, int src_enc) { return dst_enc << 3 | src_enc; } |
| never@739 | 80 | |
| never@739 | 81 | inline void Assembler::prefix(Register reg) {} |
| never@739 | 82 | inline void Assembler::prefix(Address adr) {} |
| never@739 | 83 | inline void Assembler::prefixq(Address adr) {} |
| never@739 | 84 | |
| never@739 | 85 | inline void Assembler::prefix(Address adr, Register reg, bool byteinst) {} |
| never@739 | 86 | inline void Assembler::prefixq(Address adr, Register reg) {} |
| never@739 | 87 | |
| never@739 | 88 | inline void Assembler::prefix(Address adr, XMMRegister reg) {} |
| kvn@3388 | 89 | inline void Assembler::prefixq(Address adr, XMMRegister reg) {} |
| never@739 | 90 | #endif // _LP64 |
| stefank@2314 | 91 | |
| stefank@2314 | 92 | #endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP |
