Thu, 14 Apr 2011 13:45:41 -0700
Merge
duke@435 | 1 | /* |
stefank@2314 | 2 | * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #include "precompiled.hpp" |
stefank@2314 | 26 | #include "c1/c1_Instruction.hpp" |
stefank@2314 | 27 | #include "c1/c1_LinearScan.hpp" |
stefank@2314 | 28 | #include "utilities/bitMap.inline.hpp" |
duke@435 | 29 | |
duke@435 | 30 | |
duke@435 | 31 | //---------------------------------------------------------------------- |
duke@435 | 32 | // Allocation of FPU stack slots (Intel x86 only) |
duke@435 | 33 | //---------------------------------------------------------------------- |
duke@435 | 34 | |
duke@435 | 35 | void LinearScan::allocate_fpu_stack() { |
duke@435 | 36 | // First compute which FPU registers are live at the start of each basic block |
duke@435 | 37 | // (To minimize the amount of work we have to do if we have to merge FPU stacks) |
duke@435 | 38 | if (ComputeExactFPURegisterUsage) { |
duke@435 | 39 | Interval* intervals_in_register, *intervals_in_memory; |
duke@435 | 40 | create_unhandled_lists(&intervals_in_register, &intervals_in_memory, is_in_fpu_register, NULL); |
duke@435 | 41 | |
duke@435 | 42 | // ignore memory intervals by overwriting intervals_in_memory |
duke@435 | 43 | // the dummy interval is needed to enforce the walker to walk until the given id: |
duke@435 | 44 | // without it, the walker stops when the unhandled-list is empty -> live information |
duke@435 | 45 | // beyond this point would be incorrect. |
duke@435 | 46 | Interval* dummy_interval = new Interval(any_reg); |
duke@435 | 47 | dummy_interval->add_range(max_jint - 2, max_jint - 1); |
duke@435 | 48 | dummy_interval->set_next(Interval::end()); |
duke@435 | 49 | intervals_in_memory = dummy_interval; |
duke@435 | 50 | |
duke@435 | 51 | IntervalWalker iw(this, intervals_in_register, intervals_in_memory); |
duke@435 | 52 | |
duke@435 | 53 | const int num_blocks = block_count(); |
duke@435 | 54 | for (int i = 0; i < num_blocks; i++) { |
duke@435 | 55 | BlockBegin* b = block_at(i); |
duke@435 | 56 | |
duke@435 | 57 | // register usage is only needed for merging stacks -> compute only |
duke@435 | 58 | // when more than one predecessor. |
duke@435 | 59 | // the block must not have any spill moves at the beginning (checked by assertions) |
duke@435 | 60 | // spill moves would use intervals that are marked as handled and so the usage bit |
duke@435 | 61 | // would been set incorrectly |
duke@435 | 62 | |
duke@435 | 63 | // NOTE: the check for number_of_preds > 1 is necessary. A block with only one |
duke@435 | 64 | // predecessor may have spill moves at the begin of the block. |
duke@435 | 65 | // If an interval ends at the current instruction id, it is not possible |
duke@435 | 66 | // to decide if the register is live or not at the block begin -> the |
duke@435 | 67 | // register information would be incorrect. |
duke@435 | 68 | if (b->number_of_preds() > 1) { |
duke@435 | 69 | int id = b->first_lir_instruction_id(); |
duke@435 | 70 | BitMap regs(FrameMap::nof_fpu_regs); |
duke@435 | 71 | regs.clear(); |
duke@435 | 72 | |
duke@435 | 73 | iw.walk_to(id); // walk after the first instruction (always a label) of the block |
duke@435 | 74 | assert(iw.current_position() == id, "did not walk completely to id"); |
duke@435 | 75 | |
duke@435 | 76 | // Only consider FPU values in registers |
duke@435 | 77 | Interval* interval = iw.active_first(fixedKind); |
duke@435 | 78 | while (interval != Interval::end()) { |
duke@435 | 79 | int reg = interval->assigned_reg(); |
duke@435 | 80 | assert(reg >= pd_first_fpu_reg && reg <= pd_last_fpu_reg, "no fpu register"); |
duke@435 | 81 | assert(interval->assigned_regHi() == -1, "must not have hi register (doubles stored in one register)"); |
duke@435 | 82 | assert(interval->from() <= id && id < interval->to(), "interval out of range"); |
duke@435 | 83 | |
duke@435 | 84 | #ifndef PRODUCT |
duke@435 | 85 | if (TraceFPURegisterUsage) { |
duke@435 | 86 | tty->print("fpu reg %d is live because of ", reg - pd_first_fpu_reg); interval->print(); |
duke@435 | 87 | } |
duke@435 | 88 | #endif |
duke@435 | 89 | |
duke@435 | 90 | regs.set_bit(reg - pd_first_fpu_reg); |
duke@435 | 91 | interval = interval->next(); |
duke@435 | 92 | } |
duke@435 | 93 | |
duke@435 | 94 | b->set_fpu_register_usage(regs); |
duke@435 | 95 | |
duke@435 | 96 | #ifndef PRODUCT |
duke@435 | 97 | if (TraceFPURegisterUsage) { |
duke@435 | 98 | tty->print("FPU regs for block %d, LIR instr %d): ", b->block_id(), id); regs.print_on(tty); tty->print_cr(""); |
duke@435 | 99 | } |
duke@435 | 100 | #endif |
duke@435 | 101 | } |
duke@435 | 102 | } |
duke@435 | 103 | } |
duke@435 | 104 | |
duke@435 | 105 | FpuStackAllocator alloc(ir()->compilation(), this); |
duke@435 | 106 | _fpu_stack_allocator = &alloc; |
duke@435 | 107 | alloc.allocate(); |
duke@435 | 108 | _fpu_stack_allocator = NULL; |
duke@435 | 109 | } |
duke@435 | 110 | |
duke@435 | 111 | |
duke@435 | 112 | FpuStackAllocator::FpuStackAllocator(Compilation* compilation, LinearScan* allocator) |
duke@435 | 113 | : _compilation(compilation) |
duke@435 | 114 | , _lir(NULL) |
duke@435 | 115 | , _pos(-1) |
duke@435 | 116 | , _allocator(allocator) |
duke@435 | 117 | , _sim(compilation) |
duke@435 | 118 | , _temp_sim(compilation) |
duke@435 | 119 | {} |
duke@435 | 120 | |
duke@435 | 121 | void FpuStackAllocator::allocate() { |
duke@435 | 122 | int num_blocks = allocator()->block_count(); |
duke@435 | 123 | for (int i = 0; i < num_blocks; i++) { |
duke@435 | 124 | // Set up to process block |
duke@435 | 125 | BlockBegin* block = allocator()->block_at(i); |
duke@435 | 126 | intArray* fpu_stack_state = block->fpu_stack_state(); |
duke@435 | 127 | |
duke@435 | 128 | #ifndef PRODUCT |
duke@435 | 129 | if (TraceFPUStack) { |
duke@435 | 130 | tty->cr(); |
duke@435 | 131 | tty->print_cr("------- Begin of new Block %d -------", block->block_id()); |
duke@435 | 132 | } |
duke@435 | 133 | #endif |
duke@435 | 134 | |
duke@435 | 135 | assert(fpu_stack_state != NULL || |
duke@435 | 136 | block->end()->as_Base() != NULL || |
duke@435 | 137 | block->is_set(BlockBegin::exception_entry_flag), |
duke@435 | 138 | "FPU stack state must be present due to linear-scan order for FPU stack allocation"); |
duke@435 | 139 | // note: exception handler entries always start with an empty fpu stack |
duke@435 | 140 | // because stack merging would be too complicated |
duke@435 | 141 | |
duke@435 | 142 | if (fpu_stack_state != NULL) { |
duke@435 | 143 | sim()->read_state(fpu_stack_state); |
duke@435 | 144 | } else { |
duke@435 | 145 | sim()->clear(); |
duke@435 | 146 | } |
duke@435 | 147 | |
duke@435 | 148 | #ifndef PRODUCT |
duke@435 | 149 | if (TraceFPUStack) { |
duke@435 | 150 | tty->print("Reading FPU state for block %d:", block->block_id()); |
duke@435 | 151 | sim()->print(); |
duke@435 | 152 | tty->cr(); |
duke@435 | 153 | } |
duke@435 | 154 | #endif |
duke@435 | 155 | |
duke@435 | 156 | allocate_block(block); |
duke@435 | 157 | CHECK_BAILOUT(); |
duke@435 | 158 | } |
duke@435 | 159 | } |
duke@435 | 160 | |
duke@435 | 161 | void FpuStackAllocator::allocate_block(BlockBegin* block) { |
duke@435 | 162 | bool processed_merge = false; |
duke@435 | 163 | LIR_OpList* insts = block->lir()->instructions_list(); |
duke@435 | 164 | set_lir(block->lir()); |
duke@435 | 165 | set_pos(0); |
duke@435 | 166 | |
duke@435 | 167 | |
duke@435 | 168 | // Note: insts->length() may change during loop |
duke@435 | 169 | while (pos() < insts->length()) { |
duke@435 | 170 | LIR_Op* op = insts->at(pos()); |
duke@435 | 171 | _debug_information_computed = false; |
duke@435 | 172 | |
duke@435 | 173 | #ifndef PRODUCT |
duke@435 | 174 | if (TraceFPUStack) { |
duke@435 | 175 | op->print(); |
duke@435 | 176 | } |
duke@435 | 177 | check_invalid_lir_op(op); |
duke@435 | 178 | #endif |
duke@435 | 179 | |
duke@435 | 180 | LIR_OpBranch* branch = op->as_OpBranch(); |
duke@435 | 181 | LIR_Op1* op1 = op->as_Op1(); |
duke@435 | 182 | LIR_Op2* op2 = op->as_Op2(); |
duke@435 | 183 | LIR_OpCall* opCall = op->as_OpCall(); |
duke@435 | 184 | |
duke@435 | 185 | if (branch != NULL && branch->block() != NULL) { |
duke@435 | 186 | if (!processed_merge) { |
duke@435 | 187 | // propagate stack at first branch to a successor |
duke@435 | 188 | processed_merge = true; |
duke@435 | 189 | bool required_merge = merge_fpu_stack_with_successors(block); |
duke@435 | 190 | |
duke@435 | 191 | assert(!required_merge || branch->cond() == lir_cond_always, "splitting of critical edges should prevent FPU stack mismatches at cond branches"); |
duke@435 | 192 | } |
duke@435 | 193 | |
duke@435 | 194 | } else if (op1 != NULL) { |
duke@435 | 195 | handle_op1(op1); |
duke@435 | 196 | } else if (op2 != NULL) { |
duke@435 | 197 | handle_op2(op2); |
duke@435 | 198 | } else if (opCall != NULL) { |
duke@435 | 199 | handle_opCall(opCall); |
duke@435 | 200 | } |
duke@435 | 201 | |
duke@435 | 202 | compute_debug_information(op); |
duke@435 | 203 | |
duke@435 | 204 | set_pos(1 + pos()); |
duke@435 | 205 | } |
duke@435 | 206 | |
duke@435 | 207 | // Propagate stack when block does not end with branch |
duke@435 | 208 | if (!processed_merge) { |
duke@435 | 209 | merge_fpu_stack_with_successors(block); |
duke@435 | 210 | } |
duke@435 | 211 | } |
duke@435 | 212 | |
duke@435 | 213 | |
duke@435 | 214 | void FpuStackAllocator::compute_debug_information(LIR_Op* op) { |
duke@435 | 215 | if (!_debug_information_computed && op->id() != -1 && allocator()->has_info(op->id())) { |
duke@435 | 216 | visitor.visit(op); |
duke@435 | 217 | |
duke@435 | 218 | // exception handling |
duke@435 | 219 | if (allocator()->compilation()->has_exception_handlers()) { |
duke@435 | 220 | XHandlers* xhandlers = visitor.all_xhandler(); |
duke@435 | 221 | int n = xhandlers->length(); |
duke@435 | 222 | for (int k = 0; k < n; k++) { |
duke@435 | 223 | allocate_exception_handler(xhandlers->handler_at(k)); |
duke@435 | 224 | } |
duke@435 | 225 | } else { |
duke@435 | 226 | assert(visitor.all_xhandler()->length() == 0, "missed exception handler"); |
duke@435 | 227 | } |
duke@435 | 228 | |
duke@435 | 229 | // compute debug information |
duke@435 | 230 | int n = visitor.info_count(); |
duke@435 | 231 | assert(n > 0, "should not visit operation otherwise"); |
duke@435 | 232 | |
duke@435 | 233 | for (int j = 0; j < n; j++) { |
duke@435 | 234 | CodeEmitInfo* info = visitor.info_at(j); |
duke@435 | 235 | // Compute debug information |
duke@435 | 236 | allocator()->compute_debug_info(info, op->id()); |
duke@435 | 237 | } |
duke@435 | 238 | } |
duke@435 | 239 | _debug_information_computed = true; |
duke@435 | 240 | } |
duke@435 | 241 | |
duke@435 | 242 | void FpuStackAllocator::allocate_exception_handler(XHandler* xhandler) { |
duke@435 | 243 | if (!sim()->is_empty()) { |
duke@435 | 244 | LIR_List* old_lir = lir(); |
duke@435 | 245 | int old_pos = pos(); |
duke@435 | 246 | intArray* old_state = sim()->write_state(); |
duke@435 | 247 | |
duke@435 | 248 | #ifndef PRODUCT |
duke@435 | 249 | if (TraceFPUStack) { |
duke@435 | 250 | tty->cr(); |
duke@435 | 251 | tty->print_cr("------- begin of exception handler -------"); |
duke@435 | 252 | } |
duke@435 | 253 | #endif |
duke@435 | 254 | |
duke@435 | 255 | if (xhandler->entry_code() == NULL) { |
duke@435 | 256 | // need entry code to clear FPU stack |
duke@435 | 257 | LIR_List* entry_code = new LIR_List(_compilation); |
duke@435 | 258 | entry_code->jump(xhandler->entry_block()); |
duke@435 | 259 | xhandler->set_entry_code(entry_code); |
duke@435 | 260 | } |
duke@435 | 261 | |
duke@435 | 262 | LIR_OpList* insts = xhandler->entry_code()->instructions_list(); |
duke@435 | 263 | set_lir(xhandler->entry_code()); |
duke@435 | 264 | set_pos(0); |
duke@435 | 265 | |
duke@435 | 266 | // Note: insts->length() may change during loop |
duke@435 | 267 | while (pos() < insts->length()) { |
duke@435 | 268 | LIR_Op* op = insts->at(pos()); |
duke@435 | 269 | |
duke@435 | 270 | #ifndef PRODUCT |
duke@435 | 271 | if (TraceFPUStack) { |
duke@435 | 272 | op->print(); |
duke@435 | 273 | } |
duke@435 | 274 | check_invalid_lir_op(op); |
duke@435 | 275 | #endif |
duke@435 | 276 | |
duke@435 | 277 | switch (op->code()) { |
duke@435 | 278 | case lir_move: |
duke@435 | 279 | assert(op->as_Op1() != NULL, "must be LIR_Op1"); |
duke@435 | 280 | assert(pos() != insts->length() - 1, "must not be last operation"); |
duke@435 | 281 | |
duke@435 | 282 | handle_op1((LIR_Op1*)op); |
duke@435 | 283 | break; |
duke@435 | 284 | |
duke@435 | 285 | case lir_branch: |
duke@435 | 286 | assert(op->as_OpBranch()->cond() == lir_cond_always, "must be unconditional branch"); |
duke@435 | 287 | assert(pos() == insts->length() - 1, "must be last operation"); |
duke@435 | 288 | |
duke@435 | 289 | // remove all remaining dead registers from FPU stack |
duke@435 | 290 | clear_fpu_stack(LIR_OprFact::illegalOpr); |
duke@435 | 291 | break; |
duke@435 | 292 | |
duke@435 | 293 | default: |
duke@435 | 294 | // other operations not allowed in exception entry code |
duke@435 | 295 | ShouldNotReachHere(); |
duke@435 | 296 | } |
duke@435 | 297 | |
duke@435 | 298 | set_pos(pos() + 1); |
duke@435 | 299 | } |
duke@435 | 300 | |
duke@435 | 301 | #ifndef PRODUCT |
duke@435 | 302 | if (TraceFPUStack) { |
duke@435 | 303 | tty->cr(); |
duke@435 | 304 | tty->print_cr("------- end of exception handler -------"); |
duke@435 | 305 | } |
duke@435 | 306 | #endif |
duke@435 | 307 | |
duke@435 | 308 | set_lir(old_lir); |
duke@435 | 309 | set_pos(old_pos); |
duke@435 | 310 | sim()->read_state(old_state); |
duke@435 | 311 | } |
duke@435 | 312 | } |
duke@435 | 313 | |
duke@435 | 314 | |
duke@435 | 315 | int FpuStackAllocator::fpu_num(LIR_Opr opr) { |
duke@435 | 316 | assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't call this otherwise"); |
duke@435 | 317 | return opr->is_single_fpu() ? opr->fpu_regnr() : opr->fpu_regnrLo(); |
duke@435 | 318 | } |
duke@435 | 319 | |
duke@435 | 320 | int FpuStackAllocator::tos_offset(LIR_Opr opr) { |
duke@435 | 321 | return sim()->offset_from_tos(fpu_num(opr)); |
duke@435 | 322 | } |
duke@435 | 323 | |
duke@435 | 324 | |
duke@435 | 325 | LIR_Opr FpuStackAllocator::to_fpu_stack(LIR_Opr opr) { |
duke@435 | 326 | assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't call this otherwise"); |
duke@435 | 327 | |
duke@435 | 328 | int stack_offset = tos_offset(opr); |
duke@435 | 329 | if (opr->is_single_fpu()) { |
duke@435 | 330 | return LIR_OprFact::single_fpu(stack_offset)->make_fpu_stack_offset(); |
duke@435 | 331 | } else { |
duke@435 | 332 | assert(opr->is_double_fpu(), "shouldn't call this otherwise"); |
duke@435 | 333 | return LIR_OprFact::double_fpu(stack_offset)->make_fpu_stack_offset(); |
duke@435 | 334 | } |
duke@435 | 335 | } |
duke@435 | 336 | |
duke@435 | 337 | LIR_Opr FpuStackAllocator::to_fpu_stack_top(LIR_Opr opr, bool dont_check_offset) { |
duke@435 | 338 | assert(opr->is_fpu_register() && !opr->is_xmm_register(), "shouldn't call this otherwise"); |
duke@435 | 339 | assert(dont_check_offset || tos_offset(opr) == 0, "operand is not on stack top"); |
duke@435 | 340 | |
duke@435 | 341 | int stack_offset = 0; |
duke@435 | 342 | if (opr->is_single_fpu()) { |
duke@435 | 343 | return LIR_OprFact::single_fpu(stack_offset)->make_fpu_stack_offset(); |
duke@435 | 344 | } else { |
duke@435 | 345 | assert(opr->is_double_fpu(), "shouldn't call this otherwise"); |
duke@435 | 346 | return LIR_OprFact::double_fpu(stack_offset)->make_fpu_stack_offset(); |
duke@435 | 347 | } |
duke@435 | 348 | } |
duke@435 | 349 | |
duke@435 | 350 | |
duke@435 | 351 | |
duke@435 | 352 | void FpuStackAllocator::insert_op(LIR_Op* op) { |
duke@435 | 353 | lir()->insert_before(pos(), op); |
duke@435 | 354 | set_pos(1 + pos()); |
duke@435 | 355 | } |
duke@435 | 356 | |
duke@435 | 357 | |
duke@435 | 358 | void FpuStackAllocator::insert_exchange(int offset) { |
duke@435 | 359 | if (offset > 0) { |
duke@435 | 360 | LIR_Op1* fxch_op = new LIR_Op1(lir_fxch, LIR_OprFact::intConst(offset), LIR_OprFact::illegalOpr); |
duke@435 | 361 | insert_op(fxch_op); |
duke@435 | 362 | sim()->swap(offset); |
duke@435 | 363 | |
duke@435 | 364 | #ifndef PRODUCT |
duke@435 | 365 | if (TraceFPUStack) { |
duke@435 | 366 | tty->print("Exchanged register: %d New state: ", sim()->get_slot(0)); sim()->print(); tty->cr(); |
duke@435 | 367 | } |
duke@435 | 368 | #endif |
duke@435 | 369 | |
duke@435 | 370 | } |
duke@435 | 371 | } |
duke@435 | 372 | |
duke@435 | 373 | void FpuStackAllocator::insert_exchange(LIR_Opr opr) { |
duke@435 | 374 | insert_exchange(tos_offset(opr)); |
duke@435 | 375 | } |
duke@435 | 376 | |
duke@435 | 377 | |
duke@435 | 378 | void FpuStackAllocator::insert_free(int offset) { |
duke@435 | 379 | // move stack slot to the top of stack and then pop it |
duke@435 | 380 | insert_exchange(offset); |
duke@435 | 381 | |
duke@435 | 382 | LIR_Op* fpop = new LIR_Op0(lir_fpop_raw); |
duke@435 | 383 | insert_op(fpop); |
duke@435 | 384 | sim()->pop(); |
duke@435 | 385 | |
duke@435 | 386 | #ifndef PRODUCT |
duke@435 | 387 | if (TraceFPUStack) { |
duke@435 | 388 | tty->print("Inserted pop New state: "); sim()->print(); tty->cr(); |
duke@435 | 389 | } |
duke@435 | 390 | #endif |
duke@435 | 391 | } |
duke@435 | 392 | |
duke@435 | 393 | |
duke@435 | 394 | void FpuStackAllocator::insert_free_if_dead(LIR_Opr opr) { |
duke@435 | 395 | if (sim()->contains(fpu_num(opr))) { |
duke@435 | 396 | int res_slot = tos_offset(opr); |
duke@435 | 397 | insert_free(res_slot); |
duke@435 | 398 | } |
duke@435 | 399 | } |
duke@435 | 400 | |
duke@435 | 401 | void FpuStackAllocator::insert_free_if_dead(LIR_Opr opr, LIR_Opr ignore) { |
duke@435 | 402 | if (fpu_num(opr) != fpu_num(ignore) && sim()->contains(fpu_num(opr))) { |
duke@435 | 403 | int res_slot = tos_offset(opr); |
duke@435 | 404 | insert_free(res_slot); |
duke@435 | 405 | } |
duke@435 | 406 | } |
duke@435 | 407 | |
duke@435 | 408 | void FpuStackAllocator::insert_copy(LIR_Opr from, LIR_Opr to) { |
duke@435 | 409 | int offset = tos_offset(from); |
duke@435 | 410 | LIR_Op1* fld = new LIR_Op1(lir_fld, LIR_OprFact::intConst(offset), LIR_OprFact::illegalOpr); |
duke@435 | 411 | insert_op(fld); |
duke@435 | 412 | |
duke@435 | 413 | sim()->push(fpu_num(to)); |
duke@435 | 414 | |
duke@435 | 415 | #ifndef PRODUCT |
duke@435 | 416 | if (TraceFPUStack) { |
duke@435 | 417 | tty->print("Inserted copy (%d -> %d) New state: ", fpu_num(from), fpu_num(to)); sim()->print(); tty->cr(); |
duke@435 | 418 | } |
duke@435 | 419 | #endif |
duke@435 | 420 | } |
duke@435 | 421 | |
duke@435 | 422 | void FpuStackAllocator::do_rename(LIR_Opr from, LIR_Opr to) { |
duke@435 | 423 | sim()->rename(fpu_num(from), fpu_num(to)); |
duke@435 | 424 | } |
duke@435 | 425 | |
duke@435 | 426 | void FpuStackAllocator::do_push(LIR_Opr opr) { |
duke@435 | 427 | sim()->push(fpu_num(opr)); |
duke@435 | 428 | } |
duke@435 | 429 | |
duke@435 | 430 | void FpuStackAllocator::pop_if_last_use(LIR_Op* op, LIR_Opr opr) { |
duke@435 | 431 | assert(op->fpu_pop_count() == 0, "fpu_pop_count alredy set"); |
duke@435 | 432 | assert(tos_offset(opr) == 0, "can only pop stack top"); |
duke@435 | 433 | |
duke@435 | 434 | if (opr->is_last_use()) { |
duke@435 | 435 | op->set_fpu_pop_count(1); |
duke@435 | 436 | sim()->pop(); |
duke@435 | 437 | } |
duke@435 | 438 | } |
duke@435 | 439 | |
duke@435 | 440 | void FpuStackAllocator::pop_always(LIR_Op* op, LIR_Opr opr) { |
duke@435 | 441 | assert(op->fpu_pop_count() == 0, "fpu_pop_count alredy set"); |
duke@435 | 442 | assert(tos_offset(opr) == 0, "can only pop stack top"); |
duke@435 | 443 | |
duke@435 | 444 | op->set_fpu_pop_count(1); |
duke@435 | 445 | sim()->pop(); |
duke@435 | 446 | } |
duke@435 | 447 | |
duke@435 | 448 | void FpuStackAllocator::clear_fpu_stack(LIR_Opr preserve) { |
duke@435 | 449 | int result_stack_size = (preserve->is_fpu_register() && !preserve->is_xmm_register() ? 1 : 0); |
duke@435 | 450 | while (sim()->stack_size() > result_stack_size) { |
duke@435 | 451 | assert(!sim()->slot_is_empty(0), "not allowed"); |
duke@435 | 452 | |
duke@435 | 453 | if (result_stack_size == 0 || sim()->get_slot(0) != fpu_num(preserve)) { |
duke@435 | 454 | insert_free(0); |
duke@435 | 455 | } else { |
duke@435 | 456 | // move "preserve" to bottom of stack so that all other stack slots can be popped |
duke@435 | 457 | insert_exchange(sim()->stack_size() - 1); |
duke@435 | 458 | } |
duke@435 | 459 | } |
duke@435 | 460 | } |
duke@435 | 461 | |
duke@435 | 462 | |
duke@435 | 463 | void FpuStackAllocator::handle_op1(LIR_Op1* op1) { |
duke@435 | 464 | LIR_Opr in = op1->in_opr(); |
duke@435 | 465 | LIR_Opr res = op1->result_opr(); |
duke@435 | 466 | |
duke@435 | 467 | LIR_Opr new_in = in; // new operands relative to the actual fpu stack top |
duke@435 | 468 | LIR_Opr new_res = res; |
duke@435 | 469 | |
duke@435 | 470 | // Note: this switch is processed for all LIR_Op1, regardless if they have FPU-arguments, |
duke@435 | 471 | // so checks for is_float_kind() are necessary inside the cases |
duke@435 | 472 | switch (op1->code()) { |
duke@435 | 473 | |
duke@435 | 474 | case lir_return: { |
duke@435 | 475 | // FPU-Stack must only contain the (optional) fpu return value. |
duke@435 | 476 | // All remaining dead values are popped from the stack |
duke@435 | 477 | // If the input operand is a fpu-register, it is exchanged to the bottom of the stack |
duke@435 | 478 | |
duke@435 | 479 | clear_fpu_stack(in); |
duke@435 | 480 | if (in->is_fpu_register() && !in->is_xmm_register()) { |
duke@435 | 481 | new_in = to_fpu_stack_top(in); |
duke@435 | 482 | } |
duke@435 | 483 | |
duke@435 | 484 | break; |
duke@435 | 485 | } |
duke@435 | 486 | |
duke@435 | 487 | case lir_move: { |
duke@435 | 488 | if (in->is_fpu_register() && !in->is_xmm_register()) { |
duke@435 | 489 | if (res->is_xmm_register()) { |
duke@435 | 490 | // move from fpu register to xmm register (necessary for operations that |
duke@435 | 491 | // are not available in the SSE instruction set) |
duke@435 | 492 | insert_exchange(in); |
duke@435 | 493 | new_in = to_fpu_stack_top(in); |
duke@435 | 494 | pop_always(op1, in); |
duke@435 | 495 | |
duke@435 | 496 | } else if (res->is_fpu_register() && !res->is_xmm_register()) { |
duke@435 | 497 | // move from fpu-register to fpu-register: |
duke@435 | 498 | // * input and result register equal: |
duke@435 | 499 | // nothing to do |
duke@435 | 500 | // * input register is last use: |
duke@435 | 501 | // rename the input register to result register -> input register |
duke@435 | 502 | // not present on fpu-stack afterwards |
duke@435 | 503 | // * input register not last use: |
duke@435 | 504 | // duplicate input register to result register to preserve input |
duke@435 | 505 | // |
duke@435 | 506 | // Note: The LIR-Assembler does not produce any code for fpu register moves, |
duke@435 | 507 | // so input and result stack index must be equal |
duke@435 | 508 | |
duke@435 | 509 | if (fpu_num(in) == fpu_num(res)) { |
duke@435 | 510 | // nothing to do |
duke@435 | 511 | } else if (in->is_last_use()) { |
duke@435 | 512 | insert_free_if_dead(res);//, in); |
duke@435 | 513 | do_rename(in, res); |
duke@435 | 514 | } else { |
duke@435 | 515 | insert_free_if_dead(res); |
duke@435 | 516 | insert_copy(in, res); |
duke@435 | 517 | } |
duke@435 | 518 | new_in = to_fpu_stack(res); |
duke@435 | 519 | new_res = new_in; |
duke@435 | 520 | |
duke@435 | 521 | } else { |
duke@435 | 522 | // move from fpu-register to memory |
duke@435 | 523 | // input operand must be on top of stack |
duke@435 | 524 | |
duke@435 | 525 | insert_exchange(in); |
duke@435 | 526 | |
duke@435 | 527 | // create debug information here because afterwards the register may have been popped |
duke@435 | 528 | compute_debug_information(op1); |
duke@435 | 529 | |
duke@435 | 530 | new_in = to_fpu_stack_top(in); |
duke@435 | 531 | pop_if_last_use(op1, in); |
duke@435 | 532 | } |
duke@435 | 533 | |
duke@435 | 534 | } else if (res->is_fpu_register() && !res->is_xmm_register()) { |
duke@435 | 535 | // move from memory/constant to fpu register |
duke@435 | 536 | // result is pushed on the stack |
duke@435 | 537 | |
duke@435 | 538 | insert_free_if_dead(res); |
duke@435 | 539 | |
duke@435 | 540 | // create debug information before register is pushed |
duke@435 | 541 | compute_debug_information(op1); |
duke@435 | 542 | |
duke@435 | 543 | do_push(res); |
duke@435 | 544 | new_res = to_fpu_stack_top(res); |
duke@435 | 545 | } |
duke@435 | 546 | break; |
duke@435 | 547 | } |
duke@435 | 548 | |
duke@435 | 549 | case lir_neg: { |
duke@435 | 550 | if (in->is_fpu_register() && !in->is_xmm_register()) { |
duke@435 | 551 | assert(res->is_fpu_register() && !res->is_xmm_register(), "must be"); |
duke@435 | 552 | assert(in->is_last_use(), "old value gets destroyed"); |
duke@435 | 553 | |
duke@435 | 554 | insert_free_if_dead(res, in); |
duke@435 | 555 | insert_exchange(in); |
duke@435 | 556 | new_in = to_fpu_stack_top(in); |
duke@435 | 557 | |
duke@435 | 558 | do_rename(in, res); |
duke@435 | 559 | new_res = to_fpu_stack_top(res); |
duke@435 | 560 | } |
duke@435 | 561 | break; |
duke@435 | 562 | } |
duke@435 | 563 | |
duke@435 | 564 | case lir_convert: { |
duke@435 | 565 | Bytecodes::Code bc = op1->as_OpConvert()->bytecode(); |
duke@435 | 566 | switch (bc) { |
duke@435 | 567 | case Bytecodes::_d2f: |
duke@435 | 568 | case Bytecodes::_f2d: |
duke@435 | 569 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 570 | assert(in->is_fpu_register(), "must be"); |
duke@435 | 571 | |
duke@435 | 572 | if (!in->is_xmm_register() && !res->is_xmm_register()) { |
duke@435 | 573 | // this is quite the same as a move from fpu-register to fpu-register |
duke@435 | 574 | // Note: input and result operands must have different types |
duke@435 | 575 | if (fpu_num(in) == fpu_num(res)) { |
duke@435 | 576 | // nothing to do |
duke@435 | 577 | new_in = to_fpu_stack(in); |
duke@435 | 578 | } else if (in->is_last_use()) { |
duke@435 | 579 | insert_free_if_dead(res);//, in); |
duke@435 | 580 | new_in = to_fpu_stack(in); |
duke@435 | 581 | do_rename(in, res); |
duke@435 | 582 | } else { |
duke@435 | 583 | insert_free_if_dead(res); |
duke@435 | 584 | insert_copy(in, res); |
duke@435 | 585 | new_in = to_fpu_stack_top(in, true); |
duke@435 | 586 | } |
duke@435 | 587 | new_res = to_fpu_stack(res); |
duke@435 | 588 | } |
duke@435 | 589 | |
duke@435 | 590 | break; |
duke@435 | 591 | |
duke@435 | 592 | case Bytecodes::_i2f: |
duke@435 | 593 | case Bytecodes::_l2f: |
duke@435 | 594 | case Bytecodes::_i2d: |
duke@435 | 595 | case Bytecodes::_l2d: |
duke@435 | 596 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 597 | if (!res->is_xmm_register()) { |
duke@435 | 598 | insert_free_if_dead(res); |
duke@435 | 599 | do_push(res); |
duke@435 | 600 | new_res = to_fpu_stack_top(res); |
duke@435 | 601 | } |
duke@435 | 602 | break; |
duke@435 | 603 | |
duke@435 | 604 | case Bytecodes::_f2i: |
duke@435 | 605 | case Bytecodes::_d2i: |
duke@435 | 606 | assert(in->is_fpu_register(), "must be"); |
duke@435 | 607 | if (!in->is_xmm_register()) { |
duke@435 | 608 | insert_exchange(in); |
duke@435 | 609 | new_in = to_fpu_stack_top(in); |
duke@435 | 610 | |
duke@435 | 611 | // TODO: update registes of stub |
duke@435 | 612 | } |
duke@435 | 613 | break; |
duke@435 | 614 | |
duke@435 | 615 | case Bytecodes::_f2l: |
duke@435 | 616 | case Bytecodes::_d2l: |
duke@435 | 617 | assert(in->is_fpu_register(), "must be"); |
duke@435 | 618 | if (!in->is_xmm_register()) { |
duke@435 | 619 | insert_exchange(in); |
duke@435 | 620 | new_in = to_fpu_stack_top(in); |
duke@435 | 621 | pop_always(op1, in); |
duke@435 | 622 | } |
duke@435 | 623 | break; |
duke@435 | 624 | |
duke@435 | 625 | case Bytecodes::_i2l: |
duke@435 | 626 | case Bytecodes::_l2i: |
duke@435 | 627 | case Bytecodes::_i2b: |
duke@435 | 628 | case Bytecodes::_i2c: |
duke@435 | 629 | case Bytecodes::_i2s: |
duke@435 | 630 | // no fpu operands |
duke@435 | 631 | break; |
duke@435 | 632 | |
duke@435 | 633 | default: |
duke@435 | 634 | ShouldNotReachHere(); |
duke@435 | 635 | } |
duke@435 | 636 | break; |
duke@435 | 637 | } |
duke@435 | 638 | |
duke@435 | 639 | case lir_roundfp: { |
duke@435 | 640 | assert(in->is_fpu_register() && !in->is_xmm_register(), "input must be in register"); |
duke@435 | 641 | assert(res->is_stack(), "result must be on stack"); |
duke@435 | 642 | |
duke@435 | 643 | insert_exchange(in); |
duke@435 | 644 | new_in = to_fpu_stack_top(in); |
duke@435 | 645 | pop_if_last_use(op1, in); |
duke@435 | 646 | break; |
duke@435 | 647 | } |
duke@435 | 648 | |
duke@435 | 649 | default: { |
duke@435 | 650 | assert(!in->is_float_kind() && !res->is_float_kind(), "missed a fpu-operation"); |
duke@435 | 651 | } |
duke@435 | 652 | } |
duke@435 | 653 | |
duke@435 | 654 | op1->set_in_opr(new_in); |
duke@435 | 655 | op1->set_result_opr(new_res); |
duke@435 | 656 | } |
duke@435 | 657 | |
duke@435 | 658 | void FpuStackAllocator::handle_op2(LIR_Op2* op2) { |
duke@435 | 659 | LIR_Opr left = op2->in_opr1(); |
duke@435 | 660 | if (!left->is_float_kind()) { |
duke@435 | 661 | return; |
duke@435 | 662 | } |
duke@435 | 663 | if (left->is_xmm_register()) { |
duke@435 | 664 | return; |
duke@435 | 665 | } |
duke@435 | 666 | |
duke@435 | 667 | LIR_Opr right = op2->in_opr2(); |
duke@435 | 668 | LIR_Opr res = op2->result_opr(); |
duke@435 | 669 | LIR_Opr new_left = left; // new operands relative to the actual fpu stack top |
duke@435 | 670 | LIR_Opr new_right = right; |
duke@435 | 671 | LIR_Opr new_res = res; |
duke@435 | 672 | |
duke@435 | 673 | assert(!left->is_xmm_register() && !right->is_xmm_register() && !res->is_xmm_register(), "not for xmm registers"); |
duke@435 | 674 | |
duke@435 | 675 | switch (op2->code()) { |
duke@435 | 676 | case lir_cmp: |
duke@435 | 677 | case lir_cmp_fd2i: |
duke@435 | 678 | case lir_ucmp_fd2i: { |
duke@435 | 679 | assert(left->is_fpu_register(), "invalid LIR"); |
duke@435 | 680 | assert(right->is_fpu_register(), "invalid LIR"); |
duke@435 | 681 | |
duke@435 | 682 | // the left-hand side must be on top of stack. |
duke@435 | 683 | // the right-hand side is never popped, even if is_last_use is set |
duke@435 | 684 | insert_exchange(left); |
duke@435 | 685 | new_left = to_fpu_stack_top(left); |
duke@435 | 686 | new_right = to_fpu_stack(right); |
duke@435 | 687 | pop_if_last_use(op2, left); |
duke@435 | 688 | break; |
duke@435 | 689 | } |
duke@435 | 690 | |
duke@435 | 691 | case lir_mul_strictfp: |
duke@435 | 692 | case lir_div_strictfp: { |
duke@435 | 693 | assert(op2->tmp_opr()->is_fpu_register(), "strict operations need temporary fpu stack slot"); |
duke@435 | 694 | insert_free_if_dead(op2->tmp_opr()); |
duke@435 | 695 | assert(sim()->stack_size() <= 7, "at least one stack slot must be free"); |
duke@435 | 696 | // fall-through: continue with the normal handling of lir_mul and lir_div |
duke@435 | 697 | } |
duke@435 | 698 | case lir_add: |
duke@435 | 699 | case lir_sub: |
duke@435 | 700 | case lir_mul: |
duke@435 | 701 | case lir_div: { |
duke@435 | 702 | assert(left->is_fpu_register(), "must be"); |
duke@435 | 703 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 704 | assert(left->is_equal(res), "must be"); |
duke@435 | 705 | |
duke@435 | 706 | // either the left-hand or the right-hand side must be on top of stack |
duke@435 | 707 | // (if right is not a register, left must be on top) |
duke@435 | 708 | if (!right->is_fpu_register()) { |
duke@435 | 709 | insert_exchange(left); |
duke@435 | 710 | new_left = to_fpu_stack_top(left); |
duke@435 | 711 | } else { |
duke@435 | 712 | // no exchange necessary if right is alredy on top of stack |
duke@435 | 713 | if (tos_offset(right) == 0) { |
duke@435 | 714 | new_left = to_fpu_stack(left); |
duke@435 | 715 | new_right = to_fpu_stack_top(right); |
duke@435 | 716 | } else { |
duke@435 | 717 | insert_exchange(left); |
duke@435 | 718 | new_left = to_fpu_stack_top(left); |
duke@435 | 719 | new_right = to_fpu_stack(right); |
duke@435 | 720 | } |
duke@435 | 721 | |
duke@435 | 722 | if (right->is_last_use()) { |
duke@435 | 723 | op2->set_fpu_pop_count(1); |
duke@435 | 724 | |
duke@435 | 725 | if (tos_offset(right) == 0) { |
duke@435 | 726 | sim()->pop(); |
duke@435 | 727 | } else { |
duke@435 | 728 | // if left is on top of stack, the result is placed in the stack |
duke@435 | 729 | // slot of right, so a renaming from right to res is necessary |
duke@435 | 730 | assert(tos_offset(left) == 0, "must be"); |
duke@435 | 731 | sim()->pop(); |
duke@435 | 732 | do_rename(right, res); |
duke@435 | 733 | } |
duke@435 | 734 | } |
duke@435 | 735 | } |
duke@435 | 736 | new_res = to_fpu_stack(res); |
duke@435 | 737 | |
duke@435 | 738 | break; |
duke@435 | 739 | } |
duke@435 | 740 | |
duke@435 | 741 | case lir_rem: { |
duke@435 | 742 | assert(left->is_fpu_register(), "must be"); |
duke@435 | 743 | assert(right->is_fpu_register(), "must be"); |
duke@435 | 744 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 745 | assert(left->is_equal(res), "must be"); |
duke@435 | 746 | |
duke@435 | 747 | // Must bring both operands to top of stack with following operand ordering: |
duke@435 | 748 | // * fpu stack before rem: ... right left |
duke@435 | 749 | // * fpu stack after rem: ... left |
duke@435 | 750 | if (tos_offset(right) != 1) { |
duke@435 | 751 | insert_exchange(right); |
duke@435 | 752 | insert_exchange(1); |
duke@435 | 753 | } |
duke@435 | 754 | insert_exchange(left); |
duke@435 | 755 | assert(tos_offset(right) == 1, "check"); |
duke@435 | 756 | assert(tos_offset(left) == 0, "check"); |
duke@435 | 757 | |
duke@435 | 758 | new_left = to_fpu_stack_top(left); |
duke@435 | 759 | new_right = to_fpu_stack(right); |
duke@435 | 760 | |
duke@435 | 761 | op2->set_fpu_pop_count(1); |
duke@435 | 762 | sim()->pop(); |
duke@435 | 763 | do_rename(right, res); |
duke@435 | 764 | |
duke@435 | 765 | new_res = to_fpu_stack_top(res); |
duke@435 | 766 | break; |
duke@435 | 767 | } |
duke@435 | 768 | |
duke@435 | 769 | case lir_abs: |
duke@435 | 770 | case lir_sqrt: { |
duke@435 | 771 | // Right argument appears to be unused |
duke@435 | 772 | assert(right->is_illegal(), "must be"); |
duke@435 | 773 | assert(left->is_fpu_register(), "must be"); |
duke@435 | 774 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 775 | assert(left->is_last_use(), "old value gets destroyed"); |
duke@435 | 776 | |
duke@435 | 777 | insert_free_if_dead(res, left); |
duke@435 | 778 | insert_exchange(left); |
duke@435 | 779 | do_rename(left, res); |
duke@435 | 780 | |
duke@435 | 781 | new_left = to_fpu_stack_top(res); |
duke@435 | 782 | new_res = new_left; |
duke@435 | 783 | |
duke@435 | 784 | op2->set_fpu_stack_size(sim()->stack_size()); |
duke@435 | 785 | break; |
duke@435 | 786 | } |
duke@435 | 787 | |
never@1388 | 788 | case lir_log: |
never@1388 | 789 | case lir_log10: { |
never@1388 | 790 | // log and log10 needs one temporary fpu stack slot, so there is ontemporary |
never@1388 | 791 | // registers stored in temp of the operation. |
never@1388 | 792 | // the stack allocator must guarantee that the stack slots are really free, |
never@1388 | 793 | // otherwise there might be a stack overflow. |
never@1388 | 794 | assert(right->is_illegal(), "must be"); |
never@1388 | 795 | assert(left->is_fpu_register(), "must be"); |
never@1388 | 796 | assert(res->is_fpu_register(), "must be"); |
never@1388 | 797 | assert(op2->tmp_opr()->is_fpu_register(), "must be"); |
never@1388 | 798 | |
never@1388 | 799 | insert_free_if_dead(op2->tmp_opr()); |
never@1388 | 800 | insert_free_if_dead(res, left); |
never@1388 | 801 | insert_exchange(left); |
never@1388 | 802 | do_rename(left, res); |
never@1388 | 803 | |
never@1388 | 804 | new_left = to_fpu_stack_top(res); |
never@1388 | 805 | new_res = new_left; |
never@1388 | 806 | |
never@1388 | 807 | op2->set_fpu_stack_size(sim()->stack_size()); |
never@1388 | 808 | assert(sim()->stack_size() <= 7, "at least one stack slot must be free"); |
never@1388 | 809 | break; |
never@1388 | 810 | } |
never@1388 | 811 | |
duke@435 | 812 | |
duke@435 | 813 | case lir_tan: |
duke@435 | 814 | case lir_sin: |
duke@435 | 815 | case lir_cos: { |
duke@435 | 816 | // sin and cos need two temporary fpu stack slots, so there are two temporary |
duke@435 | 817 | // registers (stored in right and temp of the operation). |
duke@435 | 818 | // the stack allocator must guarantee that the stack slots are really free, |
duke@435 | 819 | // otherwise there might be a stack overflow. |
duke@435 | 820 | assert(left->is_fpu_register(), "must be"); |
duke@435 | 821 | assert(res->is_fpu_register(), "must be"); |
duke@435 | 822 | // assert(left->is_last_use(), "old value gets destroyed"); |
duke@435 | 823 | assert(right->is_fpu_register(), "right is used as the first temporary register"); |
duke@435 | 824 | assert(op2->tmp_opr()->is_fpu_register(), "temp is used as the second temporary register"); |
duke@435 | 825 | assert(fpu_num(left) != fpu_num(right) && fpu_num(right) != fpu_num(op2->tmp_opr()) && fpu_num(op2->tmp_opr()) != fpu_num(res), "need distinct temp registers"); |
duke@435 | 826 | |
duke@435 | 827 | insert_free_if_dead(right); |
duke@435 | 828 | insert_free_if_dead(op2->tmp_opr()); |
duke@435 | 829 | |
duke@435 | 830 | insert_free_if_dead(res, left); |
duke@435 | 831 | insert_exchange(left); |
duke@435 | 832 | do_rename(left, res); |
duke@435 | 833 | |
duke@435 | 834 | new_left = to_fpu_stack_top(res); |
duke@435 | 835 | new_res = new_left; |
duke@435 | 836 | |
duke@435 | 837 | op2->set_fpu_stack_size(sim()->stack_size()); |
duke@435 | 838 | assert(sim()->stack_size() <= 6, "at least two stack slots must be free"); |
duke@435 | 839 | break; |
duke@435 | 840 | } |
duke@435 | 841 | |
duke@435 | 842 | default: { |
duke@435 | 843 | assert(false, "missed a fpu-operation"); |
duke@435 | 844 | } |
duke@435 | 845 | } |
duke@435 | 846 | |
duke@435 | 847 | op2->set_in_opr1(new_left); |
duke@435 | 848 | op2->set_in_opr2(new_right); |
duke@435 | 849 | op2->set_result_opr(new_res); |
duke@435 | 850 | } |
duke@435 | 851 | |
duke@435 | 852 | void FpuStackAllocator::handle_opCall(LIR_OpCall* opCall) { |
duke@435 | 853 | LIR_Opr res = opCall->result_opr(); |
duke@435 | 854 | |
duke@435 | 855 | // clear fpu-stack before call |
duke@435 | 856 | // it may contain dead values that could not have been remved by previous operations |
duke@435 | 857 | clear_fpu_stack(LIR_OprFact::illegalOpr); |
duke@435 | 858 | assert(sim()->is_empty(), "fpu stack must be empty now"); |
duke@435 | 859 | |
duke@435 | 860 | // compute debug information before (possible) fpu result is pushed |
duke@435 | 861 | compute_debug_information(opCall); |
duke@435 | 862 | |
duke@435 | 863 | if (res->is_fpu_register() && !res->is_xmm_register()) { |
duke@435 | 864 | do_push(res); |
duke@435 | 865 | opCall->set_result_opr(to_fpu_stack_top(res)); |
duke@435 | 866 | } |
duke@435 | 867 | } |
duke@435 | 868 | |
duke@435 | 869 | #ifndef PRODUCT |
duke@435 | 870 | void FpuStackAllocator::check_invalid_lir_op(LIR_Op* op) { |
duke@435 | 871 | switch (op->code()) { |
duke@435 | 872 | case lir_24bit_FPU: |
duke@435 | 873 | case lir_reset_FPU: |
duke@435 | 874 | case lir_ffree: |
duke@435 | 875 | assert(false, "operations not allowed in lir. If one of these operations is needed, check if they have fpu operands"); |
duke@435 | 876 | break; |
duke@435 | 877 | |
duke@435 | 878 | case lir_fpop_raw: |
duke@435 | 879 | case lir_fxch: |
duke@435 | 880 | case lir_fld: |
duke@435 | 881 | assert(false, "operations only inserted by FpuStackAllocator"); |
duke@435 | 882 | break; |
duke@435 | 883 | } |
duke@435 | 884 | } |
duke@435 | 885 | #endif |
duke@435 | 886 | |
duke@435 | 887 | |
duke@435 | 888 | void FpuStackAllocator::merge_insert_add(LIR_List* instrs, FpuStackSim* cur_sim, int reg) { |
duke@435 | 889 | LIR_Op1* move = new LIR_Op1(lir_move, LIR_OprFact::doubleConst(0), LIR_OprFact::double_fpu(reg)->make_fpu_stack_offset()); |
duke@435 | 890 | |
duke@435 | 891 | instrs->instructions_list()->push(move); |
duke@435 | 892 | |
duke@435 | 893 | cur_sim->push(reg); |
duke@435 | 894 | move->set_result_opr(to_fpu_stack(move->result_opr())); |
duke@435 | 895 | |
duke@435 | 896 | #ifndef PRODUCT |
duke@435 | 897 | if (TraceFPUStack) { |
duke@435 | 898 | tty->print("Added new register: %d New state: ", reg); cur_sim->print(); tty->cr(); |
duke@435 | 899 | } |
duke@435 | 900 | #endif |
duke@435 | 901 | } |
duke@435 | 902 | |
duke@435 | 903 | void FpuStackAllocator::merge_insert_xchg(LIR_List* instrs, FpuStackSim* cur_sim, int slot) { |
duke@435 | 904 | assert(slot > 0, "no exchange necessary"); |
duke@435 | 905 | |
duke@435 | 906 | LIR_Op1* fxch = new LIR_Op1(lir_fxch, LIR_OprFact::intConst(slot)); |
duke@435 | 907 | instrs->instructions_list()->push(fxch); |
duke@435 | 908 | cur_sim->swap(slot); |
duke@435 | 909 | |
duke@435 | 910 | #ifndef PRODUCT |
duke@435 | 911 | if (TraceFPUStack) { |
duke@435 | 912 | tty->print("Exchanged register: %d New state: ", cur_sim->get_slot(slot)); cur_sim->print(); tty->cr(); |
duke@435 | 913 | } |
duke@435 | 914 | #endif |
duke@435 | 915 | } |
duke@435 | 916 | |
duke@435 | 917 | void FpuStackAllocator::merge_insert_pop(LIR_List* instrs, FpuStackSim* cur_sim) { |
duke@435 | 918 | int reg = cur_sim->get_slot(0); |
duke@435 | 919 | |
duke@435 | 920 | LIR_Op* fpop = new LIR_Op0(lir_fpop_raw); |
duke@435 | 921 | instrs->instructions_list()->push(fpop); |
duke@435 | 922 | cur_sim->pop(reg); |
duke@435 | 923 | |
duke@435 | 924 | #ifndef PRODUCT |
duke@435 | 925 | if (TraceFPUStack) { |
duke@435 | 926 | tty->print("Removed register: %d New state: ", reg); cur_sim->print(); tty->cr(); |
duke@435 | 927 | } |
duke@435 | 928 | #endif |
duke@435 | 929 | } |
duke@435 | 930 | |
duke@435 | 931 | bool FpuStackAllocator::merge_rename(FpuStackSim* cur_sim, FpuStackSim* sux_sim, int start_slot, int change_slot) { |
duke@435 | 932 | int reg = cur_sim->get_slot(change_slot); |
duke@435 | 933 | |
duke@435 | 934 | for (int slot = start_slot; slot >= 0; slot--) { |
duke@435 | 935 | int new_reg = sux_sim->get_slot(slot); |
duke@435 | 936 | |
duke@435 | 937 | if (!cur_sim->contains(new_reg)) { |
duke@435 | 938 | cur_sim->set_slot(change_slot, new_reg); |
duke@435 | 939 | |
duke@435 | 940 | #ifndef PRODUCT |
duke@435 | 941 | if (TraceFPUStack) { |
duke@435 | 942 | tty->print("Renamed register %d to %d New state: ", reg, new_reg); cur_sim->print(); tty->cr(); |
duke@435 | 943 | } |
duke@435 | 944 | #endif |
duke@435 | 945 | |
duke@435 | 946 | return true; |
duke@435 | 947 | } |
duke@435 | 948 | } |
duke@435 | 949 | return false; |
duke@435 | 950 | } |
duke@435 | 951 | |
duke@435 | 952 | |
duke@435 | 953 | void FpuStackAllocator::merge_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, FpuStackSim* sux_sim) { |
duke@435 | 954 | #ifndef PRODUCT |
duke@435 | 955 | if (TraceFPUStack) { |
duke@435 | 956 | tty->cr(); |
duke@435 | 957 | tty->print("before merging: pred: "); cur_sim->print(); tty->cr(); |
duke@435 | 958 | tty->print(" sux: "); sux_sim->print(); tty->cr(); |
duke@435 | 959 | } |
duke@435 | 960 | |
duke@435 | 961 | int slot; |
duke@435 | 962 | for (slot = 0; slot < cur_sim->stack_size(); slot++) { |
duke@435 | 963 | assert(!cur_sim->slot_is_empty(slot), "not handled by algorithm"); |
duke@435 | 964 | } |
duke@435 | 965 | for (slot = 0; slot < sux_sim->stack_size(); slot++) { |
duke@435 | 966 | assert(!sux_sim->slot_is_empty(slot), "not handled by algorithm"); |
duke@435 | 967 | } |
duke@435 | 968 | #endif |
duke@435 | 969 | |
duke@435 | 970 | // size difference between cur and sux that must be resolved by adding or removing values form the stack |
duke@435 | 971 | int size_diff = cur_sim->stack_size() - sux_sim->stack_size(); |
duke@435 | 972 | |
duke@435 | 973 | if (!ComputeExactFPURegisterUsage) { |
duke@435 | 974 | // add slots that are currently free, but used in successor |
duke@435 | 975 | // When the exact FPU register usage is computed, the stack does |
duke@435 | 976 | // not contain dead values at merging -> no values must be added |
duke@435 | 977 | |
duke@435 | 978 | int sux_slot = sux_sim->stack_size() - 1; |
duke@435 | 979 | while (size_diff < 0) { |
duke@435 | 980 | assert(sux_slot >= 0, "slot out of bounds -> error in algorithm"); |
duke@435 | 981 | |
duke@435 | 982 | int reg = sux_sim->get_slot(sux_slot); |
duke@435 | 983 | if (!cur_sim->contains(reg)) { |
duke@435 | 984 | merge_insert_add(instrs, cur_sim, reg); |
duke@435 | 985 | size_diff++; |
duke@435 | 986 | |
duke@435 | 987 | if (sux_slot + size_diff != 0) { |
duke@435 | 988 | merge_insert_xchg(instrs, cur_sim, sux_slot + size_diff); |
duke@435 | 989 | } |
duke@435 | 990 | } |
duke@435 | 991 | sux_slot--; |
duke@435 | 992 | } |
duke@435 | 993 | } |
duke@435 | 994 | |
duke@435 | 995 | assert(cur_sim->stack_size() >= sux_sim->stack_size(), "stack size must be equal or greater now"); |
duke@435 | 996 | assert(size_diff == cur_sim->stack_size() - sux_sim->stack_size(), "must be"); |
duke@435 | 997 | |
duke@435 | 998 | // stack merge algorithm: |
duke@435 | 999 | // 1) as long as the current stack top is not in the right location (that meens |
duke@435 | 1000 | // it should not be on the stack top), exchange it into the right location |
duke@435 | 1001 | // 2) if the stack top is right, but the remaining stack is not ordered correctly, |
duke@435 | 1002 | // the stack top is exchanged away to get another value on top -> |
duke@435 | 1003 | // now step 1) can be continued |
duke@435 | 1004 | // the stack can also contain unused items -> these items are removed from stack |
duke@435 | 1005 | |
duke@435 | 1006 | int finished_slot = sux_sim->stack_size() - 1; |
duke@435 | 1007 | while (finished_slot >= 0 || size_diff > 0) { |
duke@435 | 1008 | while (size_diff > 0 || (cur_sim->stack_size() > 0 && cur_sim->get_slot(0) != sux_sim->get_slot(0))) { |
duke@435 | 1009 | int reg = cur_sim->get_slot(0); |
duke@435 | 1010 | if (sux_sim->contains(reg)) { |
duke@435 | 1011 | int sux_slot = sux_sim->offset_from_tos(reg); |
duke@435 | 1012 | merge_insert_xchg(instrs, cur_sim, sux_slot + size_diff); |
duke@435 | 1013 | |
duke@435 | 1014 | } else if (!merge_rename(cur_sim, sux_sim, finished_slot, 0)) { |
duke@435 | 1015 | assert(size_diff > 0, "must be"); |
duke@435 | 1016 | |
duke@435 | 1017 | merge_insert_pop(instrs, cur_sim); |
duke@435 | 1018 | size_diff--; |
duke@435 | 1019 | } |
duke@435 | 1020 | assert(cur_sim->stack_size() == 0 || cur_sim->get_slot(0) != reg, "register must have been changed"); |
duke@435 | 1021 | } |
duke@435 | 1022 | |
duke@435 | 1023 | while (finished_slot >= 0 && cur_sim->get_slot(finished_slot) == sux_sim->get_slot(finished_slot)) { |
duke@435 | 1024 | finished_slot--; |
duke@435 | 1025 | } |
duke@435 | 1026 | |
duke@435 | 1027 | if (finished_slot >= 0) { |
duke@435 | 1028 | int reg = cur_sim->get_slot(finished_slot); |
duke@435 | 1029 | |
duke@435 | 1030 | if (sux_sim->contains(reg) || !merge_rename(cur_sim, sux_sim, finished_slot, finished_slot)) { |
duke@435 | 1031 | assert(sux_sim->contains(reg) || size_diff > 0, "must be"); |
duke@435 | 1032 | merge_insert_xchg(instrs, cur_sim, finished_slot); |
duke@435 | 1033 | } |
duke@435 | 1034 | assert(cur_sim->get_slot(finished_slot) != reg, "register must have been changed"); |
duke@435 | 1035 | } |
duke@435 | 1036 | } |
duke@435 | 1037 | |
duke@435 | 1038 | #ifndef PRODUCT |
duke@435 | 1039 | if (TraceFPUStack) { |
duke@435 | 1040 | tty->print("after merging: pred: "); cur_sim->print(); tty->cr(); |
duke@435 | 1041 | tty->print(" sux: "); sux_sim->print(); tty->cr(); |
duke@435 | 1042 | tty->cr(); |
duke@435 | 1043 | } |
duke@435 | 1044 | #endif |
duke@435 | 1045 | assert(cur_sim->stack_size() == sux_sim->stack_size(), "stack size must be equal now"); |
duke@435 | 1046 | } |
duke@435 | 1047 | |
duke@435 | 1048 | |
duke@435 | 1049 | void FpuStackAllocator::merge_cleanup_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, BitMap& live_fpu_regs) { |
duke@435 | 1050 | #ifndef PRODUCT |
duke@435 | 1051 | if (TraceFPUStack) { |
duke@435 | 1052 | tty->cr(); |
duke@435 | 1053 | tty->print("before cleanup: state: "); cur_sim->print(); tty->cr(); |
duke@435 | 1054 | tty->print(" live: "); live_fpu_regs.print_on(tty); tty->cr(); |
duke@435 | 1055 | } |
duke@435 | 1056 | #endif |
duke@435 | 1057 | |
duke@435 | 1058 | int slot = 0; |
duke@435 | 1059 | while (slot < cur_sim->stack_size()) { |
duke@435 | 1060 | int reg = cur_sim->get_slot(slot); |
duke@435 | 1061 | if (!live_fpu_regs.at(reg)) { |
duke@435 | 1062 | if (slot != 0) { |
duke@435 | 1063 | merge_insert_xchg(instrs, cur_sim, slot); |
duke@435 | 1064 | } |
duke@435 | 1065 | merge_insert_pop(instrs, cur_sim); |
duke@435 | 1066 | } else { |
duke@435 | 1067 | slot++; |
duke@435 | 1068 | } |
duke@435 | 1069 | } |
duke@435 | 1070 | |
duke@435 | 1071 | #ifndef PRODUCT |
duke@435 | 1072 | if (TraceFPUStack) { |
duke@435 | 1073 | tty->print("after cleanup: state: "); cur_sim->print(); tty->cr(); |
duke@435 | 1074 | tty->print(" live: "); live_fpu_regs.print_on(tty); tty->cr(); |
duke@435 | 1075 | tty->cr(); |
duke@435 | 1076 | } |
duke@435 | 1077 | |
duke@435 | 1078 | // check if fpu stack only contains live registers |
duke@435 | 1079 | for (unsigned int i = 0; i < live_fpu_regs.size(); i++) { |
duke@435 | 1080 | if (live_fpu_regs.at(i) != cur_sim->contains(i)) { |
duke@435 | 1081 | tty->print_cr("mismatch between required and actual stack content"); |
duke@435 | 1082 | break; |
duke@435 | 1083 | } |
duke@435 | 1084 | } |
duke@435 | 1085 | #endif |
duke@435 | 1086 | } |
duke@435 | 1087 | |
duke@435 | 1088 | |
duke@435 | 1089 | bool FpuStackAllocator::merge_fpu_stack_with_successors(BlockBegin* block) { |
duke@435 | 1090 | #ifndef PRODUCT |
duke@435 | 1091 | if (TraceFPUStack) { |
duke@435 | 1092 | tty->print_cr("Propagating FPU stack state for B%d at LIR_Op position %d to successors:", |
duke@435 | 1093 | block->block_id(), pos()); |
duke@435 | 1094 | sim()->print(); |
duke@435 | 1095 | tty->cr(); |
duke@435 | 1096 | } |
duke@435 | 1097 | #endif |
duke@435 | 1098 | |
duke@435 | 1099 | bool changed = false; |
duke@435 | 1100 | int number_of_sux = block->number_of_sux(); |
duke@435 | 1101 | |
duke@435 | 1102 | if (number_of_sux == 1 && block->sux_at(0)->number_of_preds() > 1) { |
duke@435 | 1103 | // The successor has at least two incoming edges, so a stack merge will be necessary |
duke@435 | 1104 | // If this block is the first predecessor, cleanup the current stack and propagate it |
duke@435 | 1105 | // If this block is not the first predecessor, a stack merge will be necessary |
duke@435 | 1106 | |
duke@435 | 1107 | BlockBegin* sux = block->sux_at(0); |
duke@435 | 1108 | intArray* state = sux->fpu_stack_state(); |
duke@435 | 1109 | LIR_List* instrs = new LIR_List(_compilation); |
duke@435 | 1110 | |
duke@435 | 1111 | if (state != NULL) { |
duke@435 | 1112 | // Merge with a successors that already has a FPU stack state |
duke@435 | 1113 | // the block must only have one successor because critical edges must been split |
duke@435 | 1114 | FpuStackSim* cur_sim = sim(); |
duke@435 | 1115 | FpuStackSim* sux_sim = temp_sim(); |
duke@435 | 1116 | sux_sim->read_state(state); |
duke@435 | 1117 | |
duke@435 | 1118 | merge_fpu_stack(instrs, cur_sim, sux_sim); |
duke@435 | 1119 | |
duke@435 | 1120 | } else { |
duke@435 | 1121 | // propagate current FPU stack state to successor without state |
duke@435 | 1122 | // clean up stack first so that there are no dead values on the stack |
duke@435 | 1123 | if (ComputeExactFPURegisterUsage) { |
duke@435 | 1124 | FpuStackSim* cur_sim = sim(); |
duke@435 | 1125 | BitMap live_fpu_regs = block->sux_at(0)->fpu_register_usage(); |
duke@435 | 1126 | assert(live_fpu_regs.size() == FrameMap::nof_fpu_regs, "missing register usage"); |
duke@435 | 1127 | |
duke@435 | 1128 | merge_cleanup_fpu_stack(instrs, cur_sim, live_fpu_regs); |
duke@435 | 1129 | } |
duke@435 | 1130 | |
duke@435 | 1131 | intArray* state = sim()->write_state(); |
duke@435 | 1132 | if (TraceFPUStack) { |
duke@435 | 1133 | tty->print_cr("Setting FPU stack state of B%d (merge path)", sux->block_id()); |
duke@435 | 1134 | sim()->print(); tty->cr(); |
duke@435 | 1135 | } |
duke@435 | 1136 | sux->set_fpu_stack_state(state); |
duke@435 | 1137 | } |
duke@435 | 1138 | |
duke@435 | 1139 | if (instrs->instructions_list()->length() > 0) { |
duke@435 | 1140 | lir()->insert_before(pos(), instrs); |
duke@435 | 1141 | set_pos(instrs->instructions_list()->length() + pos()); |
duke@435 | 1142 | changed = true; |
duke@435 | 1143 | } |
duke@435 | 1144 | |
duke@435 | 1145 | } else { |
duke@435 | 1146 | // Propagate unmodified Stack to successors where a stack merge is not necessary |
duke@435 | 1147 | intArray* state = sim()->write_state(); |
duke@435 | 1148 | for (int i = 0; i < number_of_sux; i++) { |
duke@435 | 1149 | BlockBegin* sux = block->sux_at(i); |
duke@435 | 1150 | |
duke@435 | 1151 | #ifdef ASSERT |
duke@435 | 1152 | for (int j = 0; j < sux->number_of_preds(); j++) { |
duke@435 | 1153 | assert(block == sux->pred_at(j), "all critical edges must be broken"); |
duke@435 | 1154 | } |
duke@435 | 1155 | |
duke@435 | 1156 | // check if new state is same |
duke@435 | 1157 | if (sux->fpu_stack_state() != NULL) { |
duke@435 | 1158 | intArray* sux_state = sux->fpu_stack_state(); |
duke@435 | 1159 | assert(state->length() == sux_state->length(), "overwriting existing stack state"); |
duke@435 | 1160 | for (int j = 0; j < state->length(); j++) { |
duke@435 | 1161 | assert(state->at(j) == sux_state->at(j), "overwriting existing stack state"); |
duke@435 | 1162 | } |
duke@435 | 1163 | } |
duke@435 | 1164 | #endif |
duke@435 | 1165 | #ifndef PRODUCT |
duke@435 | 1166 | if (TraceFPUStack) { |
duke@435 | 1167 | tty->print_cr("Setting FPU stack state of B%d", sux->block_id()); |
duke@435 | 1168 | sim()->print(); tty->cr(); |
duke@435 | 1169 | } |
duke@435 | 1170 | #endif |
duke@435 | 1171 | |
duke@435 | 1172 | sux->set_fpu_stack_state(state); |
duke@435 | 1173 | } |
duke@435 | 1174 | } |
duke@435 | 1175 | |
duke@435 | 1176 | #ifndef PRODUCT |
duke@435 | 1177 | // assertions that FPU stack state conforms to all successors' states |
duke@435 | 1178 | intArray* cur_state = sim()->write_state(); |
duke@435 | 1179 | for (int i = 0; i < number_of_sux; i++) { |
duke@435 | 1180 | BlockBegin* sux = block->sux_at(i); |
duke@435 | 1181 | intArray* sux_state = sux->fpu_stack_state(); |
duke@435 | 1182 | |
duke@435 | 1183 | assert(sux_state != NULL, "no fpu state"); |
duke@435 | 1184 | assert(cur_state->length() == sux_state->length(), "incorrect length"); |
duke@435 | 1185 | for (int i = 0; i < cur_state->length(); i++) { |
duke@435 | 1186 | assert(cur_state->at(i) == sux_state->at(i), "element not equal"); |
duke@435 | 1187 | } |
duke@435 | 1188 | } |
duke@435 | 1189 | #endif |
duke@435 | 1190 | |
duke@435 | 1191 | return changed; |
duke@435 | 1192 | } |