Thu, 07 Sep 2017 09:12:16 +0800
#5745 [Code Reorganization] code cleanup and code style fix
This is a huge patch, but only code cleanup, code style fix and useless code deletion are included, for example:
tab -> two spaces, deleted spacees at the end of a line, delete useless comments.
This patch also included:
Declaration and definition of class MacroAssembler is moved from assembler_mips.h/cpp to macroAssembler_mips.h/cpp
aoqi@1 | 1 | /* |
aoqi@1 | 2 | * Copyright (c) 2006, 2012, Oracle and/or its affiliates. All rights reserved. |
aoqi@1 | 3 | * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. |
aoqi@1 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@1 | 5 | * |
aoqi@1 | 6 | * This code is free software; you can redistribute it and/or modify it |
aoqi@1 | 7 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@1 | 8 | * published by the Free Software Foundation. |
aoqi@1 | 9 | * |
aoqi@1 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@1 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@1 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@1 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@1 | 14 | * accompanied this code). |
aoqi@1 | 15 | * |
aoqi@1 | 16 | * You should have received a copy of the GNU General Public License version |
aoqi@1 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@1 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@1 | 19 | * |
aoqi@1 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@1 | 21 | * or visit www.oracle.com if you need additional information or have any |
aoqi@1 | 22 | * questions. |
aoqi@1 | 23 | * |
aoqi@1 | 24 | */ |
aoqi@1 | 25 | |
aoqi@1 | 26 | #ifndef CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP |
aoqi@1 | 27 | #define CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP |
aoqi@1 | 28 | |
aoqi@1 | 29 | inline VMReg RegisterImpl::as_VMReg() { |
aoqi@1 | 30 | if( this==noreg ) return VMRegImpl::Bad(); |
aoqi@1 | 31 | #ifdef _LP64 |
aoqi@1 | 32 | //FIXME why encoding << 1? what is the meaning of the VMReg's value |
aoqi@1 | 33 | return VMRegImpl::as_VMReg(encoding() << 1 ); |
aoqi@1 | 34 | #else |
aoqi@1 | 35 | return VMRegImpl::as_VMReg(encoding() ); |
aoqi@1 | 36 | #endif // _LP64 |
aoqi@1 | 37 | } |
aoqi@1 | 38 | |
aoqi@1 | 39 | inline VMReg FloatRegisterImpl::as_VMReg() { |
aoqi@1 | 40 | #ifdef _LP64 |
aoqi@1 | 41 | return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr); |
aoqi@1 | 42 | #else |
aoqi@1 | 43 | return VMRegImpl::as_VMReg((encoding()) + ConcreteRegisterImpl::max_gpr); |
aoqi@1 | 44 | #endif // _LP64 |
aoqi@1 | 45 | } |
aoqi@1 | 46 | |
aoqi@1 | 47 | inline bool VMRegImpl::is_Register() { |
aoqi@1 | 48 | return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr; |
aoqi@1 | 49 | } |
aoqi@1 | 50 | |
aoqi@1 | 51 | inline bool VMRegImpl::is_FloatRegister() { |
aoqi@1 | 52 | return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr; |
aoqi@1 | 53 | } |
aoqi@1 | 54 | |
aoqi@1 | 55 | inline Register VMRegImpl::as_Register() { |
aoqi@1 | 56 | |
aoqi@1 | 57 | assert( is_Register(), "must be"); |
aoqi@1 | 58 | // Yuk |
aoqi@1 | 59 | #ifdef _LP64 |
aoqi@1 | 60 | return ::as_Register(value() >> 1); |
aoqi@1 | 61 | #else |
aoqi@1 | 62 | return ::as_Register(value()); |
aoqi@1 | 63 | #endif // _LP64 |
aoqi@1 | 64 | } |
aoqi@1 | 65 | |
aoqi@1 | 66 | inline FloatRegister VMRegImpl::as_FloatRegister() { |
aoqi@1 | 67 | assert( is_FloatRegister(), "must be" ); |
aoqi@1 | 68 | // Yuk |
aoqi@1 | 69 | #ifdef _LP64 |
aoqi@1 | 70 | assert( is_even(value()), "must be" ); |
aoqi@1 | 71 | return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1); |
aoqi@1 | 72 | #else |
aoqi@1 | 73 | return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr)); |
aoqi@1 | 74 | #endif // _LP64 |
aoqi@1 | 75 | } |
aoqi@1 | 76 | |
aoqi@1 | 77 | inline bool VMRegImpl::is_concrete() { |
aoqi@1 | 78 | assert(is_reg(), "must be"); |
aoqi@1 | 79 | if(is_Register()) return true; |
aoqi@1 | 80 | if(is_FloatRegister()) return true; |
aoqi@1 | 81 | assert(false, "what register?"); |
aoqi@1 | 82 | return false; |
aoqi@1 | 83 | } |
aoqi@1 | 84 | |
aoqi@1 | 85 | #endif // CPU_MIPS_VM_VMREG_MIPS_INLINE_HPP |