Tue, 06 Dec 2011 18:28:51 -0500
7117052: instanceKlass::_init_state can be u1 type
Summary: Change instanceKlass::_init_state field to u1 type.
Reviewed-by: bdelsart, coleenp, dholmes, phh, never
Contributed-by: Jiangli Zhou <jiangli.zhou@oracle.com>
duke@435 | 1 | /* |
twisti@3249 | 2 | * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
trims@1907 | 19 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
trims@1907 | 20 | * or visit www.oracle.com if you need additional information or have any |
trims@1907 | 21 | * questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
stefank@2314 | 25 | #include "precompiled.hpp" |
stefank@2314 | 26 | #include "assembler_sparc.inline.hpp" |
stefank@2314 | 27 | #include "memory/resourceArea.hpp" |
stefank@2314 | 28 | #include "runtime/java.hpp" |
stefank@2314 | 29 | #include "runtime/stubCodeGenerator.hpp" |
stefank@2314 | 30 | #include "vm_version_sparc.hpp" |
stefank@2314 | 31 | #ifdef TARGET_OS_FAMILY_linux |
stefank@2314 | 32 | # include "os_linux.inline.hpp" |
stefank@2314 | 33 | #endif |
stefank@2314 | 34 | #ifdef TARGET_OS_FAMILY_solaris |
stefank@2314 | 35 | # include "os_solaris.inline.hpp" |
stefank@2314 | 36 | #endif |
duke@435 | 37 | |
duke@435 | 38 | int VM_Version::_features = VM_Version::unknown_m; |
duke@435 | 39 | const char* VM_Version::_features_str = ""; |
duke@435 | 40 | |
duke@435 | 41 | void VM_Version::initialize() { |
duke@435 | 42 | _features = determine_features(); |
duke@435 | 43 | PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes(); |
duke@435 | 44 | PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes(); |
duke@435 | 45 | PrefetchFieldsAhead = prefetch_fields_ahead(); |
duke@435 | 46 | |
kvn@3052 | 47 | assert(0 <= AllocatePrefetchInstr && AllocatePrefetchInstr <= 1, "invalid value"); |
kvn@3052 | 48 | if( AllocatePrefetchInstr < 0 ) AllocatePrefetchInstr = 0; |
kvn@3052 | 49 | if( AllocatePrefetchInstr > 1 ) AllocatePrefetchInstr = 0; |
kvn@3052 | 50 | |
duke@435 | 51 | // Allocation prefetch settings |
kvn@3052 | 52 | intx cache_line_size = prefetch_data_size(); |
duke@435 | 53 | if( cache_line_size > AllocatePrefetchStepSize ) |
duke@435 | 54 | AllocatePrefetchStepSize = cache_line_size; |
kvn@3052 | 55 | |
kvn@3052 | 56 | assert(AllocatePrefetchLines > 0, "invalid value"); |
kvn@3052 | 57 | if( AllocatePrefetchLines < 1 ) // set valid value in product VM |
kvn@3052 | 58 | AllocatePrefetchLines = 3; |
kvn@3052 | 59 | assert(AllocateInstancePrefetchLines > 0, "invalid value"); |
kvn@3052 | 60 | if( AllocateInstancePrefetchLines < 1 ) // set valid value in product VM |
kvn@3052 | 61 | AllocateInstancePrefetchLines = 1; |
duke@435 | 62 | |
duke@435 | 63 | AllocatePrefetchDistance = allocate_prefetch_distance(); |
duke@435 | 64 | AllocatePrefetchStyle = allocate_prefetch_style(); |
duke@435 | 65 | |
kvn@3052 | 66 | assert((AllocatePrefetchDistance % AllocatePrefetchStepSize) == 0 && |
kvn@3052 | 67 | (AllocatePrefetchDistance > 0), "invalid value"); |
kvn@3052 | 68 | if ((AllocatePrefetchDistance % AllocatePrefetchStepSize) != 0 || |
kvn@3052 | 69 | (AllocatePrefetchDistance <= 0)) { |
kvn@3052 | 70 | AllocatePrefetchDistance = AllocatePrefetchStepSize; |
kvn@3052 | 71 | } |
duke@435 | 72 | |
kvn@3037 | 73 | if (AllocatePrefetchStyle == 3 && !has_blk_init()) { |
kvn@3037 | 74 | warning("BIS instructions are not available on this CPU"); |
kvn@3037 | 75 | FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1); |
kvn@3037 | 76 | } |
kvn@3037 | 77 | |
kvn@3103 | 78 | if (has_v9()) { |
kvn@3103 | 79 | assert(ArraycopySrcPrefetchDistance < 4096, "invalid value"); |
kvn@3103 | 80 | if (ArraycopySrcPrefetchDistance >= 4096) |
kvn@3103 | 81 | ArraycopySrcPrefetchDistance = 4064; |
kvn@3103 | 82 | assert(ArraycopyDstPrefetchDistance < 4096, "invalid value"); |
kvn@3103 | 83 | if (ArraycopyDstPrefetchDistance >= 4096) |
kvn@3103 | 84 | ArraycopyDstPrefetchDistance = 4064; |
kvn@3103 | 85 | } else { |
kvn@3103 | 86 | if (ArraycopySrcPrefetchDistance > 0) { |
kvn@3103 | 87 | warning("prefetch instructions are not available on this CPU"); |
kvn@3103 | 88 | FLAG_SET_DEFAULT(ArraycopySrcPrefetchDistance, 0); |
kvn@3103 | 89 | } |
kvn@3103 | 90 | if (ArraycopyDstPrefetchDistance > 0) { |
kvn@3103 | 91 | warning("prefetch instructions are not available on this CPU"); |
kvn@3103 | 92 | FLAG_SET_DEFAULT(ArraycopyDstPrefetchDistance, 0); |
kvn@3103 | 93 | } |
kvn@3103 | 94 | } |
kvn@3103 | 95 | |
duke@435 | 96 | UseSSE = 0; // Only on x86 and x64 |
duke@435 | 97 | |
kvn@3052 | 98 | _supports_cx8 = has_v9(); |
duke@435 | 99 | |
kvn@2403 | 100 | if (is_niagara()) { |
duke@435 | 101 | // Indirect branch is the same cost as direct |
duke@435 | 102 | if (FLAG_IS_DEFAULT(UseInlineCaches)) { |
kvn@1110 | 103 | FLAG_SET_DEFAULT(UseInlineCaches, false); |
duke@435 | 104 | } |
kvn@2403 | 105 | // Align loops on a single instruction boundary. |
kvn@2403 | 106 | if (FLAG_IS_DEFAULT(OptoLoopAlignment)) { |
kvn@2403 | 107 | FLAG_SET_DEFAULT(OptoLoopAlignment, 4); |
kvn@2403 | 108 | } |
kvn@2403 | 109 | // When using CMS, we cannot use memset() in BOT updates because |
kvn@2403 | 110 | // the sun4v/CMT version in libc_psr uses BIS which exposes |
kvn@2403 | 111 | // "phantom zeros" to concurrent readers. See 6948537. |
kvn@2403 | 112 | if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) { |
kvn@2403 | 113 | FLAG_SET_DEFAULT(UseMemSetInBOT, false); |
kvn@2403 | 114 | } |
coleenp@548 | 115 | #ifdef _LP64 |
kvn@1077 | 116 | // 32-bit oops don't make sense for the 64-bit VM on sparc |
kvn@1077 | 117 | // since the 32-bit VM has the same registers and smaller objects. |
kvn@1077 | 118 | Universe::set_narrow_oop_shift(LogMinObjAlignmentInBytes); |
coleenp@548 | 119 | #endif // _LP64 |
duke@435 | 120 | #ifdef COMPILER2 |
duke@435 | 121 | // Indirect branch is the same cost as direct |
duke@435 | 122 | if (FLAG_IS_DEFAULT(UseJumpTables)) { |
kvn@1110 | 123 | FLAG_SET_DEFAULT(UseJumpTables, true); |
duke@435 | 124 | } |
duke@435 | 125 | // Single-issue, so entry and loop tops are |
duke@435 | 126 | // aligned on a single instruction boundary |
duke@435 | 127 | if (FLAG_IS_DEFAULT(InteriorEntryAlignment)) { |
kvn@1110 | 128 | FLAG_SET_DEFAULT(InteriorEntryAlignment, 4); |
duke@435 | 129 | } |
kvn@2403 | 130 | if (is_niagara_plus()) { |
kvn@3052 | 131 | if (has_blk_init() && UseTLAB && |
kvn@3052 | 132 | FLAG_IS_DEFAULT(AllocatePrefetchInstr)) { |
kvn@3052 | 133 | // Use BIS instruction for TLAB allocation prefetch. |
kvn@3052 | 134 | FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1); |
kvn@3052 | 135 | if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { |
kvn@3052 | 136 | FLAG_SET_ERGO(intx, AllocatePrefetchStyle, 3); |
kvn@3052 | 137 | } |
kvn@1802 | 138 | if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
kvn@3052 | 139 | // Use smaller prefetch distance with BIS |
kvn@1802 | 140 | FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64); |
kvn@1802 | 141 | } |
kvn@1802 | 142 | } |
kvn@3052 | 143 | if (is_T4()) { |
kvn@3052 | 144 | // Double number of prefetched cache lines on T4 |
kvn@3052 | 145 | // since L2 cache line size is smaller (32 bytes). |
kvn@3052 | 146 | if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) { |
kvn@3052 | 147 | FLAG_SET_ERGO(intx, AllocatePrefetchLines, AllocatePrefetchLines*2); |
kvn@3052 | 148 | } |
kvn@3052 | 149 | if (FLAG_IS_DEFAULT(AllocateInstancePrefetchLines)) { |
kvn@3052 | 150 | FLAG_SET_ERGO(intx, AllocateInstancePrefetchLines, AllocateInstancePrefetchLines*2); |
kvn@3052 | 151 | } |
kvn@3052 | 152 | } |
kvn@1802 | 153 | if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) { |
kvn@1802 | 154 | // Use different prefetch distance without BIS |
kvn@1802 | 155 | FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256); |
kvn@1802 | 156 | } |
kvn@3052 | 157 | if (AllocatePrefetchInstr == 1) { |
kvn@3052 | 158 | // Need a space at the end of TLAB for BIS since it |
kvn@3052 | 159 | // will fault when accessing memory outside of heap. |
kvn@3052 | 160 | |
kvn@3052 | 161 | // +1 for rounding up to next cache line, +1 to be safe |
kvn@3052 | 162 | int lines = AllocatePrefetchLines + 2; |
kvn@3052 | 163 | int step_size = AllocatePrefetchStepSize; |
kvn@3052 | 164 | int distance = AllocatePrefetchDistance; |
kvn@3052 | 165 | _reserve_for_allocation_prefetch = (distance + step_size*lines)/(int)HeapWordSize; |
kvn@3052 | 166 | } |
duke@435 | 167 | } |
duke@435 | 168 | #endif |
duke@435 | 169 | } |
duke@435 | 170 | |
twisti@1078 | 171 | // Use hardware population count instruction if available. |
twisti@1078 | 172 | if (has_hardware_popc()) { |
twisti@1078 | 173 | if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { |
kvn@1110 | 174 | FLAG_SET_DEFAULT(UsePopCountInstruction, true); |
twisti@1078 | 175 | } |
kvn@3037 | 176 | } else if (UsePopCountInstruction) { |
kvn@3037 | 177 | warning("POPC instruction is not available on this CPU"); |
kvn@3037 | 178 | FLAG_SET_DEFAULT(UsePopCountInstruction, false); |
kvn@3037 | 179 | } |
kvn@3037 | 180 | |
kvn@3037 | 181 | // T4 and newer Sparc cpus have new compare and branch instruction. |
kvn@3037 | 182 | if (has_cbcond()) { |
kvn@3037 | 183 | if (FLAG_IS_DEFAULT(UseCBCond)) { |
kvn@3037 | 184 | FLAG_SET_DEFAULT(UseCBCond, true); |
kvn@3037 | 185 | } |
kvn@3037 | 186 | } else if (UseCBCond) { |
kvn@3037 | 187 | warning("CBCOND instruction is not available on this CPU"); |
kvn@3037 | 188 | FLAG_SET_DEFAULT(UseCBCond, false); |
twisti@1078 | 189 | } |
twisti@1078 | 190 | |
kvn@3092 | 191 | assert(BlockZeroingLowLimit > 0, "invalid value"); |
kvn@3092 | 192 | if (has_block_zeroing()) { |
kvn@3092 | 193 | if (FLAG_IS_DEFAULT(UseBlockZeroing)) { |
kvn@3092 | 194 | FLAG_SET_DEFAULT(UseBlockZeroing, true); |
kvn@3092 | 195 | } |
kvn@3092 | 196 | } else if (UseBlockZeroing) { |
kvn@3092 | 197 | warning("BIS zeroing instructions are not available on this CPU"); |
kvn@3092 | 198 | FLAG_SET_DEFAULT(UseBlockZeroing, false); |
kvn@3092 | 199 | } |
kvn@3092 | 200 | |
kvn@3103 | 201 | assert(BlockCopyLowLimit > 0, "invalid value"); |
kvn@3103 | 202 | if (has_block_zeroing()) { // has_blk_init() && is_T4(): core's local L2 cache |
kvn@3103 | 203 | if (FLAG_IS_DEFAULT(UseBlockCopy)) { |
kvn@3103 | 204 | FLAG_SET_DEFAULT(UseBlockCopy, true); |
kvn@3103 | 205 | } |
kvn@3103 | 206 | } else if (UseBlockCopy) { |
kvn@3103 | 207 | warning("BIS instructions are not available or expensive on this CPU"); |
kvn@3103 | 208 | FLAG_SET_DEFAULT(UseBlockCopy, false); |
kvn@3103 | 209 | } |
kvn@3103 | 210 | |
never@2085 | 211 | #ifdef COMPILER2 |
kvn@3037 | 212 | // T4 and newer Sparc cpus have fast RDPC. |
kvn@3037 | 213 | if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) { |
twisti@3249 | 214 | FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true); |
kvn@3037 | 215 | } |
kvn@3037 | 216 | |
never@2085 | 217 | // Currently not supported anywhere. |
never@2085 | 218 | FLAG_SET_DEFAULT(UseFPUForSpilling, false); |
kvn@3049 | 219 | |
kvn@3049 | 220 | assert((InteriorEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
never@2085 | 221 | #endif |
never@2085 | 222 | |
kvn@3049 | 223 | assert((CodeEntryAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
kvn@3049 | 224 | assert((OptoLoopAlignment % relocInfo::addr_unit()) == 0, "alignment is not a multiple of NOP size"); |
kvn@3049 | 225 | |
duke@435 | 226 | char buf[512]; |
kvn@3037 | 227 | jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s", |
kvn@3037 | 228 | (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")), |
twisti@1078 | 229 | (has_hardware_popc() ? ", popc" : ""), |
kvn@3037 | 230 | (has_vis1() ? ", vis1" : ""), |
kvn@3037 | 231 | (has_vis2() ? ", vis2" : ""), |
kvn@3037 | 232 | (has_vis3() ? ", vis3" : ""), |
kvn@3037 | 233 | (has_blk_init() ? ", blk_init" : ""), |
kvn@3037 | 234 | (has_cbcond() ? ", cbcond" : ""), |
kvn@3037 | 235 | (is_ultra3() ? ", ultra3" : ""), |
kvn@3037 | 236 | (is_sun4v() ? ", sun4v" : ""), |
kvn@3037 | 237 | (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")), |
kvn@3037 | 238 | (is_sparc64() ? ", sparc64" : ""), |
twisti@1076 | 239 | (!has_hardware_mul32() ? ", no-mul32" : ""), |
twisti@1076 | 240 | (!has_hardware_div32() ? ", no-div32" : ""), |
duke@435 | 241 | (!has_hardware_fsmuld() ? ", no-fsmuld" : "")); |
duke@435 | 242 | |
duke@435 | 243 | // buf is started with ", " or is empty |
duke@435 | 244 | _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf); |
duke@435 | 245 | |
kvn@3001 | 246 | // UseVIS is set to the smallest of what hardware supports and what |
kvn@3001 | 247 | // the command line requires. I.e., you cannot set UseVIS to 3 on |
kvn@3001 | 248 | // older UltraSparc which do not support it. |
kvn@3001 | 249 | if (UseVIS > 3) UseVIS=3; |
kvn@3001 | 250 | if (UseVIS < 0) UseVIS=0; |
kvn@3001 | 251 | if (!has_vis3()) // Drop to 2 if no VIS3 support |
kvn@3001 | 252 | UseVIS = MIN2((intx)2,UseVIS); |
kvn@3001 | 253 | if (!has_vis2()) // Drop to 1 if no VIS2 support |
kvn@3001 | 254 | UseVIS = MIN2((intx)1,UseVIS); |
kvn@3001 | 255 | if (!has_vis1()) // Drop to 0 if no VIS1 support |
kvn@3001 | 256 | UseVIS = 0; |
kvn@3001 | 257 | |
duke@435 | 258 | #ifndef PRODUCT |
duke@435 | 259 | if (PrintMiscellaneous && Verbose) { |
kvn@3052 | 260 | tty->print("Allocation"); |
duke@435 | 261 | if (AllocatePrefetchStyle <= 0) { |
kvn@3052 | 262 | tty->print_cr(": no prefetching"); |
duke@435 | 263 | } else { |
kvn@3052 | 264 | tty->print(" prefetching: "); |
kvn@3052 | 265 | if (AllocatePrefetchInstr == 0) { |
kvn@3052 | 266 | tty->print("PREFETCH"); |
kvn@3052 | 267 | } else if (AllocatePrefetchInstr == 1) { |
kvn@3052 | 268 | tty->print("BIS"); |
kvn@3052 | 269 | } |
duke@435 | 270 | if (AllocatePrefetchLines > 1) { |
kvn@3052 | 271 | tty->print_cr(" at distance %d, %d lines of %d bytes", AllocatePrefetchDistance, AllocatePrefetchLines, AllocatePrefetchStepSize); |
duke@435 | 272 | } else { |
kvn@3052 | 273 | tty->print_cr(" at distance %d, one line of %d bytes", AllocatePrefetchDistance, AllocatePrefetchStepSize); |
duke@435 | 274 | } |
duke@435 | 275 | } |
duke@435 | 276 | if (PrefetchCopyIntervalInBytes > 0) { |
duke@435 | 277 | tty->print_cr("PrefetchCopyIntervalInBytes %d", PrefetchCopyIntervalInBytes); |
duke@435 | 278 | } |
duke@435 | 279 | if (PrefetchScanIntervalInBytes > 0) { |
duke@435 | 280 | tty->print_cr("PrefetchScanIntervalInBytes %d", PrefetchScanIntervalInBytes); |
duke@435 | 281 | } |
duke@435 | 282 | if (PrefetchFieldsAhead > 0) { |
duke@435 | 283 | tty->print_cr("PrefetchFieldsAhead %d", PrefetchFieldsAhead); |
duke@435 | 284 | } |
duke@435 | 285 | } |
duke@435 | 286 | #endif // PRODUCT |
duke@435 | 287 | } |
duke@435 | 288 | |
duke@435 | 289 | void VM_Version::print_features() { |
duke@435 | 290 | tty->print_cr("Version:%s", cpu_features()); |
duke@435 | 291 | } |
duke@435 | 292 | |
duke@435 | 293 | int VM_Version::determine_features() { |
duke@435 | 294 | if (UseV8InstrsOnly) { |
duke@435 | 295 | NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-V8");) |
duke@435 | 296 | return generic_v8_m; |
duke@435 | 297 | } |
duke@435 | 298 | |
duke@435 | 299 | int features = platform_features(unknown_m); // platform_features() is os_arch specific |
duke@435 | 300 | |
duke@435 | 301 | if (features == unknown_m) { |
duke@435 | 302 | features = generic_v9_m; |
duke@435 | 303 | warning("Cannot recognize SPARC version. Default to V9"); |
duke@435 | 304 | } |
duke@435 | 305 | |
kvn@2403 | 306 | assert(is_T_family(features) == is_niagara(features), "Niagara should be T series"); |
kvn@2403 | 307 | if (UseNiagaraInstrs) { // Force code generation for Niagara |
kvn@2403 | 308 | if (is_T_family(features)) { |
duke@435 | 309 | // Happy to accomodate... |
duke@435 | 310 | } else { |
duke@435 | 311 | NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Niagara");) |
kvn@2403 | 312 | features |= T_family_m; |
duke@435 | 313 | } |
duke@435 | 314 | } else { |
kvn@2403 | 315 | if (is_T_family(features) && !FLAG_IS_DEFAULT(UseNiagaraInstrs)) { |
duke@435 | 316 | NOT_PRODUCT(if (PrintMiscellaneous && Verbose) tty->print_cr("Version is Forced-Not-Niagara");) |
kvn@2403 | 317 | features &= ~(T_family_m | T1_model_m); |
duke@435 | 318 | } else { |
duke@435 | 319 | // Happy to accomodate... |
duke@435 | 320 | } |
duke@435 | 321 | } |
duke@435 | 322 | |
duke@435 | 323 | return features; |
duke@435 | 324 | } |
duke@435 | 325 | |
duke@435 | 326 | static int saved_features = 0; |
duke@435 | 327 | |
duke@435 | 328 | void VM_Version::allow_all() { |
duke@435 | 329 | saved_features = _features; |
duke@435 | 330 | _features = all_features_m; |
duke@435 | 331 | } |
duke@435 | 332 | |
duke@435 | 333 | void VM_Version::revert() { |
duke@435 | 334 | _features = saved_features; |
duke@435 | 335 | } |
jmasa@445 | 336 | |
jmasa@445 | 337 | unsigned int VM_Version::calc_parallel_worker_threads() { |
jmasa@445 | 338 | unsigned int result; |
kvn@2403 | 339 | if (is_niagara_plus()) { |
jmasa@445 | 340 | result = nof_parallel_worker_threads(5, 16, 8); |
jmasa@445 | 341 | } else { |
jmasa@445 | 342 | result = nof_parallel_worker_threads(5, 8, 8); |
jmasa@445 | 343 | } |
jmasa@445 | 344 | return result; |
jmasa@445 | 345 | } |