Wed, 29 Mar 2017 09:41:51 +0800
#4662 TieredCompilation is turned off.
TieredCompilation is not supported yet.
aoqi@1 | 1 | /* |
aoqi@1 | 2 | * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. |
aoqi@1 | 3 | * Copyright (c) 2015, 2016, Loongson Technology. All rights reserved. |
aoqi@1 | 4 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
aoqi@1 | 5 | * |
aoqi@1 | 6 | * This code is free software; you can redistribute it and/or modify it |
aoqi@1 | 7 | * under the terms of the GNU General Public License version 2 only, as |
aoqi@1 | 8 | * published by the Free Software Foundation. |
aoqi@1 | 9 | * |
aoqi@1 | 10 | * This code is distributed in the hope that it will be useful, but WITHOUT |
aoqi@1 | 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
aoqi@1 | 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
aoqi@1 | 13 | * version 2 for more details (a copy is included in the LICENSE file that |
aoqi@1 | 14 | * accompanied this code). |
aoqi@1 | 15 | * |
aoqi@1 | 16 | * You should have received a copy of the GNU General Public License version |
aoqi@1 | 17 | * 2 along with this work; if not, write to the Free Software Foundation, |
aoqi@1 | 18 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
aoqi@1 | 19 | * |
aoqi@1 | 20 | * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA |
aoqi@1 | 21 | * or visit www.oracle.com if you need additional information or have any |
aoqi@1 | 22 | * questions. |
aoqi@1 | 23 | * |
aoqi@1 | 24 | */ |
aoqi@1 | 25 | |
aoqi@1 | 26 | #include "precompiled.hpp" |
aoqi@1 | 27 | #include "asm/assembler.hpp" |
aoqi@1 | 28 | #include "asm/assembler.inline.hpp" |
aoqi@1 | 29 | #include "gc_interface/collectedHeap.inline.hpp" |
aoqi@1 | 30 | #include "interpreter/interpreter.hpp" |
aoqi@1 | 31 | #include "memory/cardTableModRefBS.hpp" |
aoqi@1 | 32 | #include "memory/resourceArea.hpp" |
aoqi@1 | 33 | #include "prims/methodHandles.hpp" |
aoqi@1 | 34 | #include "runtime/biasedLocking.hpp" |
aoqi@1 | 35 | #include "runtime/interfaceSupport.hpp" |
aoqi@1 | 36 | #include "runtime/objectMonitor.hpp" |
aoqi@1 | 37 | #include "runtime/os.hpp" |
aoqi@1 | 38 | #include "runtime/sharedRuntime.hpp" |
aoqi@1 | 39 | #include "runtime/stubRoutines.hpp" |
aoqi@1 | 40 | #ifndef SERIALGC |
aoqi@1 | 41 | #include "gc_implementation/g1/g1CollectedHeap.inline.hpp" |
aoqi@1 | 42 | #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp" |
aoqi@1 | 43 | #include "gc_implementation/g1/heapRegion.hpp" |
aoqi@1 | 44 | #endif |
aoqi@1 | 45 | #ifdef PRODUCT |
aoqi@1 | 46 | #define BLOCK_COMMENT(str) /* nothing */ |
aoqi@1 | 47 | #define STOP(error) stop(error) |
aoqi@1 | 48 | #else |
aoqi@1 | 49 | #define BLOCK_COMMENT(str) block_comment(str) |
aoqi@1 | 50 | #define STOP(error) block_comment(error); stop(error) |
aoqi@1 | 51 | #endif |
aoqi@1 | 52 | |
aoqi@1 | 53 | #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") |
aoqi@1 | 54 | |
aoqi@1 | 55 | intptr_t MacroAssembler::i[32] = {0}; |
aoqi@1 | 56 | float MacroAssembler::f[32] = {0.0}; |
aoqi@1 | 57 | |
aoqi@1 | 58 | void MacroAssembler::print(outputStream *s) { |
aoqi@1 | 59 | unsigned int k; |
aoqi@1 | 60 | for(k=0; k<sizeof(i)/sizeof(i[0]); k++) { |
aoqi@1 | 61 | s->print_cr("i%d = 0x%.16lx", k, i[k]); |
aoqi@1 | 62 | } |
aoqi@1 | 63 | s->cr(); |
aoqi@1 | 64 | |
aoqi@1 | 65 | for(k=0; k<sizeof(f)/sizeof(f[0]); k++) { |
aoqi@1 | 66 | s->print_cr("f%d = %f", k, f[k]); |
aoqi@1 | 67 | } |
aoqi@1 | 68 | s->cr(); |
aoqi@1 | 69 | } |
aoqi@1 | 70 | |
aoqi@1 | 71 | |
aoqi@1 | 72 | int MacroAssembler::i_offset(unsigned int k) { return (intptr_t)&((MacroAssembler*)0)->i[k]; } |
aoqi@1 | 73 | int MacroAssembler::f_offset(unsigned int k) { return (intptr_t)&((MacroAssembler*)0)->f[k]; } |
aoqi@1 | 74 | |
aoqi@1 | 75 | void MacroAssembler::save_registers(MacroAssembler *masm) { |
aoqi@1 | 76 | #define __ masm-> |
aoqi@1 | 77 | for(int k=0; k<32; k++) { |
aoqi@1 | 78 | __ sw (as_Register(k), A0, i_offset(k)); |
aoqi@1 | 79 | } |
aoqi@1 | 80 | |
aoqi@1 | 81 | for(int k=0; k<32; k++) { |
aoqi@1 | 82 | __ swc1 (as_FloatRegister(k), A0, f_offset(k)); |
aoqi@1 | 83 | } |
aoqi@1 | 84 | #undef __ |
aoqi@1 | 85 | } |
aoqi@1 | 86 | |
aoqi@1 | 87 | void MacroAssembler::restore_registers(MacroAssembler *masm) { |
aoqi@1 | 88 | #define __ masm-> |
aoqi@1 | 89 | for(int k=0; k<32; k++) { |
aoqi@1 | 90 | __ lw (as_Register(k), A0, i_offset(k)); |
aoqi@1 | 91 | } |
aoqi@1 | 92 | |
aoqi@1 | 93 | for(int k=0; k<32; k++) { |
aoqi@1 | 94 | __ lwc1 (as_FloatRegister(k), A0, f_offset(k)); |
aoqi@1 | 95 | } |
aoqi@1 | 96 | #undef __ |
aoqi@1 | 97 | } |
aoqi@1 | 98 | |
aoqi@1 | 99 | |
aoqi@1 | 100 | // Implementation of AddressLiteral |
aoqi@1 | 101 | |
aoqi@1 | 102 | AddressLiteral::AddressLiteral(address target, relocInfo::relocType rtype) { |
aoqi@1 | 103 | _is_lval = false; |
aoqi@1 | 104 | _target = target; |
aoqi@1 | 105 | _rspec = rspec_from_rtype(rtype, target); |
aoqi@1 | 106 | } |
aoqi@1 | 107 | |
aoqi@1 | 108 | // Implementation of Address |
aoqi@1 | 109 | |
aoqi@1 | 110 | |
aoqi@1 | 111 | Address Address::make_array(ArrayAddress adr) { |
aoqi@1 | 112 | AddressLiteral base = adr.base(); |
aoqi@1 | 113 | Address index = adr.index(); |
aoqi@1 | 114 | assert(index._disp == 0, "must not have disp"); // maybe it can? |
aoqi@1 | 115 | Address array(index._base, index._index, index._scale, (intptr_t) base.target()); |
aoqi@1 | 116 | array._rspec = base._rspec; |
aoqi@1 | 117 | return array; |
aoqi@1 | 118 | } |
aoqi@1 | 119 | |
aoqi@1 | 120 | // exceedingly dangerous constructor |
aoqi@1 | 121 | Address::Address(address loc, RelocationHolder spec) { |
aoqi@1 | 122 | _base = noreg; |
aoqi@1 | 123 | _index = noreg; |
aoqi@1 | 124 | _scale = no_scale; |
aoqi@1 | 125 | _disp = (intptr_t) loc; |
aoqi@1 | 126 | _rspec = spec; |
aoqi@1 | 127 | } |
aoqi@1 | 128 | |
aoqi@1 | 129 | |
aoqi@1 | 130 | // Implementation of Assembler |
aoqi@1 | 131 | const char *Assembler::ops_name[] = { |
aoqi@1 | 132 | "special", "regimm", "j", "jal", "beq", "bne", "blez", "bgtz", |
aoqi@1 | 133 | "addi", "addiu", "slti", "sltiu", "andi", "ori", "xori", "lui", |
aoqi@1 | 134 | "cop0", "cop1", "cop2", "cop3", "beql", "bnel", "bleql", "bgtzl", |
aoqi@1 | 135 | "daddi", "daddiu", "ldl", "ldr", "", "", "", "", |
aoqi@1 | 136 | "lb", "lh", "lwl", "lw", "lbu", "lhu", "lwr", "lwu", |
aoqi@1 | 137 | "sb", "sh", "swl", "sw", "sdl", "sdr", "swr", "cache", |
aoqi@1 | 138 | "ll", "lwc1", "", "", "lld", "ldc1", "", "ld", |
aoqi@1 | 139 | "sc", "swc1", "", "", "scd", "sdc1", "", "sd" |
aoqi@1 | 140 | }; |
aoqi@1 | 141 | |
aoqi@1 | 142 | const char* Assembler::special_name[] = { |
aoqi@1 | 143 | "sll", "", "srl", "sra", "sllv", "", "srlv", "srav", |
fujie@38 | 144 | "jr", "jalr", "movz", "movn", "syscall", "break", "", "sync", |
aoqi@1 | 145 | "mfhi", "mthi", "mflo", "mtlo", "dsll", "", "dsrl", "dsra", |
aoqi@1 | 146 | "mult", "multu", "div", "divu", "dmult", "dmultu", "ddiv", "ddivu", |
aoqi@1 | 147 | "add", "addu", "sub", "subu", "and", "or", "xor", "nor", |
aoqi@1 | 148 | "", "", "slt", "sltu", "dadd", "daddu", "dsub", "dsubu", |
aoqi@1 | 149 | "tge", "tgeu", "tlt", "tltu", "teq", "", "tne", "", |
aoqi@1 | 150 | "dsll", "", "dsrl", "dsra", "dsll32", "", "dsrl32", "dsra32" |
aoqi@1 | 151 | }; |
aoqi@1 | 152 | |
aoqi@199 | 153 | const char* Assembler::cop1_name[] = { |
aoqi@339 | 154 | "add", "sub", "mul", "div", "sqrt", "abs", "mov", "neg", |
aoqi@339 | 155 | "round.l", "trunc.l", "ceil.l", "floor.l", "round.w", "trunc.w", "ceil.w", "floor.w", |
aoqi@339 | 156 | "", "", "", "", "", "", "", "", |
aoqi@339 | 157 | "", "", "", "", "", "", "", "", |
aoqi@339 | 158 | "", "", "", "", "", "", "", "", |
aoqi@339 | 159 | "", "", "", "", "", "", "", "", |
aoqi@339 | 160 | "c.f", "c.un", "c.eq", "c.ueq", "c.olt", "c.ult", "c.ole", "c.ule", |
aoqi@339 | 161 | "c.sf", "c.ngle", "c.seq", "c.ngl", "c.lt", "c.nge", "c.le", "c.ngt" |
aoqi@199 | 162 | }; |
aoqi@199 | 163 | |
aoqi@199 | 164 | const char* Assembler::cop1x_name[] = { |
aoqi@199 | 165 | "lwxc1", "ldxc1", "", "", "", "luxc1", "", "", |
aoqi@199 | 166 | "swxc1", "sdxc1", "", "", "", "suxc1", "", "prefx", |
aoqi@199 | 167 | "", "", "", "", "", "", "alnv.ps", "", |
aoqi@199 | 168 | "", "", "", "", "", "", "", "", |
aoqi@199 | 169 | "madd.s", "madd.d", "", "", "", "", "madd.ps", "", |
aoqi@199 | 170 | "msub.s", "msub.d", "", "", "", "", "msub.ps", "", |
aoqi@199 | 171 | "nmadd.s", "nmadd.d", "", "", "", "", "nmadd.ps", "", |
aoqi@199 | 172 | "nmsub.s", "nmsub.d", "", "", "", "", "nmsub.ps", "" |
aoqi@199 | 173 | }; |
aoqi@199 | 174 | |
fujie@41 | 175 | const char* Assembler::special2_name[] = { |
fujie@47 | 176 | "madd", "", "mul", "", "msub", "", "", "", |
fujie@41 | 177 | "", "", "", "", "", "", "", "", |
fujie@54 | 178 | "", "gsdmult", "", "", "gsdiv", "gsddiv", "", "", |
fujie@55 | 179 | "", "", "", "", "gsmod", "gsdmod", "", "", |
fujie@41 | 180 | "", "", "", "", "", "", "", "", |
fujie@41 | 181 | "", "", "", "", "", "", "", "", |
fujie@41 | 182 | "", "", "", "", "", "", "", "", |
fujie@41 | 183 | "", "", "", "", "", "", "", "" |
fujie@41 | 184 | }; |
fujie@41 | 185 | |
aoqi@199 | 186 | const char* Assembler::special3_name[] = { |
fujie@294 | 187 | "ext", "", "", "", "ins", "dinsm", "dinsu", "dins", |
aoqi@199 | 188 | "", "", "", "", "", "", "", "", |
aoqi@199 | 189 | "", "", "", "", "", "", "", "", |
aoqi@199 | 190 | "", "", "", "", "", "", "", "", |
fujie@256 | 191 | "bshfl", "", "", "", "", "", "", "", |
aoqi@199 | 192 | "", "", "", "", "", "", "", "", |
aoqi@199 | 193 | "", "", "", "", "", "", "", "", |
aoqi@199 | 194 | "", "", "", "", "", "", "", "", |
aoqi@199 | 195 | }; |
aoqi@199 | 196 | |
aoqi@1 | 197 | const char* Assembler::regimm_name[] = { |
aoqi@1 | 198 | "bltz", "bgez", "bltzl", "bgezl", "", "", "", "", |
aoqi@1 | 199 | "tgei", "tgeiu", "tlti", "tltiu", "teqi", "", "tnei", "", |
aoqi@1 | 200 | "bltzal", "bgezal", "bltzall", "bgezall" |
aoqi@1 | 201 | }; |
aoqi@1 | 202 | |
fujie@44 | 203 | const char* Assembler::gs_ldc2_name[] = { |
fujie@75 | 204 | "gslbx", "gslhx", "gslwx", "gsldx", "", "", "gslwxc1", "gsldxc1" |
fujie@44 | 205 | }; |
fujie@44 | 206 | |
lifangyuan@125 | 207 | |
lifangyuan@125 | 208 | const char* Assembler::gs_lwc2_name[] = { |
jiangshaofeng@362 | 209 | "", "", "", "", "", "", "", "", |
jiangshaofeng@362 | 210 | "", "", "", "", "", "", "", "", |
jiangshaofeng@362 | 211 | "gslble", "gslbgt", "gslhle", "gslhgt", "gslwle", "gslwgt", "gsldle", "gsldgt", |
jiangshaofeng@362 | 212 | "", "", "", "gslwlec1", "gslwgtc1", "gsldlec1", "gsldgtc1", "",/*LWDIR, LWPTE, LDDIR and LDPTE have the same low 6 bits.*/ |
jiangshaofeng@362 | 213 | "gslq", "" |
lifangyuan@125 | 214 | }; |
lifangyuan@125 | 215 | |
fujie@65 | 216 | const char* Assembler::gs_sdc2_name[] = { |
fujie@76 | 217 | "gssbx", "gsshx", "gsswx", "gssdx", "", "", "gsswxc1", "gssdxc1" |
fujie@65 | 218 | }; |
fujie@65 | 219 | |
lifangyuan@125 | 220 | const char* Assembler::gs_swc2_name[] = { |
jiangshaofeng@362 | 221 | "", "", "", "", "", "", "", "", |
jiangshaofeng@362 | 222 | "", "", "", "", "", "", "", "", |
jiangshaofeng@362 | 223 | "gssble", "gssbgt", "gsshle", "gsshgt", "gsswle", "gsswgt", "gssdle", "gssdgt", |
jiangshaofeng@362 | 224 | "", "", "", "", "gsswlec1", "gsswgtc1", "gssdlec1", "gssdgtc1", |
jiangshaofeng@362 | 225 | "gssq", "" |
lifangyuan@125 | 226 | }; |
lifangyuan@125 | 227 | |
aoqi@1 | 228 | //misleading name, print only branch/jump instruction |
aoqi@1 | 229 | void Assembler::print_instruction(int inst) { |
aoqi@1 | 230 | const char *s; |
aoqi@1 | 231 | switch( opcode(inst) ) { |
aoqi@1 | 232 | default: |
aoqi@1 | 233 | s = ops_name[opcode(inst)]; |
aoqi@1 | 234 | break; |
aoqi@1 | 235 | case special_op: |
aoqi@1 | 236 | s = special_name[special(inst)]; |
aoqi@1 | 237 | break; |
aoqi@1 | 238 | case regimm_op: |
aoqi@1 | 239 | s = special_name[rt(inst)]; |
aoqi@1 | 240 | break; |
aoqi@1 | 241 | } |
aoqi@1 | 242 | |
aoqi@1 | 243 | ::tty->print("%s", s); |
aoqi@1 | 244 | } |
aoqi@1 | 245 | |
aoqi@1 | 246 | void MacroAssembler::pd_patch_instruction(address branch, address target) { |
aoqi@1 | 247 | jint& stub_inst = *(jint*) branch; |
aoqi@1 | 248 | |
aoqi@1 | 249 | /* * |
aoqi@1 | 250 | move(AT, RA); // dadd |
aoqi@1 | 251 | emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); |
aoqi@1 | 252 | nop(); |
aoqi@1 | 253 | lui(T9, 0); // to be patched |
aoqi@1 | 254 | ori(T9, 0); |
aoqi@1 | 255 | daddu(T9, T9, RA); |
aoqi@1 | 256 | move(RA, AT); |
aoqi@1 | 257 | jr(T9); |
aoqi@1 | 258 | */ |
aoqi@1 | 259 | if(special(stub_inst) == dadd_op) { |
aoqi@1 | 260 | jint *pc = (jint *)branch; |
aoqi@1 | 261 | |
aoqi@1 | 262 | assert(opcode(pc[3]) == lui_op |
aoqi@1 | 263 | && opcode(pc[4]) == ori_op |
aoqi@1 | 264 | && special(pc[5]) == daddu_op, "Not a branch label patch"); |
aoqi@1 | 265 | if(!(opcode(pc[3]) == lui_op |
aoqi@1 | 266 | && opcode(pc[4]) == ori_op |
aoqi@1 | 267 | && special(pc[5]) == daddu_op)) { tty->print_cr("Not a branch label patch"); } |
aoqi@1 | 268 | |
aoqi@1 | 269 | int offset = target - branch; |
aoqi@1 | 270 | if (!is_simm16(offset)) |
aoqi@1 | 271 | { |
aoqi@1 | 272 | pc[3] = (pc[3] & 0xffff0000) | high16(offset - 12); |
aoqi@1 | 273 | pc[4] = (pc[4] & 0xffff0000) | low16(offset - 12); |
aoqi@1 | 274 | } |
aoqi@1 | 275 | else |
aoqi@1 | 276 | { |
aoqi@1 | 277 | /* revert to "beq + nop" */ |
aoqi@1 | 278 | CodeBuffer cb(branch, 4 * 10); |
aoqi@1 | 279 | MacroAssembler masm(&cb); |
aoqi@1 | 280 | #define __ masm. |
aoqi@1 | 281 | __ b(target); |
aoqi@1 | 282 | __ nop(); |
aoqi@1 | 283 | __ nop(); |
aoqi@1 | 284 | __ nop(); |
aoqi@1 | 285 | __ nop(); |
aoqi@1 | 286 | __ nop(); |
aoqi@1 | 287 | __ nop(); |
aoqi@1 | 288 | __ nop(); |
aoqi@1 | 289 | } |
aoqi@1 | 290 | return; |
aoqi@1 | 291 | } |
aoqi@1 | 292 | |
aoqi@1 | 293 | #ifndef PRODUCT |
aoqi@1 | 294 | if (!is_simm16((target - branch - 4) >> 2)) |
aoqi@1 | 295 | { |
aoqi@1 | 296 | tty->print_cr("Illegal patching: target=0x%lx", target); |
aoqi@1 | 297 | int *p = (int *)branch; |
aoqi@1 | 298 | for (int i = -10; i < 10; i++) |
aoqi@1 | 299 | { |
aoqi@1 | 300 | tty->print("0x%lx, ", p[i]); |
aoqi@1 | 301 | } |
aoqi@1 | 302 | tty->print_cr(""); |
aoqi@1 | 303 | } |
aoqi@1 | 304 | #endif |
aoqi@1 | 305 | |
aoqi@1 | 306 | stub_inst = patched_branch(target - branch, stub_inst, 0); |
aoqi@1 | 307 | } |
aoqi@1 | 308 | |
fujie@293 | 309 | int Assembler::is_int_mask(int x) { |
fujie@293 | 310 | int xx = x; |
fujie@293 | 311 | int count = 0; |
fujie@293 | 312 | |
fujie@293 | 313 | while (x != 0) { |
fujie@293 | 314 | x &= (x - 1); |
fujie@293 | 315 | count++; |
fujie@293 | 316 | } |
fujie@293 | 317 | |
fujie@293 | 318 | if ((1<<count) == (xx+1)) { |
fujie@293 | 319 | return count; |
fujie@293 | 320 | } else { |
fujie@293 | 321 | return -1; |
fujie@293 | 322 | } |
fujie@293 | 323 | } |
fujie@293 | 324 | |
fujie@301 | 325 | int Assembler::is_jlong_mask(jlong x) { |
fujie@301 | 326 | jlong xx = x; |
fujie@301 | 327 | int count = 0; |
fujie@301 | 328 | |
fujie@301 | 329 | while (x != 0) { |
fujie@301 | 330 | x &= (x - 1); |
fujie@301 | 331 | count++; |
fujie@301 | 332 | } |
fujie@301 | 333 | |
fujie@301 | 334 | if ((1<<count) == (xx+1)) { |
fujie@301 | 335 | return count; |
fujie@301 | 336 | } else { |
fujie@301 | 337 | return -1; |
fujie@301 | 338 | } |
fujie@301 | 339 | } |
fujie@301 | 340 | |
aoqi@1 | 341 | //without check, maybe fixed |
aoqi@1 | 342 | int Assembler::patched_branch(int dest_pos, int inst, int inst_pos) { |
aoqi@1 | 343 | int v = (dest_pos - inst_pos - 4)>>2; |
aoqi@1 | 344 | switch(opcode(inst)) { |
aoqi@1 | 345 | case j_op: |
aoqi@1 | 346 | case jal_op: |
aoqi@1 | 347 | assert(false, "should not use j/jal here"); |
aoqi@1 | 348 | break; |
aoqi@1 | 349 | default: |
aoqi@1 | 350 | assert(is_simm16(v), "must be simm16"); |
aoqi@1 | 351 | #ifndef PRODUCT |
aoqi@1 | 352 | if(!is_simm16(v)) |
aoqi@1 | 353 | { |
aoqi@1 | 354 | tty->print_cr("must be simm16"); |
aoqi@1 | 355 | tty->print_cr("Inst: %lx", inst); |
aoqi@1 | 356 | } |
aoqi@1 | 357 | #endif |
aoqi@1 | 358 | |
aoqi@1 | 359 | v = low16(v); |
aoqi@1 | 360 | inst &= 0xffff0000; |
aoqi@1 | 361 | break; |
aoqi@1 | 362 | } |
aoqi@1 | 363 | |
aoqi@1 | 364 | return inst | v; |
aoqi@1 | 365 | } |
aoqi@1 | 366 | |
aoqi@1 | 367 | int Assembler::branch_destination(int inst, int pos) { |
aoqi@1 | 368 | int off; |
aoqi@1 | 369 | |
aoqi@1 | 370 | switch(opcode(inst)) { |
aoqi@1 | 371 | case j_op: |
aoqi@1 | 372 | case jal_op: |
aoqi@1 | 373 | assert(false, "should not use j/jal here"); |
aoqi@1 | 374 | break; |
aoqi@1 | 375 | default: |
aoqi@1 | 376 | off = expand(low16(inst), 15); |
aoqi@1 | 377 | break; |
aoqi@1 | 378 | } |
aoqi@1 | 379 | |
aoqi@1 | 380 | return off ? pos + 4 + (off<<2) : 0; |
aoqi@1 | 381 | } |
aoqi@1 | 382 | |
aoqi@1 | 383 | int AbstractAssembler::code_fill_byte() { |
aoqi@1 | 384 | return 0x00; // illegal instruction 0x00000000 |
aoqi@1 | 385 | } |
aoqi@1 | 386 | |
aoqi@1 | 387 | // Now the Assembler instruction (identical for 32/64 bits) |
aoqi@1 | 388 | |
aoqi@1 | 389 | void Assembler::lb(Register rt, Address src) { |
aoqi@1 | 390 | lb(rt, src.base(), src.disp()); |
aoqi@1 | 391 | } |
aoqi@1 | 392 | |
aoqi@1 | 393 | void Assembler::lbu(Register rt, Address src) { |
aoqi@1 | 394 | lbu(rt, src.base(), src.disp()); |
aoqi@1 | 395 | } |
aoqi@1 | 396 | |
aoqi@1 | 397 | void Assembler::ld(Register rt, Address src){ |
aoqi@1 | 398 | ld(rt, src.base(), src.disp()); |
aoqi@1 | 399 | } |
aoqi@1 | 400 | |
aoqi@1 | 401 | void Assembler::ldl(Register rt, Address src){ |
aoqi@1 | 402 | ldl(rt, src.base(), src.disp()); |
aoqi@1 | 403 | } |
aoqi@1 | 404 | |
aoqi@1 | 405 | void Assembler::ldr(Register rt, Address src){ |
aoqi@1 | 406 | ldr(rt, src.base(), src.disp()); |
aoqi@1 | 407 | } |
aoqi@1 | 408 | |
aoqi@1 | 409 | void Assembler::lh(Register rt, Address src){ |
aoqi@1 | 410 | lh(rt, src.base(), src.disp()); |
aoqi@1 | 411 | } |
aoqi@1 | 412 | |
aoqi@1 | 413 | void Assembler::lhu(Register rt, Address src){ |
aoqi@1 | 414 | lhu(rt, src.base(), src.disp()); |
aoqi@1 | 415 | } |
aoqi@1 | 416 | |
aoqi@1 | 417 | void Assembler::ll(Register rt, Address src){ |
aoqi@1 | 418 | ll(rt, src.base(), src.disp()); |
aoqi@1 | 419 | } |
aoqi@1 | 420 | |
aoqi@1 | 421 | void Assembler::lld(Register rt, Address src){ |
aoqi@1 | 422 | lld(rt, src.base(), src.disp()); |
aoqi@1 | 423 | } |
aoqi@1 | 424 | |
aoqi@1 | 425 | void Assembler::lw(Register rt, Address src){ |
aoqi@1 | 426 | lw(rt, src.base(), src.disp()); |
aoqi@1 | 427 | } |
aoqi@1 | 428 | void Assembler::lea(Register rt, Address src) { |
aoqi@1 | 429 | #ifdef _LP64 |
aoqi@1 | 430 | daddi(rt, src.base(), src.disp()); |
aoqi@1 | 431 | #else |
aoqi@1 | 432 | addi(rt, src.base(), src.disp()); |
aoqi@1 | 433 | #endif |
aoqi@1 | 434 | } |
aoqi@1 | 435 | |
aoqi@1 | 436 | void Assembler::lwl(Register rt, Address src){ |
aoqi@1 | 437 | lwl(rt, src.base(), src.disp()); |
aoqi@1 | 438 | } |
aoqi@1 | 439 | |
aoqi@1 | 440 | void Assembler::lwr(Register rt, Address src){ |
aoqi@1 | 441 | lwr(rt, src.base(), src.disp()); |
aoqi@1 | 442 | } |
aoqi@1 | 443 | |
aoqi@1 | 444 | void Assembler::lwu(Register rt, Address src){ |
aoqi@1 | 445 | lwu(rt, src.base(), src.disp()); |
aoqi@1 | 446 | } |
aoqi@1 | 447 | |
aoqi@1 | 448 | void Assembler::sb(Register rt, Address dst) { |
aoqi@1 | 449 | sb(rt, dst.base(), dst.disp()); |
aoqi@1 | 450 | } |
aoqi@1 | 451 | |
aoqi@1 | 452 | void Assembler::sc(Register rt, Address dst) { |
aoqi@1 | 453 | sc(rt, dst.base(), dst.disp()); |
aoqi@1 | 454 | } |
aoqi@1 | 455 | |
aoqi@1 | 456 | void Assembler::scd(Register rt, Address dst) { |
aoqi@1 | 457 | scd(rt, dst.base(), dst.disp()); |
aoqi@1 | 458 | } |
aoqi@1 | 459 | |
aoqi@1 | 460 | void Assembler::sd(Register rt, Address dst) { |
aoqi@1 | 461 | sd(rt, dst.base(), dst.disp()); |
aoqi@1 | 462 | } |
aoqi@1 | 463 | |
aoqi@1 | 464 | void Assembler::sdl(Register rt, Address dst) { |
aoqi@1 | 465 | sdl(rt, dst.base(), dst.disp()); |
aoqi@1 | 466 | } |
aoqi@1 | 467 | |
aoqi@1 | 468 | void Assembler::sdr(Register rt, Address dst) { |
aoqi@1 | 469 | sdr(rt, dst.base(), dst.disp()); |
aoqi@1 | 470 | } |
aoqi@1 | 471 | |
aoqi@1 | 472 | void Assembler::sh(Register rt, Address dst) { |
aoqi@1 | 473 | sh(rt, dst.base(), dst.disp()); |
aoqi@1 | 474 | } |
aoqi@1 | 475 | |
aoqi@1 | 476 | void Assembler::sw(Register rt, Address dst) { |
aoqi@1 | 477 | sw(rt, dst.base(), dst.disp()); |
aoqi@1 | 478 | } |
aoqi@1 | 479 | |
aoqi@1 | 480 | void Assembler::swl(Register rt, Address dst) { |
aoqi@1 | 481 | swl(rt, dst.base(), dst.disp()); |
aoqi@1 | 482 | } |
aoqi@1 | 483 | |
aoqi@1 | 484 | void Assembler::swr(Register rt, Address dst) { |
aoqi@1 | 485 | swr(rt, dst.base(), dst.disp()); |
aoqi@1 | 486 | } |
aoqi@1 | 487 | |
aoqi@1 | 488 | void Assembler::lwc1(FloatRegister rt, Address src) { |
aoqi@1 | 489 | lwc1(rt, src.base(), src.disp()); |
aoqi@1 | 490 | } |
aoqi@1 | 491 | |
aoqi@1 | 492 | void Assembler::ldc1(FloatRegister rt, Address src) { |
aoqi@1 | 493 | ldc1(rt, src.base(), src.disp()); |
aoqi@1 | 494 | } |
aoqi@1 | 495 | |
aoqi@1 | 496 | void Assembler::swc1(FloatRegister rt, Address dst) { |
aoqi@1 | 497 | swc1(rt, dst.base(), dst.disp()); |
aoqi@1 | 498 | } |
aoqi@1 | 499 | |
aoqi@1 | 500 | void Assembler::sdc1(FloatRegister rt, Address dst) { |
aoqi@1 | 501 | sdc1(rt, dst.base(), dst.disp()); |
aoqi@1 | 502 | } |
aoqi@1 | 503 | |
aoqi@1 | 504 | void Assembler::j(address entry) { |
fujie@378 | 505 | #ifdef MIPS64 |
fujie@378 | 506 | int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xfffffffff0000000))>>2; |
fujie@378 | 507 | #else |
aoqi@1 | 508 | int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xf0000000))>>2; |
fujie@378 | 509 | #endif |
aoqi@1 | 510 | emit_long((j_op<<26) | dest); |
aoqi@1 | 511 | has_delay_slot(); |
aoqi@1 | 512 | } |
aoqi@1 | 513 | |
aoqi@1 | 514 | void Assembler::jal(address entry) { |
fujie@378 | 515 | #ifdef MIPS64 |
fujie@378 | 516 | int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xfffffffff0000000))>>2; |
fujie@378 | 517 | #else |
aoqi@1 | 518 | int dest = ((intptr_t)entry - (((intptr_t)pc() + 4) & 0xf0000000))>>2; |
fujie@378 | 519 | #endif |
aoqi@1 | 520 | emit_long((jal_op<<26) | dest); |
aoqi@1 | 521 | has_delay_slot(); |
aoqi@1 | 522 | } |
aoqi@1 | 523 | |
fujie@381 | 524 | static inline address first_cache_address() { |
fujie@381 | 525 | return CodeCache::low_bound() + sizeof(HeapBlock::Header); |
fujie@378 | 526 | } |
fujie@378 | 527 | |
fujie@381 | 528 | static inline address last_cache_address() { |
fujie@381 | 529 | return CodeCache::high_bound() - Assembler::InstructionSize; |
fujie@381 | 530 | } |
fujie@381 | 531 | |
fujie@381 | 532 | int MacroAssembler::call_size(address target, bool far, bool patchable) { |
fujie@381 | 533 | if (patchable) return 6 << Assembler::LogInstructionSize; |
fujie@381 | 534 | if (!far) return 2 << Assembler::LogInstructionSize; // jal + nop |
fujie@381 | 535 | return (insts_for_set64((jlong)target) + 2) << Assembler::LogInstructionSize; |
fujie@381 | 536 | } |
fujie@381 | 537 | |
fujie@381 | 538 | // Can we reach target using jal/j from anywhere |
fujie@381 | 539 | // in the code cache (because code can be relocated)? |
fujie@381 | 540 | bool MacroAssembler::reachable_from_cache(address target) { |
fujie@381 | 541 | address cl = first_cache_address(); |
fujie@381 | 542 | address ch = last_cache_address(); |
fujie@381 | 543 | |
fujie@381 | 544 | return fit_in_jal(target, cl) && fit_in_jal(target, ch); |
fujie@381 | 545 | } |
fujie@381 | 546 | |
fujie@381 | 547 | void MacroAssembler::general_jump(address target) { |
fujie@381 | 548 | if (reachable_from_cache(target)) { |
fujie@381 | 549 | j(target); |
fujie@381 | 550 | nop(); |
fujie@381 | 551 | } else { |
fujie@381 | 552 | set64(T9, (long)target); |
fujie@381 | 553 | jr(T9); |
fujie@381 | 554 | nop(); |
fujie@381 | 555 | } |
fujie@381 | 556 | } |
fujie@381 | 557 | |
fujie@381 | 558 | void MacroAssembler::patchable_jump(address target) { |
fujie@381 | 559 | if (reachable_from_cache(target)) { |
fujie@381 | 560 | nop(); |
fujie@381 | 561 | nop(); |
fujie@381 | 562 | nop(); |
fujie@381 | 563 | nop(); |
fujie@381 | 564 | j(target); |
fujie@381 | 565 | nop(); |
fujie@381 | 566 | } else { |
fujie@381 | 567 | patchable_set48(T9, (long)target); |
fujie@381 | 568 | jr(T9); |
fujie@381 | 569 | nop(); |
fujie@381 | 570 | } |
fujie@381 | 571 | } |
fujie@381 | 572 | |
fujie@381 | 573 | void MacroAssembler::general_call(address target) { |
fujie@381 | 574 | if (reachable_from_cache(target)) { |
fujie@381 | 575 | jal(target); |
fujie@381 | 576 | nop(); |
fujie@381 | 577 | } else { |
fujie@381 | 578 | set64(T9, (long)target); |
fujie@381 | 579 | jalr(T9); |
fujie@381 | 580 | nop(); |
fujie@381 | 581 | } |
fujie@381 | 582 | } |
fujie@381 | 583 | |
fujie@381 | 584 | void MacroAssembler::patchable_call(address target) { |
fujie@381 | 585 | if (reachable_from_cache(target)) { |
fujie@381 | 586 | nop(); |
fujie@381 | 587 | nop(); |
fujie@381 | 588 | nop(); |
fujie@381 | 589 | nop(); |
fujie@381 | 590 | jal(target); |
fujie@381 | 591 | nop(); |
fujie@381 | 592 | } else { |
fujie@381 | 593 | patchable_set48(T9, (long)target); |
fujie@381 | 594 | jalr(T9); |
fujie@381 | 595 | nop(); |
fujie@381 | 596 | } |
fujie@378 | 597 | } |
fujie@378 | 598 | |
aoqi@1 | 599 | void MacroAssembler::beq_far(Register rs, Register rt, address entry) |
aoqi@1 | 600 | { |
aoqi@1 | 601 | u_char * cur_pc = pc(); |
aoqi@1 | 602 | |
aoqi@1 | 603 | /* Jin: Near/Far jump */ |
aoqi@1 | 604 | if(is_simm16((entry - pc() - 4) / 4)) |
aoqi@1 | 605 | { |
aoqi@1 | 606 | Assembler::beq(rs, rt, offset(entry)); |
aoqi@1 | 607 | } |
aoqi@1 | 608 | else |
aoqi@1 | 609 | { |
aoqi@1 | 610 | Label not_jump; |
aoqi@1 | 611 | bne(rs, rt, not_jump); |
aoqi@1 | 612 | delayed()->nop(); |
aoqi@1 | 613 | |
aoqi@1 | 614 | b_far(entry); |
aoqi@1 | 615 | delayed()->nop(); |
aoqi@1 | 616 | |
aoqi@1 | 617 | bind(not_jump); |
aoqi@1 | 618 | has_delay_slot(); |
aoqi@1 | 619 | } |
aoqi@1 | 620 | } |
aoqi@1 | 621 | |
aoqi@1 | 622 | void MacroAssembler::beq_far(Register rs, Register rt, Label& L) |
aoqi@1 | 623 | { |
aoqi@1 | 624 | if (L.is_bound()) { |
aoqi@1 | 625 | beq_far(rs, rt, target(L)); |
aoqi@1 | 626 | } else { |
aoqi@1 | 627 | u_char * cur_pc = pc(); |
aoqi@1 | 628 | Label not_jump; |
aoqi@1 | 629 | bne(rs, rt, not_jump); |
aoqi@1 | 630 | delayed()->nop(); |
aoqi@1 | 631 | |
aoqi@1 | 632 | b_far(L); |
aoqi@1 | 633 | delayed()->nop(); |
aoqi@1 | 634 | |
aoqi@1 | 635 | bind(not_jump); |
aoqi@1 | 636 | has_delay_slot(); |
aoqi@1 | 637 | } |
aoqi@1 | 638 | } |
aoqi@1 | 639 | |
aoqi@1 | 640 | void MacroAssembler::bne_far(Register rs, Register rt, address entry) |
aoqi@1 | 641 | { |
aoqi@1 | 642 | u_char * cur_pc = pc(); |
aoqi@1 | 643 | |
aoqi@1 | 644 | /* Jin: Near/Far jump */ |
aoqi@1 | 645 | if(is_simm16((entry - pc() - 4) / 4)) |
aoqi@1 | 646 | { |
aoqi@1 | 647 | Assembler::bne(rs, rt, offset(entry)); |
aoqi@1 | 648 | } |
aoqi@1 | 649 | else |
aoqi@1 | 650 | { |
aoqi@1 | 651 | Label not_jump; |
aoqi@1 | 652 | beq(rs, rt, not_jump); |
aoqi@1 | 653 | delayed()->nop(); |
aoqi@1 | 654 | |
aoqi@1 | 655 | b_far(entry); |
aoqi@1 | 656 | delayed()->nop(); |
aoqi@1 | 657 | |
aoqi@1 | 658 | bind(not_jump); |
aoqi@1 | 659 | has_delay_slot(); |
aoqi@1 | 660 | } |
aoqi@1 | 661 | } |
aoqi@1 | 662 | |
aoqi@1 | 663 | void MacroAssembler::bne_far(Register rs, Register rt, Label& L) |
aoqi@1 | 664 | { |
aoqi@1 | 665 | if (L.is_bound()) { |
aoqi@1 | 666 | bne_far(rs, rt, target(L)); |
aoqi@1 | 667 | } else { |
aoqi@1 | 668 | u_char * cur_pc = pc(); |
aoqi@1 | 669 | Label not_jump; |
aoqi@1 | 670 | beq(rs, rt, not_jump); |
aoqi@1 | 671 | delayed()->nop(); |
aoqi@1 | 672 | |
aoqi@1 | 673 | b_far(L); |
aoqi@1 | 674 | delayed()->nop(); |
aoqi@1 | 675 | |
aoqi@1 | 676 | bind(not_jump); |
aoqi@1 | 677 | has_delay_slot(); |
aoqi@1 | 678 | } |
aoqi@1 | 679 | } |
aoqi@1 | 680 | |
aoqi@1 | 681 | void MacroAssembler::b_far(Label& L) |
aoqi@1 | 682 | { |
aoqi@1 | 683 | if (L.is_bound()) { |
aoqi@1 | 684 | b_far(target(L)); |
aoqi@1 | 685 | } else { |
aoqi@1 | 686 | volatile address dest = target(L); |
aoqi@1 | 687 | /* |
aoqi@1 | 688 | MacroAssembler::pd_patch_instruction branch=55651ed514, target=55651ef6d8 |
aoqi@1 | 689 | 0x00000055651ed514: dadd at, ra, zero |
aoqi@1 | 690 | 0x00000055651ed518: [4110001]bgezal zero, 0x00000055651ed520 |
aoqi@1 | 691 | |
aoqi@1 | 692 | 0x00000055651ed51c: sll zero, zero, 0 |
aoqi@1 | 693 | 0x00000055651ed520: lui t9, 0x0 |
aoqi@1 | 694 | 0x00000055651ed524: ori t9, t9, 0x21b8 |
aoqi@1 | 695 | 0x00000055651ed528: daddu t9, t9, ra |
aoqi@1 | 696 | 0x00000055651ed52c: dadd ra, at, zero |
aoqi@1 | 697 | 0x00000055651ed530: jr t9 |
aoqi@1 | 698 | 0x00000055651ed534: sll zero, zero, 0 |
aoqi@1 | 699 | */ |
aoqi@1 | 700 | move(AT, RA); |
aoqi@1 | 701 | emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); |
aoqi@1 | 702 | nop(); |
aoqi@1 | 703 | lui(T9, 0); // to be patched |
aoqi@1 | 704 | ori(T9, T9, 0); |
aoqi@1 | 705 | daddu(T9, T9, RA); |
aoqi@1 | 706 | move(RA, AT); |
aoqi@1 | 707 | jr(T9); |
aoqi@1 | 708 | } |
aoqi@1 | 709 | } |
aoqi@1 | 710 | |
aoqi@1 | 711 | void MacroAssembler::b_far(address entry) |
aoqi@1 | 712 | { |
aoqi@1 | 713 | u_char * cur_pc = pc(); |
aoqi@1 | 714 | |
aoqi@1 | 715 | /* Jin: Near/Far jump */ |
aoqi@1 | 716 | if(is_simm16((entry - pc() - 4) / 4)) |
aoqi@1 | 717 | { |
aoqi@1 | 718 | b(offset(entry)); |
aoqi@1 | 719 | } |
aoqi@1 | 720 | else |
aoqi@1 | 721 | { |
aoqi@1 | 722 | /* address must be bounded */ |
aoqi@1 | 723 | move(AT, RA); |
aoqi@1 | 724 | emit_long(insn_ORRI(regimm_op, 0, bgezal_op, 1)); |
aoqi@1 | 725 | nop(); |
aoqi@1 | 726 | li32(T9, entry - pc()); |
aoqi@1 | 727 | daddu(T9, T9, RA); |
aoqi@1 | 728 | move(RA, AT); |
aoqi@1 | 729 | jr(T9); |
aoqi@1 | 730 | } |
aoqi@1 | 731 | } |
aoqi@1 | 732 | |
aoqi@1 | 733 | // Implementation of MacroAssembler |
aoqi@1 | 734 | |
aoqi@1 | 735 | // First all the versions that have distinct versions depending on 32/64 bit |
aoqi@1 | 736 | // Unless the difference is trivial (1 line or so). |
aoqi@1 | 737 | |
aoqi@1 | 738 | //#ifndef _LP64 |
aoqi@1 | 739 | |
aoqi@1 | 740 | // 32bit versions |
aoqi@1 | 741 | |
aoqi@1 | 742 | void MacroAssembler::ld_ptr(Register rt, Register offset, Register base) { |
aoqi@1 | 743 | addu_long(AT, base, offset); |
aoqi@1 | 744 | ld_ptr(rt, 0, AT); |
aoqi@1 | 745 | } |
aoqi@1 | 746 | |
aoqi@1 | 747 | void MacroAssembler::st_ptr(Register rt, Register offset, Register base) { |
aoqi@1 | 748 | addu_long(AT, base, offset); |
aoqi@1 | 749 | st_ptr(rt, 0, AT); |
aoqi@1 | 750 | } |
aoqi@1 | 751 | |
aoqi@1 | 752 | void MacroAssembler::ld_long(Register rt, Register offset, Register base) { |
aoqi@1 | 753 | addu_long(AT, base, offset); |
aoqi@1 | 754 | ld_long(rt, 0, AT); |
aoqi@1 | 755 | } |
aoqi@1 | 756 | |
aoqi@1 | 757 | void MacroAssembler::st_long(Register rt, Register offset, Register base) { |
aoqi@1 | 758 | addu_long(AT, base, offset); |
aoqi@1 | 759 | st_long(rt, 0, AT); |
aoqi@1 | 760 | } |
aoqi@1 | 761 | |
aoqi@1 | 762 | Address MacroAssembler::as_Address(AddressLiteral adr) { |
aoqi@1 | 763 | return Address(adr.target(), adr.rspec()); |
aoqi@1 | 764 | } |
aoqi@1 | 765 | |
aoqi@1 | 766 | Address MacroAssembler::as_Address(ArrayAddress adr) { |
aoqi@1 | 767 | return Address::make_array(adr); |
aoqi@1 | 768 | } |
aoqi@1 | 769 | |
aoqi@29 | 770 | // tmp_reg1 and tmp_reg2 should be saved outside of atomic_inc32 (caller saved). |
aoqi@29 | 771 | void MacroAssembler::atomic_inc32(address counter_addr, int inc, Register tmp_reg1, Register tmp_reg2) { |
aoqi@29 | 772 | Label again; |
aoqi@29 | 773 | |
aoqi@175 | 774 | li(tmp_reg1, counter_addr); |
aoqi@29 | 775 | bind(again); |
fujie@389 | 776 | if(!Use3A2000) sync(); |
aoqi@29 | 777 | ll(tmp_reg2, tmp_reg1, 0); |
aoqi@29 | 778 | addi(tmp_reg2, tmp_reg2, inc); |
aoqi@29 | 779 | sc(tmp_reg2, tmp_reg1, 0); |
aoqi@29 | 780 | beq(tmp_reg2, R0, again); |
aoqi@29 | 781 | delayed()->nop(); |
aoqi@29 | 782 | } |
aoqi@1 | 783 | int MacroAssembler::biased_locking_enter(Register lock_reg, |
aoqi@1 | 784 | Register obj_reg, |
aoqi@1 | 785 | Register swap_reg, |
aoqi@1 | 786 | Register tmp_reg, |
aoqi@1 | 787 | bool swap_reg_contains_mark, |
aoqi@1 | 788 | Label& done, |
aoqi@1 | 789 | Label* slow_case, |
aoqi@1 | 790 | BiasedLockingCounters* counters) { |
aoqi@1 | 791 | assert(UseBiasedLocking, "why call this otherwise?"); |
aoqi@1 | 792 | bool need_tmp_reg = false; |
aoqi@1 | 793 | if (tmp_reg == noreg) { |
aoqi@1 | 794 | need_tmp_reg = true; |
aoqi@18 | 795 | tmp_reg = T9; |
aoqi@1 | 796 | } |
aoqi@18 | 797 | assert_different_registers(lock_reg, obj_reg, swap_reg, tmp_reg, AT); |
aoqi@1 | 798 | assert(markOopDesc::age_shift == markOopDesc::lock_bits + markOopDesc::biased_lock_bits, "biased locking makes assumptions about bit layout"); |
aoqi@1 | 799 | Address mark_addr (obj_reg, oopDesc::mark_offset_in_bytes()); |
aoqi@1 | 800 | Address saved_mark_addr(lock_reg, 0); |
aoqi@1 | 801 | |
aoqi@1 | 802 | // Biased locking |
aoqi@1 | 803 | // See whether the lock is currently biased toward our thread and |
aoqi@1 | 804 | // whether the epoch is still valid |
aoqi@1 | 805 | // Note that the runtime guarantees sufficient alignment of JavaThread |
aoqi@1 | 806 | // pointers to allow age to be placed into low bits |
aoqi@1 | 807 | // First check to see whether biasing is even enabled for this object |
aoqi@1 | 808 | Label cas_label; |
aoqi@1 | 809 | int null_check_offset = -1; |
aoqi@1 | 810 | if (!swap_reg_contains_mark) { |
aoqi@1 | 811 | null_check_offset = offset(); |
aoqi@1 | 812 | ld_ptr(swap_reg, mark_addr); |
aoqi@1 | 813 | } |
aoqi@1 | 814 | |
aoqi@1 | 815 | if (need_tmp_reg) { |
aoqi@1 | 816 | push(tmp_reg); |
aoqi@1 | 817 | } |
aoqi@1 | 818 | move(tmp_reg, swap_reg); |
aoqi@1 | 819 | andi(tmp_reg, tmp_reg, markOopDesc::biased_lock_mask_in_place); |
aoqi@1 | 820 | #ifdef _LP64 |
aoqi@31 | 821 | daddi(AT, R0, markOopDesc::biased_lock_pattern); |
aoqi@1 | 822 | dsub(AT, AT, tmp_reg); |
aoqi@1 | 823 | #else |
aoqi@31 | 824 | addi(AT, R0, markOopDesc::biased_lock_pattern); |
aoqi@1 | 825 | sub(AT, AT, tmp_reg); |
aoqi@1 | 826 | #endif |
aoqi@1 | 827 | if (need_tmp_reg) { |
aoqi@1 | 828 | pop(tmp_reg); |
aoqi@1 | 829 | } |
aoqi@1 | 830 | |
aoqi@1 | 831 | bne(AT, R0, cas_label); |
aoqi@1 | 832 | delayed()->nop(); |
aoqi@1 | 833 | |
aoqi@1 | 834 | |
aoqi@1 | 835 | // The bias pattern is present in the object's header. Need to check |
aoqi@1 | 836 | // whether the bias owner and the epoch are both still current. |
aoqi@31 | 837 | // Note that because there is no current thread register on MIPS we |
aoqi@1 | 838 | // need to store off the mark word we read out of the object to |
aoqi@1 | 839 | // avoid reloading it and needing to recheck invariants below. This |
aoqi@1 | 840 | // store is unfortunate but it makes the overall code shorter and |
aoqi@1 | 841 | // simpler. |
aoqi@31 | 842 | st_ptr(swap_reg, saved_mark_addr); |
aoqi@1 | 843 | if (need_tmp_reg) { |
aoqi@1 | 844 | push(tmp_reg); |
aoqi@1 | 845 | } |
aoqi@1 | 846 | if (swap_reg_contains_mark) { |
aoqi@1 | 847 | null_check_offset = offset(); |
aoqi@1 | 848 | } |
aoqi@1 | 849 | load_prototype_header(tmp_reg, obj_reg); |
aoqi@31 | 850 | xorr(tmp_reg, tmp_reg, swap_reg); |
aoqi@31 | 851 | get_thread(swap_reg); |
aoqi@31 | 852 | xorr(swap_reg, swap_reg, tmp_reg); |
aoqi@31 | 853 | |
aoqi@31 | 854 | move(AT, ~((int) markOopDesc::age_mask_in_place)); |
aoqi@31 | 855 | andr(swap_reg, swap_reg, AT); |
aoqi@1 | 856 | |
aoqi@29 | 857 | if (PrintBiasedLockingStatistics) { |
aoqi@29 | 858 | Label L; |
aoqi@29 | 859 | bne(swap_reg, R0, L); |
aoqi@29 | 860 | delayed()->nop(); |
aoqi@175 | 861 | push(tmp_reg); |
aoqi@175 | 862 | push(A0); |
aoqi@175 | 863 | atomic_inc32((address)BiasedLocking::biased_lock_entry_count_addr(), 1, A0, tmp_reg); |
aoqi@175 | 864 | pop(A0); |
aoqi@175 | 865 | pop(tmp_reg); |
aoqi@29 | 866 | bind(L); |
aoqi@29 | 867 | } |
aoqi@1 | 868 | if (need_tmp_reg) { |
aoqi@1 | 869 | pop(tmp_reg); |
aoqi@1 | 870 | } |
aoqi@31 | 871 | beq(swap_reg, R0, done); |
aoqi@1 | 872 | delayed()->nop(); |
aoqi@1 | 873 | Label try_revoke_bias; |
aoqi@1 | 874 | Label try_rebias; |
aoqi@1 | 875 | |
aoqi@1 | 876 | // At this point we know that the header has the bias pattern and |
aoqi@1 | 877 | // that we are not the bias owner in the current epoch. We need to |
aoqi@1 | 878 | // figure out more details about the state of the header in order to |
aoqi@1 | 879 | // know what operations can be legally performed on the object's |
aoqi@1 | 880 | // header. |
aoqi@1 | 881 | |
aoqi@1 | 882 | // If the low three bits in the xor result aren't clear, that means |
aoqi@1 | 883 | // the prototype header is no longer biased and we have to revoke |
aoqi@1 | 884 | // the bias on this object. |
aoqi@1 | 885 | |
aoqi@31 | 886 | move(AT, markOopDesc::biased_lock_mask_in_place); |
aoqi@31 | 887 | andr(AT, swap_reg, AT); |
aoqi@31 | 888 | bne(AT, R0, try_revoke_bias); |
aoqi@1 | 889 | delayed()->nop(); |
aoqi@1 | 890 | // Biasing is still enabled for this data type. See whether the |
aoqi@1 | 891 | // epoch of the current bias is still valid, meaning that the epoch |
aoqi@1 | 892 | // bits of the mark word are equal to the epoch bits of the |
aoqi@1 | 893 | // prototype header. (Note that the prototype header's epoch bits |
aoqi@1 | 894 | // only change at a safepoint.) If not, attempt to rebias the object |
aoqi@1 | 895 | // toward the current thread. Note that we must be absolutely sure |
aoqi@1 | 896 | // that the current epoch is invalid in order to do this because |
aoqi@1 | 897 | // otherwise the manipulations it performs on the mark word are |
aoqi@1 | 898 | // illegal. |
aoqi@1 | 899 | |
aoqi@1 | 900 | move(AT, markOopDesc::epoch_mask_in_place); |
aoqi@31 | 901 | andr(AT,swap_reg, AT); |
aoqi@31 | 902 | bne(AT, R0, try_rebias); |
aoqi@1 | 903 | delayed()->nop(); |
aoqi@1 | 904 | // The epoch of the current bias is still valid but we know nothing |
aoqi@1 | 905 | // about the owner; it might be set or it might be clear. Try to |
aoqi@1 | 906 | // acquire the bias of the object using an atomic operation. If this |
aoqi@1 | 907 | // fails we will go in to the runtime to revoke the object's bias. |
aoqi@1 | 908 | // Note that we first construct the presumed unbiased header so we |
aoqi@1 | 909 | // don't accidentally blow away another thread's valid bias. |
aoqi@1 | 910 | |
aoqi@1 | 911 | ld_ptr(swap_reg, saved_mark_addr); |
aoqi@1 | 912 | |
aoqi@1 | 913 | move(AT, markOopDesc::biased_lock_mask_in_place | markOopDesc::age_mask_in_place | markOopDesc::epoch_mask_in_place); |
aoqi@31 | 914 | andr(swap_reg, swap_reg, AT); |
aoqi@1 | 915 | |
aoqi@1 | 916 | if (need_tmp_reg) { |
aoqi@1 | 917 | push(tmp_reg); |
aoqi@1 | 918 | } |
aoqi@1 | 919 | get_thread(tmp_reg); |
aoqi@31 | 920 | orr(tmp_reg, tmp_reg, swap_reg); |
aoqi@1 | 921 | //if (os::is_MP()) { |
aoqi@1 | 922 | // lock(); |
aoqi@31 | 923 | //} |
aoqi@31 | 924 | cmpxchg(tmp_reg, Address(obj_reg, 0), swap_reg); |
aoqi@1 | 925 | if (need_tmp_reg) { |
aoqi@1 | 926 | pop(tmp_reg); |
aoqi@1 | 927 | } |
aoqi@1 | 928 | // If the biasing toward our thread failed, this means that |
aoqi@1 | 929 | // another thread succeeded in biasing it toward itself and we |
aoqi@1 | 930 | // need to revoke that bias. The revocation will occur in the |
aoqi@1 | 931 | // interpreter runtime in the slow case. |
aoqi@1 | 932 | if (PrintBiasedLockingStatistics) { |
aoqi@29 | 933 | Label L; |
aoqi@29 | 934 | bne(AT, R0, L); |
aoqi@29 | 935 | delayed()->nop(); |
aoqi@29 | 936 | push(tmp_reg); |
aoqi@29 | 937 | push(A0); |
aoqi@29 | 938 | atomic_inc32((address)BiasedLocking::anonymously_biased_lock_entry_count_addr(), 1, A0, tmp_reg); |
aoqi@29 | 939 | pop(A0); |
aoqi@29 | 940 | pop(tmp_reg); |
aoqi@29 | 941 | bind(L); |
aoqi@1 | 942 | } |
aoqi@1 | 943 | if (slow_case != NULL) { |
aoqi@31 | 944 | beq_far(AT, R0, *slow_case); |
aoqi@1 | 945 | delayed()->nop(); |
aoqi@1 | 946 | } |
aoqi@1 | 947 | b(done); |
aoqi@1 | 948 | delayed()->nop(); |
aoqi@1 | 949 | |
aoqi@1 | 950 | bind(try_rebias); |
aoqi@1 | 951 | // At this point we know the epoch has expired, meaning that the |
aoqi@1 | 952 | // current "bias owner", if any, is actually invalid. Under these |
aoqi@1 | 953 | // circumstances _only_, we are allowed to use the current header's |
aoqi@1 | 954 | // value as the comparison value when doing the cas to acquire the |
aoqi@1 | 955 | // bias in the current epoch. In other words, we allow transfer of |
aoqi@1 | 956 | // the bias from one thread to another directly in this situation. |
aoqi@1 | 957 | // |
aoqi@1 | 958 | // FIXME: due to a lack of registers we currently blow away the age |
aoqi@1 | 959 | // bits in this situation. Should attempt to preserve them. |
aoqi@1 | 960 | if (need_tmp_reg) { |
aoqi@1 | 961 | push(tmp_reg); |
aoqi@1 | 962 | } |
aoqi@31 | 963 | load_prototype_header(tmp_reg, obj_reg); |
aoqi@31 | 964 | get_thread(swap_reg); |
aoqi@31 | 965 | orr(tmp_reg, tmp_reg, swap_reg); |
aoqi@1 | 966 | ld_ptr(swap_reg, saved_mark_addr); |
aoqi@1 | 967 | |
aoqi@1 | 968 | // if (os::is_MP()) { |
aoqi@1 | 969 | // lock(); |
aoqi@31 | 970 | //} |
aoqi@31 | 971 | cmpxchg(tmp_reg, Address(obj_reg, 0), swap_reg); |
aoqi@1 | 972 | if (need_tmp_reg) { |
aoqi@1 | 973 | pop(tmp_reg); |
aoqi@1 | 974 | } |
aoqi@1 | 975 | // If the biasing toward our thread failed, then another thread |
aoqi@1 | 976 | // succeeded in biasing it toward itself and we need to revoke that |
aoqi@1 | 977 | // bias. The revocation will occur in the runtime in the slow case. |
aoqi@1 | 978 | if (PrintBiasedLockingStatistics) { |
aoqi@29 | 979 | Label L; |
aoqi@29 | 980 | bne(AT, R0, L); |
aoqi@29 | 981 | delayed()->nop(); |
aoqi@29 | 982 | push(AT); |
aoqi@29 | 983 | push(tmp_reg); |
aoqi@29 | 984 | atomic_inc32((address)BiasedLocking::rebiased_lock_entry_count_addr(), 1, AT, tmp_reg); |
aoqi@29 | 985 | pop(tmp_reg); |
aoqi@29 | 986 | pop(AT); |
aoqi@29 | 987 | bind(L); |
aoqi@1 | 988 | } |
aoqi@1 | 989 | if (slow_case != NULL) { |
aoqi@31 | 990 | beq_far(AT, R0, *slow_case); |
aoqi@1 | 991 | delayed()->nop(); |
aoqi@1 | 992 | } |
aoqi@1 | 993 | |
aoqi@1 | 994 | b(done); |
aoqi@1 | 995 | delayed()->nop(); |
aoqi@1 | 996 | bind(try_revoke_bias); |
aoqi@1 | 997 | // The prototype mark in the klass doesn't have the bias bit set any |
aoqi@1 | 998 | // more, indicating that objects of this data type are not supposed |
aoqi@1 | 999 | // to be biased any more. We are going to try to reset the mark of |
aoqi@1 | 1000 | // this object to the prototype value and fall through to the |
aoqi@1 | 1001 | // CAS-based locking scheme. Note that if our CAS fails, it means |
aoqi@1 | 1002 | // that another thread raced us for the privilege of revoking the |
aoqi@1 | 1003 | // bias of this particular object, so it's okay to continue in the |
aoqi@1 | 1004 | // normal locking code. |
aoqi@1 | 1005 | // |
aoqi@1 | 1006 | // FIXME: due to a lack of registers we currently blow away the age |
aoqi@1 | 1007 | // bits in this situation. Should attempt to preserve them. |
aoqi@1 | 1008 | ld_ptr(swap_reg, saved_mark_addr); |
aoqi@1 | 1009 | |
aoqi@1 | 1010 | if (need_tmp_reg) { |
aoqi@1 | 1011 | push(tmp_reg); |
aoqi@1 | 1012 | } |
aoqi@1 | 1013 | load_prototype_header(tmp_reg, obj_reg); |
aoqi@1 | 1014 | //if (os::is_MP()) { |
aoqi@1 | 1015 | // lock(); |
aoqi@1 | 1016 | //} |
aoqi@31 | 1017 | cmpxchg(tmp_reg, Address(obj_reg, 0), swap_reg); |
aoqi@1 | 1018 | if (need_tmp_reg) { |
aoqi@1 | 1019 | pop(tmp_reg); |
aoqi@1 | 1020 | } |
aoqi@1 | 1021 | // Fall through to the normal CAS-based lock, because no matter what |
aoqi@1 | 1022 | // the result of the above CAS, some thread must have succeeded in |
aoqi@1 | 1023 | // removing the bias bit from the object's header. |
aoqi@1 | 1024 | if (PrintBiasedLockingStatistics) { |
aoqi@29 | 1025 | Label L; |
aoqi@29 | 1026 | bne(AT, R0, L); |
aoqi@29 | 1027 | delayed()->nop(); |
aoqi@29 | 1028 | push(AT); |
aoqi@29 | 1029 | push(tmp_reg); |
aoqi@29 | 1030 | atomic_inc32((address)BiasedLocking::revoked_lock_entry_count_addr(), 1, AT, tmp_reg); |
aoqi@29 | 1031 | pop(tmp_reg); |
aoqi@29 | 1032 | pop(AT); |
aoqi@29 | 1033 | bind(L); |
aoqi@1 | 1034 | } |
aoqi@1 | 1035 | |
aoqi@1 | 1036 | bind(cas_label); |
aoqi@1 | 1037 | return null_check_offset; |
aoqi@1 | 1038 | } |
aoqi@1 | 1039 | |
aoqi@1 | 1040 | void MacroAssembler::biased_locking_exit(Register obj_reg, Register temp_reg, Label& done) { |
aoqi@1 | 1041 | assert(UseBiasedLocking, "why call this otherwise?"); |
aoqi@1 | 1042 | |
aoqi@1 | 1043 | // Check for biased locking unlock case, which is a no-op |
aoqi@1 | 1044 | // Note: we do not have to check the thread ID for two reasons. |
aoqi@1 | 1045 | // First, the interpreter checks for IllegalMonitorStateException at |
aoqi@1 | 1046 | // a higher level. Second, if the bias was revoked while we held the |
aoqi@1 | 1047 | // lock, the object could not be rebiased toward another thread, so |
aoqi@1 | 1048 | // the bias bit would be clear. |
aoqi@1 | 1049 | #ifdef _LP64 |
aoqi@1 | 1050 | ld(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); |
aoqi@1 | 1051 | andi(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place); |
aoqi@1 | 1052 | daddi(AT, R0, markOopDesc::biased_lock_pattern); |
aoqi@1 | 1053 | #else |
aoqi@1 | 1054 | lw(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); |
aoqi@1 | 1055 | andi(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place); |
aoqi@1 | 1056 | addi(AT, R0, markOopDesc::biased_lock_pattern); |
aoqi@1 | 1057 | #endif |
aoqi@1 | 1058 | |
aoqi@1 | 1059 | beq(AT, temp_reg, done); |
aoqi@1 | 1060 | delayed()->nop(); |
aoqi@1 | 1061 | } |
aoqi@1 | 1062 | |
aoqi@1 | 1063 | // NOTE: we dont increment the SP after call like the x86 version, maybe this is a problem, FIXME. |
aoqi@1 | 1064 | // by yjl 6/27/2005 |
aoqi@1 | 1065 | // the stack pointer adjustment is needed. see InterpreterMacroAssembler::super_call_VM_leaf |
aoqi@1 | 1066 | // by yjl 7/11/2005 |
aoqi@1 | 1067 | // this method will handle the stack problem, you need not to preserve the stack space for the argument now |
aoqi@1 | 1068 | // by yjl 8/1/2005 |
aoqi@1 | 1069 | void MacroAssembler::call_VM_leaf_base(address entry_point, |
aoqi@1 | 1070 | int number_of_arguments) { |
aoqi@1 | 1071 | //call(RuntimeAddress(entry_point)); |
aoqi@1 | 1072 | //increment(rsp, number_of_arguments * wordSize); |
aoqi@1 | 1073 | Label L, E; |
aoqi@1 | 1074 | |
aoqi@1 | 1075 | assert(number_of_arguments <= 4, "just check"); |
aoqi@1 | 1076 | |
aoqi@1 | 1077 | andi(AT, SP, 0xf); |
aoqi@1 | 1078 | beq(AT, R0, L); |
aoqi@1 | 1079 | delayed()->nop(); |
aoqi@1 | 1080 | daddi(SP, SP, -8); |
aoqi@1 | 1081 | { |
aoqi@1 | 1082 | call(entry_point, relocInfo::runtime_call_type); |
aoqi@1 | 1083 | delayed()->nop(); |
aoqi@1 | 1084 | } |
aoqi@1 | 1085 | daddi(SP, SP, 8); |
aoqi@1 | 1086 | b(E); |
aoqi@1 | 1087 | delayed()->nop(); |
aoqi@1 | 1088 | |
aoqi@1 | 1089 | bind(L); |
aoqi@1 | 1090 | { |
aoqi@1 | 1091 | call(entry_point, relocInfo::runtime_call_type); |
aoqi@1 | 1092 | delayed()->nop(); |
aoqi@1 | 1093 | } |
aoqi@1 | 1094 | bind(E); |
aoqi@1 | 1095 | } |
aoqi@1 | 1096 | |
aoqi@1 | 1097 | |
aoqi@1 | 1098 | void MacroAssembler::jmp(address entry) { |
fujie@368 | 1099 | patchable_set48(T9, (long)entry); |
aoqi@1 | 1100 | jr(T9); |
aoqi@1 | 1101 | } |
aoqi@1 | 1102 | |
aoqi@1 | 1103 | void MacroAssembler::jmp(address entry, relocInfo::relocType rtype) { |
aoqi@1 | 1104 | switch (rtype) { |
aoqi@1 | 1105 | case relocInfo::runtime_call_type: |
aoqi@1 | 1106 | case relocInfo::none: |
aoqi@1 | 1107 | jmp(entry); |
aoqi@1 | 1108 | break; |
aoqi@1 | 1109 | default: |
aoqi@1 | 1110 | { |
aoqi@1 | 1111 | InstructionMark im(this); |
aoqi@1 | 1112 | relocate(rtype); |
fujie@368 | 1113 | patchable_set48(T9, (long)entry); |
aoqi@1 | 1114 | jr(T9); |
aoqi@1 | 1115 | } |
aoqi@1 | 1116 | break; |
aoqi@1 | 1117 | } |
aoqi@1 | 1118 | } |
aoqi@1 | 1119 | |
aoqi@1 | 1120 | void MacroAssembler::call(address entry) { |
aoqi@1 | 1121 | // c/c++ code assume T9 is entry point, so we just always move entry to t9 |
aoqi@1 | 1122 | // maybe there is some more graceful method to handle this. FIXME |
aoqi@1 | 1123 | // by yjl 6/27/2005 |
aoqi@1 | 1124 | // For more info, see class NativeCall. |
aoqi@1 | 1125 | #ifndef _LP64 |
aoqi@1 | 1126 | move(T9, (int)entry); |
aoqi@1 | 1127 | #else |
fujie@368 | 1128 | patchable_set48(T9, (long)entry); |
aoqi@1 | 1129 | #endif |
aoqi@1 | 1130 | jalr(T9); |
aoqi@1 | 1131 | } |
aoqi@1 | 1132 | |
aoqi@1 | 1133 | void MacroAssembler::call(address entry, relocInfo::relocType rtype) { |
aoqi@1 | 1134 | switch (rtype) { |
aoqi@1 | 1135 | case relocInfo::runtime_call_type: |
aoqi@1 | 1136 | case relocInfo::none: |
aoqi@1 | 1137 | call(entry); |
aoqi@1 | 1138 | break; |
aoqi@1 | 1139 | default: |
aoqi@1 | 1140 | { |
aoqi@1 | 1141 | InstructionMark im(this); |
aoqi@1 | 1142 | relocate(rtype); |
aoqi@1 | 1143 | call(entry); |
aoqi@1 | 1144 | } |
aoqi@1 | 1145 | break; |
aoqi@1 | 1146 | } |
aoqi@1 | 1147 | } |
aoqi@1 | 1148 | |
aoqi@1 | 1149 | void MacroAssembler::call(address entry, RelocationHolder& rh) |
aoqi@1 | 1150 | { |
aoqi@1 | 1151 | switch (rh.type()) { |
aoqi@1 | 1152 | case relocInfo::runtime_call_type: |
aoqi@1 | 1153 | case relocInfo::none: |
aoqi@1 | 1154 | call(entry); |
aoqi@1 | 1155 | break; |
aoqi@1 | 1156 | default: |
aoqi@1 | 1157 | { |
aoqi@1 | 1158 | InstructionMark im(this); |
aoqi@1 | 1159 | relocate(rh); |
aoqi@1 | 1160 | call(entry); |
aoqi@1 | 1161 | } |
aoqi@1 | 1162 | break; |
aoqi@1 | 1163 | } |
aoqi@1 | 1164 | } |
aoqi@1 | 1165 | |
aoqi@1 | 1166 | void MacroAssembler::ic_call(address entry) { |
aoqi@1 | 1167 | RelocationHolder rh = virtual_call_Relocation::spec(pc()); |
fujie@366 | 1168 | patchable_set48(IC_Klass, (long)Universe::non_oop_word()); |
aoqi@1 | 1169 | assert(entry != NULL, "call most probably wrong"); |
aoqi@1 | 1170 | InstructionMark im(this); |
aoqi@1 | 1171 | relocate(rh); |
fujie@381 | 1172 | patchable_call(entry); |
aoqi@1 | 1173 | } |
aoqi@1 | 1174 | |
aoqi@1 | 1175 | void MacroAssembler::c2bool(Register r) { |
aoqi@1 | 1176 | Label L; |
aoqi@1 | 1177 | Assembler::beq(r, R0, L); |
aoqi@1 | 1178 | delayed()->nop(); |
aoqi@1 | 1179 | move(r, 1); |
aoqi@1 | 1180 | bind(L); |
aoqi@1 | 1181 | } |
aoqi@1 | 1182 | |
aoqi@1 | 1183 | #ifndef PRODUCT |
aoqi@1 | 1184 | extern "C" void findpc(intptr_t x); |
aoqi@1 | 1185 | #endif |
aoqi@1 | 1186 | |
aoqi@1 | 1187 | void MacroAssembler::debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg) { |
aoqi@1 | 1188 | // In order to get locks to work, we need to fake a in_VM state |
aoqi@1 | 1189 | JavaThread* thread = JavaThread::current(); |
aoqi@1 | 1190 | JavaThreadState saved_state = thread->thread_state(); |
aoqi@1 | 1191 | thread->set_thread_state(_thread_in_vm); |
aoqi@1 | 1192 | if (ShowMessageBoxOnError) { |
aoqi@1 | 1193 | JavaThread* thread = JavaThread::current(); |
aoqi@1 | 1194 | JavaThreadState saved_state = thread->thread_state(); |
aoqi@1 | 1195 | thread->set_thread_state(_thread_in_vm); |
aoqi@1 | 1196 | if (CountBytecodes || TraceBytecodes || StopInterpreterAt) { |
aoqi@1 | 1197 | ttyLocker ttyl; |
aoqi@1 | 1198 | BytecodeCounter::print(); |
aoqi@1 | 1199 | } |
aoqi@1 | 1200 | // To see where a verify_oop failed, get $ebx+40/X for this frame. |
aoqi@1 | 1201 | // This is the value of eip which points to where verify_oop will return. |
aoqi@1 | 1202 | if (os::message_box(msg, "Execution stopped, print registers?")) { |
aoqi@1 | 1203 | ttyLocker ttyl; |
aoqi@1 | 1204 | tty->print_cr("eip = 0x%08x", eip); |
aoqi@1 | 1205 | #ifndef PRODUCT |
aoqi@1 | 1206 | tty->cr(); |
aoqi@1 | 1207 | findpc(eip); |
aoqi@1 | 1208 | tty->cr(); |
aoqi@1 | 1209 | #endif |
aoqi@1 | 1210 | tty->print_cr("rax, = 0x%08x", rax); |
aoqi@1 | 1211 | tty->print_cr("rbx, = 0x%08x", rbx); |
aoqi@1 | 1212 | tty->print_cr("rcx = 0x%08x", rcx); |
aoqi@1 | 1213 | tty->print_cr("rdx = 0x%08x", rdx); |
aoqi@1 | 1214 | tty->print_cr("rdi = 0x%08x", rdi); |
aoqi@1 | 1215 | tty->print_cr("rsi = 0x%08x", rsi); |
aoqi@1 | 1216 | tty->print_cr("rbp, = 0x%08x", rbp); |
aoqi@1 | 1217 | tty->print_cr("rsp = 0x%08x", rsp); |
aoqi@1 | 1218 | BREAKPOINT; |
aoqi@1 | 1219 | } |
aoqi@1 | 1220 | } else { |
aoqi@1 | 1221 | ttyLocker ttyl; |
aoqi@1 | 1222 | ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", msg); |
aoqi@1 | 1223 | assert(false, "DEBUG MESSAGE"); |
aoqi@1 | 1224 | } |
aoqi@1 | 1225 | ThreadStateTransition::transition(thread, _thread_in_vm, saved_state); |
aoqi@1 | 1226 | } |
aoqi@1 | 1227 | |
aoqi@1 | 1228 | void MacroAssembler::debug(char* msg/*, RegistersForDebugging* regs*/) { |
aoqi@1 | 1229 | if ( ShowMessageBoxOnError ) { |
aoqi@1 | 1230 | JavaThreadState saved_state = JavaThread::current()->thread_state(); |
aoqi@1 | 1231 | JavaThread::current()->set_thread_state(_thread_in_vm); |
aoqi@1 | 1232 | { |
aoqi@1 | 1233 | // In order to get locks work, we need to fake a in_VM state |
aoqi@1 | 1234 | ttyLocker ttyl; |
aoqi@1 | 1235 | ::tty->print_cr("EXECUTION STOPPED: %s\n", msg); |
aoqi@1 | 1236 | if (CountBytecodes || TraceBytecodes || StopInterpreterAt) { |
aoqi@1 | 1237 | BytecodeCounter::print(); |
aoqi@1 | 1238 | } |
aoqi@1 | 1239 | |
aoqi@1 | 1240 | // if (os::message_box(msg, "Execution stopped, print registers?")) |
aoqi@1 | 1241 | // regs->print(::tty); |
aoqi@1 | 1242 | } |
aoqi@1 | 1243 | ThreadStateTransition::transition(JavaThread::current(), _thread_in_vm, saved_state); |
aoqi@1 | 1244 | } |
aoqi@1 | 1245 | else |
aoqi@1 | 1246 | ::tty->print_cr("=============== DEBUG MESSAGE: %s ================\n", msg); |
aoqi@1 | 1247 | } |
aoqi@1 | 1248 | |
aoqi@1 | 1249 | |
aoqi@1 | 1250 | void MacroAssembler::stop(const char* msg) { |
aoqi@1 | 1251 | li(A0, (long)msg); |
aoqi@1 | 1252 | #ifndef _LP64 |
aoqi@1 | 1253 | //reserver space for argument. added by yjl 7/10/2005 |
aoqi@1 | 1254 | addiu(SP, SP, - 1 * wordSize); |
aoqi@1 | 1255 | #endif |
aoqi@1 | 1256 | call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); |
aoqi@1 | 1257 | delayed()->nop(); |
aoqi@1 | 1258 | #ifndef _LP64 |
aoqi@1 | 1259 | //restore space for argument |
aoqi@1 | 1260 | addiu(SP, SP, 1 * wordSize); |
aoqi@1 | 1261 | #endif |
aoqi@1 | 1262 | brk(17); |
aoqi@1 | 1263 | } |
aoqi@1 | 1264 | |
aoqi@1 | 1265 | void MacroAssembler::warn(const char* msg) { |
aoqi@1 | 1266 | #ifdef _LP64 |
aoqi@1 | 1267 | pushad(); |
aoqi@1 | 1268 | li(A0, (long)msg); |
aoqi@131 | 1269 | push(S2); |
aoqi@131 | 1270 | move(AT, -(StackAlignmentInBytes)); |
aoqi@131 | 1271 | move(S2, SP); // use S2 as a sender SP holder |
aoqi@131 | 1272 | andr(SP, SP, AT); // align stack as required by ABI |
aoqi@1 | 1273 | call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); |
aoqi@1 | 1274 | delayed()->nop(); |
aoqi@131 | 1275 | move(SP, S2); // use S2 as a sender SP holder |
aoqi@131 | 1276 | pop(S2); |
aoqi@1 | 1277 | popad(); |
aoqi@1 | 1278 | #else |
aoqi@1 | 1279 | pushad(); |
aoqi@1 | 1280 | addi(SP, SP, -4); |
aoqi@1 | 1281 | sw(A0, SP, -1 * wordSize); |
aoqi@1 | 1282 | li(A0, (long)msg); |
aoqi@1 | 1283 | addi(SP, SP, -1 * wordSize); |
aoqi@1 | 1284 | call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); |
aoqi@1 | 1285 | delayed()->nop(); |
aoqi@1 | 1286 | addi(SP, SP, 1 * wordSize); |
aoqi@1 | 1287 | lw(A0, SP, -1 * wordSize); |
aoqi@1 | 1288 | addi(SP, SP, 4); |
aoqi@1 | 1289 | popad(); |
aoqi@1 | 1290 | #endif |
aoqi@1 | 1291 | } |
aoqi@1 | 1292 | |
aoqi@1 | 1293 | void MacroAssembler::print_reg(Register reg) { |
aoqi@1 | 1294 | /* |
aoqi@1 | 1295 | char *s = getenv("PRINT_REG"); |
aoqi@1 | 1296 | if (s == NULL) |
aoqi@1 | 1297 | return; |
aoqi@1 | 1298 | if (strcmp(s, "1") != 0) |
aoqi@1 | 1299 | return; |
aoqi@1 | 1300 | */ |
aoqi@1 | 1301 | void * cur_pc = pc(); |
aoqi@1 | 1302 | pushad(); |
aoqi@1 | 1303 | NOT_LP64(push(FP);) |
aoqi@1 | 1304 | |
aoqi@1 | 1305 | li(A0, (long)reg->name()); |
aoqi@1 | 1306 | if (reg == SP) |
aoqi@1 | 1307 | addiu(A1, SP, wordSize * 23); //23 registers saved in pushad() |
aoqi@9 | 1308 | else if (reg == A0) |
aoqi@9 | 1309 | ld(A1, SP, wordSize * 19); //A0 has been modified by li(A0, (long)reg->name()). Ugly Code! |
aoqi@1 | 1310 | else |
aoqi@1 | 1311 | move(A1, reg); |
aoqi@1 | 1312 | li(A2, (long)cur_pc); |
aoqi@101 | 1313 | push(S2); |
aoqi@101 | 1314 | move(AT, -(StackAlignmentInBytes)); |
aoqi@101 | 1315 | move(S2, SP); // use S2 as a sender SP holder |
aoqi@101 | 1316 | andr(SP, SP, AT); // align stack as required by ABI |
aoqi@1 | 1317 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_reg_with_pc),relocInfo::runtime_call_type); |
aoqi@1 | 1318 | delayed()->nop(); |
aoqi@101 | 1319 | move(SP, S2); // use S2 as a sender SP holder |
aoqi@101 | 1320 | pop(S2); |
aoqi@1 | 1321 | NOT_LP64(pop(FP);) |
aoqi@1 | 1322 | popad(); |
aoqi@1 | 1323 | |
aoqi@1 | 1324 | /* |
aoqi@1 | 1325 | pushad(); |
aoqi@1 | 1326 | #ifdef _LP64 |
aoqi@1 | 1327 | if (reg == SP) |
aoqi@1 | 1328 | addiu(A0, SP, wordSize * 23); //23 registers saved in pushad() |
aoqi@1 | 1329 | else |
aoqi@1 | 1330 | move(A0, reg); |
aoqi@1 | 1331 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_long),relocInfo::runtime_call_type); |
aoqi@1 | 1332 | delayed()->nop(); |
aoqi@1 | 1333 | #else |
aoqi@1 | 1334 | push(FP); |
aoqi@1 | 1335 | move(A0, reg); |
aoqi@1 | 1336 | dsrl32(A1, reg, 0); |
aoqi@1 | 1337 | //call(CAST_FROM_FN_PTR(address, SharedRuntime::print_int),relocInfo::runtime_call_type); |
aoqi@1 | 1338 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_long),relocInfo::runtime_call_type); |
aoqi@1 | 1339 | delayed()->nop(); |
aoqi@1 | 1340 | pop(FP); |
aoqi@1 | 1341 | #endif |
aoqi@1 | 1342 | popad(); |
aoqi@1 | 1343 | pushad(); |
aoqi@1 | 1344 | NOT_LP64(push(FP);) |
aoqi@1 | 1345 | char b[50]; |
aoqi@1 | 1346 | sprintf((char *)b, " pc: %p\n",cur_pc); |
aoqi@1 | 1347 | li(A0, (long)(char *)b); |
aoqi@1 | 1348 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_str),relocInfo::runtime_call_type); |
aoqi@1 | 1349 | delayed()->nop(); |
aoqi@1 | 1350 | NOT_LP64(pop(FP);) |
aoqi@1 | 1351 | popad(); |
aoqi@1 | 1352 | */ |
aoqi@1 | 1353 | } |
aoqi@1 | 1354 | |
aoqi@1 | 1355 | void MacroAssembler::print_reg(FloatRegister reg) { |
aoqi@1 | 1356 | void * cur_pc = pc(); |
aoqi@1 | 1357 | pushad(); |
aoqi@1 | 1358 | NOT_LP64(push(FP);) |
aoqi@1 | 1359 | li(A0, (long)reg->name()); |
aoqi@101 | 1360 | push(S2); |
aoqi@101 | 1361 | move(AT, -(StackAlignmentInBytes)); |
aoqi@101 | 1362 | move(S2, SP); // use S2 as a sender SP holder |
aoqi@101 | 1363 | andr(SP, SP, AT); // align stack as required by ABI |
aoqi@1 | 1364 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_str),relocInfo::runtime_call_type); |
aoqi@1 | 1365 | delayed()->nop(); |
aoqi@101 | 1366 | move(SP, S2); // use S2 as a sender SP holder |
aoqi@101 | 1367 | pop(S2); |
aoqi@1 | 1368 | NOT_LP64(pop(FP);) |
aoqi@1 | 1369 | popad(); |
aoqi@1 | 1370 | |
aoqi@1 | 1371 | pushad(); |
aoqi@1 | 1372 | NOT_LP64(push(FP);) |
aoqi@1 | 1373 | #if 1 |
aoqi@1 | 1374 | move(FP, SP); |
aoqi@1 | 1375 | move(AT, -(StackAlignmentInBytes)); |
aoqi@1 | 1376 | andr(SP , SP , AT); |
aoqi@1 | 1377 | mov_d(F12, reg); |
aoqi@1 | 1378 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_double),relocInfo::runtime_call_type); |
aoqi@1 | 1379 | delayed()->nop(); |
aoqi@1 | 1380 | move(SP, FP); |
aoqi@1 | 1381 | #else |
aoqi@1 | 1382 | mov_s(F12, reg); |
aoqi@1 | 1383 | //call(CAST_FROM_FN_PTR(address, SharedRuntime::print_float),relocInfo::runtime_call_type); |
aoqi@1 | 1384 | //delayed()->nop(); |
aoqi@1 | 1385 | #endif |
aoqi@1 | 1386 | NOT_LP64(pop(FP);) |
aoqi@1 | 1387 | popad(); |
aoqi@1 | 1388 | |
aoqi@1 | 1389 | #if 0 |
aoqi@1 | 1390 | pushad(); |
aoqi@1 | 1391 | NOT_LP64(push(FP);) |
aoqi@1 | 1392 | char* b = new char[50]; |
aoqi@1 | 1393 | sprintf(b, " pc: %p\n", cur_pc); |
aoqi@1 | 1394 | li(A0, (long)b); |
aoqi@1 | 1395 | call(CAST_FROM_FN_PTR(address, SharedRuntime::print_str),relocInfo::runtime_call_type); |
aoqi@1 | 1396 | delayed()->nop(); |
aoqi@1 | 1397 | NOT_LP64(pop(FP);) |
aoqi@1 | 1398 | popad(); |
aoqi@1 | 1399 | #endif |
aoqi@1 | 1400 | } |
aoqi@1 | 1401 | |
aoqi@1 | 1402 | void MacroAssembler::increment(Register reg, int imm) { |
aoqi@1 | 1403 | if (!imm) return; |
aoqi@1 | 1404 | if (is_simm16(imm)) { |
aoqi@1 | 1405 | #ifdef _LP64 |
aoqi@1 | 1406 | daddiu(reg, reg, imm); |
aoqi@1 | 1407 | #else |
aoqi@1 | 1408 | addiu(reg, reg, imm); |
aoqi@1 | 1409 | #endif |
aoqi@1 | 1410 | } else { |
aoqi@1 | 1411 | move(AT, imm); |
aoqi@1 | 1412 | #ifdef _LP64 |
aoqi@1 | 1413 | daddu(reg, reg, AT); |
aoqi@1 | 1414 | #else |
aoqi@1 | 1415 | addu(reg, reg, AT); |
aoqi@1 | 1416 | #endif |
aoqi@1 | 1417 | } |
aoqi@1 | 1418 | } |
aoqi@1 | 1419 | |
aoqi@1 | 1420 | void MacroAssembler::decrement(Register reg, int imm) { |
aoqi@1 | 1421 | increment(reg, -imm); |
aoqi@1 | 1422 | } |
aoqi@1 | 1423 | |
aoqi@1 | 1424 | |
aoqi@1 | 1425 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1426 | address entry_point, |
aoqi@1 | 1427 | bool check_exceptions) { |
aoqi@1 | 1428 | call_VM_helper(oop_result, entry_point, 0, check_exceptions); |
aoqi@1 | 1429 | } |
aoqi@1 | 1430 | |
aoqi@1 | 1431 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1432 | address entry_point, |
aoqi@1 | 1433 | Register arg_1, |
aoqi@1 | 1434 | bool check_exceptions) { |
aoqi@1 | 1435 | if (arg_1!=A1) move(A1, arg_1); |
aoqi@1 | 1436 | call_VM_helper(oop_result, entry_point, 1, check_exceptions); |
aoqi@1 | 1437 | } |
aoqi@1 | 1438 | |
aoqi@1 | 1439 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1440 | address entry_point, |
aoqi@1 | 1441 | Register arg_1, |
aoqi@1 | 1442 | Register arg_2, |
aoqi@1 | 1443 | bool check_exceptions) { |
aoqi@1 | 1444 | if (arg_1!=A1) move(A1, arg_1); |
aoqi@1 | 1445 | if (arg_2!=A2) move(A2, arg_2); |
aoqi@1 | 1446 | assert(arg_2 != A1, "smashed argument"); |
aoqi@1 | 1447 | call_VM_helper(oop_result, entry_point, 2, check_exceptions); |
aoqi@1 | 1448 | } |
aoqi@1 | 1449 | |
aoqi@1 | 1450 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1451 | address entry_point, |
aoqi@1 | 1452 | Register arg_1, |
aoqi@1 | 1453 | Register arg_2, |
aoqi@1 | 1454 | Register arg_3, |
aoqi@1 | 1455 | bool check_exceptions) { |
aoqi@1 | 1456 | if (arg_1!=A1) move(A1, arg_1); |
aoqi@1 | 1457 | if (arg_2!=A2) move(A2, arg_2); assert(arg_2 != A1, "smashed argument"); |
aoqi@1 | 1458 | if (arg_3!=A3) move(A3, arg_3); assert(arg_3 != A1 && arg_3 != A2, "smashed argument"); |
aoqi@1 | 1459 | call_VM_helper(oop_result, entry_point, 3, check_exceptions); |
aoqi@1 | 1460 | } |
aoqi@1 | 1461 | |
aoqi@1 | 1462 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1463 | Register last_java_sp, |
aoqi@1 | 1464 | address entry_point, |
aoqi@1 | 1465 | int number_of_arguments, |
aoqi@1 | 1466 | bool check_exceptions) { |
aoqi@1 | 1467 | call_VM_base(oop_result, NOREG, last_java_sp, entry_point, number_of_arguments, check_exceptions); |
aoqi@1 | 1468 | } |
aoqi@1 | 1469 | |
aoqi@1 | 1470 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1471 | Register last_java_sp, |
aoqi@1 | 1472 | address entry_point, |
aoqi@1 | 1473 | Register arg_1, |
aoqi@1 | 1474 | bool check_exceptions) { |
aoqi@1 | 1475 | if (arg_1 != A1) move(A1, arg_1); |
aoqi@1 | 1476 | call_VM(oop_result, last_java_sp, entry_point, 1, check_exceptions); |
aoqi@1 | 1477 | } |
aoqi@1 | 1478 | |
aoqi@1 | 1479 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1480 | Register last_java_sp, |
aoqi@1 | 1481 | address entry_point, |
aoqi@1 | 1482 | Register arg_1, |
aoqi@1 | 1483 | Register arg_2, |
aoqi@1 | 1484 | bool check_exceptions) { |
aoqi@1 | 1485 | if (arg_1 != A1) move(A1, arg_1); |
aoqi@1 | 1486 | if (arg_2 != A2) move(A2, arg_2); assert(arg_2 != A1, "smashed argument"); |
aoqi@1 | 1487 | call_VM(oop_result, last_java_sp, entry_point, 2, check_exceptions); |
aoqi@1 | 1488 | } |
aoqi@1 | 1489 | |
aoqi@1 | 1490 | void MacroAssembler::call_VM(Register oop_result, |
aoqi@1 | 1491 | Register last_java_sp, |
aoqi@1 | 1492 | address entry_point, |
aoqi@1 | 1493 | Register arg_1, |
aoqi@1 | 1494 | Register arg_2, |
aoqi@1 | 1495 | Register arg_3, |
aoqi@1 | 1496 | bool check_exceptions) { |
aoqi@1 | 1497 | if (arg_1 != A1) move(A1, arg_1); |
aoqi@1 | 1498 | if (arg_2 != A2) move(A2, arg_2); assert(arg_2 != A1, "smashed argument"); |
aoqi@1 | 1499 | if (arg_3 != A3) move(A3, arg_3); assert(arg_3 != A1 && arg_3 != A2, "smashed argument"); |
aoqi@1 | 1500 | call_VM(oop_result, last_java_sp, entry_point, 3, check_exceptions); |
aoqi@1 | 1501 | } |
aoqi@1 | 1502 | |
aoqi@1 | 1503 | void MacroAssembler::call_VM_base(Register oop_result, |
aoqi@1 | 1504 | Register java_thread, |
aoqi@1 | 1505 | Register last_java_sp, |
aoqi@1 | 1506 | address entry_point, |
aoqi@1 | 1507 | int number_of_arguments, |
aoqi@1 | 1508 | bool check_exceptions) { |
aoqi@1 | 1509 | |
aoqi@1 | 1510 | address before_call_pc; |
aoqi@1 | 1511 | // determine java_thread register |
aoqi@1 | 1512 | if (!java_thread->is_valid()) { |
aoqi@1 | 1513 | #ifndef OPT_THREAD |
aoqi@1 | 1514 | java_thread = T2; |
aoqi@1 | 1515 | get_thread(java_thread); |
aoqi@1 | 1516 | #else |
aoqi@1 | 1517 | java_thread = TREG; |
aoqi@1 | 1518 | #endif |
aoqi@1 | 1519 | } |
aoqi@1 | 1520 | // determine last_java_sp register |
aoqi@1 | 1521 | if (!last_java_sp->is_valid()) { |
aoqi@1 | 1522 | last_java_sp = SP; |
aoqi@1 | 1523 | } |
aoqi@1 | 1524 | // debugging support |
aoqi@1 | 1525 | assert(number_of_arguments >= 0 , "cannot have negative number of arguments"); |
aoqi@1 | 1526 | assert(number_of_arguments <= 4 , "cannot have negative number of arguments"); |
aoqi@1 | 1527 | assert(java_thread != oop_result , "cannot use the same register for java_thread & oop_result"); |
aoqi@1 | 1528 | assert(java_thread != last_java_sp, "cannot use the same register for java_thread & last_java_sp"); |
aoqi@1 | 1529 | |
aoqi@1 | 1530 | assert(last_java_sp != FP, "this code doesn't work for last_java_sp == fp, which currently can't portably work anyway since C2 doesn't save ebp"); |
aoqi@1 | 1531 | |
aoqi@1 | 1532 | // set last Java frame before call |
aoqi@1 | 1533 | before_call_pc = (address)pc(); |
aoqi@1 | 1534 | set_last_Java_frame(java_thread, last_java_sp, FP, before_call_pc); |
aoqi@1 | 1535 | |
aoqi@1 | 1536 | // do the call |
aoqi@1 | 1537 | move(A0, java_thread); |
aoqi@1 | 1538 | call(entry_point, relocInfo::runtime_call_type); |
aoqi@1 | 1539 | delayed()->nop(); |
aoqi@1 | 1540 | |
aoqi@1 | 1541 | // restore the thread (cannot use the pushed argument since arguments |
aoqi@1 | 1542 | // may be overwritten by C code generated by an optimizing compiler); |
aoqi@1 | 1543 | // however can use the register value directly if it is callee saved. |
aoqi@1 | 1544 | #ifndef OPT_THREAD |
aoqi@1 | 1545 | if (java_thread >=S0 && java_thread <=S7) { |
aoqi@1 | 1546 | #ifdef ASSERT |
aoqi@1 | 1547 | { Label L; |
aoqi@1 | 1548 | get_thread(AT); |
aoqi@1 | 1549 | beq(java_thread, AT, L); |
aoqi@1 | 1550 | delayed()->nop(); |
aoqi@1 | 1551 | stop("MacroAssembler::call_VM_base: edi not callee saved?"); |
aoqi@1 | 1552 | bind(L); |
aoqi@1 | 1553 | } |
aoqi@1 | 1554 | #endif |
aoqi@1 | 1555 | } else { |
aoqi@1 | 1556 | get_thread(java_thread); |
aoqi@1 | 1557 | } |
aoqi@1 | 1558 | #endif |
aoqi@1 | 1559 | |
aoqi@1 | 1560 | // discard thread and arguments |
aoqi@1 | 1561 | ld_ptr(SP, java_thread, in_bytes(JavaThread::last_Java_sp_offset())); |
aoqi@1 | 1562 | // reset last Java frame |
aoqi@1 | 1563 | reset_last_Java_frame(java_thread, false, true); |
aoqi@1 | 1564 | |
aoqi@1 | 1565 | check_and_handle_popframe(java_thread); |
aoqi@1 | 1566 | check_and_handle_earlyret(java_thread); |
aoqi@1 | 1567 | if (check_exceptions) { |
aoqi@1 | 1568 | // check for pending exceptions (java_thread is set upon return) |
aoqi@1 | 1569 | Label L; |
aoqi@1 | 1570 | #ifdef _LP64 |
aoqi@1 | 1571 | ld(AT, java_thread, in_bytes(Thread::pending_exception_offset())); |
aoqi@1 | 1572 | #else |
aoqi@1 | 1573 | lw(AT, java_thread, in_bytes(Thread::pending_exception_offset())); |
aoqi@1 | 1574 | #endif |
aoqi@1 | 1575 | beq(AT, R0, L); |
aoqi@1 | 1576 | delayed()->nop(); |
aoqi@1 | 1577 | li(AT, before_call_pc); |
aoqi@1 | 1578 | push(AT); |
aoqi@1 | 1579 | jmp(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type); |
aoqi@1 | 1580 | delayed()->nop(); |
aoqi@1 | 1581 | bind(L); |
aoqi@1 | 1582 | } |
aoqi@1 | 1583 | |
aoqi@1 | 1584 | // get oop result if there is one and reset the value in the thread |
aoqi@1 | 1585 | if (oop_result->is_valid()) { |
aoqi@1 | 1586 | #ifdef _LP64 |
aoqi@1 | 1587 | ld(oop_result, java_thread, in_bytes(JavaThread::vm_result_offset())); |
aoqi@1 | 1588 | sd(R0, java_thread, in_bytes(JavaThread::vm_result_offset())); |
aoqi@1 | 1589 | #else |
aoqi@1 | 1590 | lw(oop_result, java_thread, in_bytes(JavaThread::vm_result_offset())); |
aoqi@1 | 1591 | sw(R0, java_thread, in_bytes(JavaThread::vm_result_offset())); |
aoqi@1 | 1592 | #endif |
aoqi@1 | 1593 | verify_oop(oop_result); |
aoqi@1 | 1594 | } |
aoqi@1 | 1595 | } |
aoqi@1 | 1596 | |
aoqi@1 | 1597 | void MacroAssembler::call_VM_helper(Register oop_result, address entry_point, int number_of_arguments, bool check_exceptions) { |
aoqi@1 | 1598 | |
aoqi@1 | 1599 | move(V0, SP); |
aoqi@1 | 1600 | //we also reserve space for java_thread here |
aoqi@1 | 1601 | #ifndef _LP64 |
aoqi@1 | 1602 | daddi(SP, SP, (1 + number_of_arguments) * (- wordSize)); |
aoqi@1 | 1603 | #endif |
aoqi@1 | 1604 | move(AT, -(StackAlignmentInBytes)); |
aoqi@1 | 1605 | andr(SP, SP, AT); |
aoqi@1 | 1606 | call_VM_base(oop_result, NOREG, V0, entry_point, number_of_arguments, check_exceptions); |
aoqi@1 | 1607 | |
aoqi@1 | 1608 | } |
aoqi@1 | 1609 | |
aoqi@1 | 1610 | void MacroAssembler::call_VM_leaf(address entry_point, int number_of_arguments) { |
aoqi@1 | 1611 | call_VM_leaf_base(entry_point, number_of_arguments); |
aoqi@1 | 1612 | } |
aoqi@1 | 1613 | |
aoqi@1 | 1614 | void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0) { |
aoqi@1 | 1615 | if (arg_0 != A0) move(A0, arg_0); |
aoqi@1 | 1616 | call_VM_leaf(entry_point, 1); |
aoqi@1 | 1617 | } |
aoqi@1 | 1618 | |
aoqi@1 | 1619 | void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1) { |
aoqi@1 | 1620 | if (arg_0 != A0) move(A0, arg_0); |
aoqi@1 | 1621 | if (arg_1 != A1) move(A1, arg_1); assert(arg_1 != A0, "smashed argument"); |
aoqi@1 | 1622 | call_VM_leaf(entry_point, 2); |
aoqi@1 | 1623 | } |
aoqi@1 | 1624 | |
aoqi@1 | 1625 | void MacroAssembler::call_VM_leaf(address entry_point, Register arg_0, Register arg_1, Register arg_2) { |
aoqi@1 | 1626 | if (arg_0 != A0) move(A0, arg_0); |
aoqi@1 | 1627 | if (arg_1 != A1) move(A1, arg_1); assert(arg_1 != A0, "smashed argument"); |
aoqi@1 | 1628 | if (arg_2 != A2) move(A2, arg_2); assert(arg_2 != A0 && arg_2 != A1, "smashed argument"); |
aoqi@1 | 1629 | call_VM_leaf(entry_point, 3); |
aoqi@1 | 1630 | } |
aoqi@1 | 1631 | void MacroAssembler::super_call_VM_leaf(address entry_point) { |
aoqi@1 | 1632 | MacroAssembler::call_VM_leaf_base(entry_point, 0); |
aoqi@1 | 1633 | } |
aoqi@1 | 1634 | |
aoqi@1 | 1635 | |
aoqi@1 | 1636 | void MacroAssembler::super_call_VM_leaf(address entry_point, |
aoqi@1 | 1637 | Register arg_1) { |
aoqi@1 | 1638 | if (arg_1 != A0) move(A0, arg_1); |
aoqi@1 | 1639 | MacroAssembler::call_VM_leaf_base(entry_point, 1); |
aoqi@1 | 1640 | } |
aoqi@1 | 1641 | |
aoqi@1 | 1642 | |
aoqi@1 | 1643 | void MacroAssembler::super_call_VM_leaf(address entry_point, |
aoqi@1 | 1644 | Register arg_1, |
aoqi@1 | 1645 | Register arg_2) { |
aoqi@1 | 1646 | if (arg_1 != A0) move(A0, arg_1); |
aoqi@1 | 1647 | if (arg_2 != A1) move(A1, arg_2); assert(arg_2 != A0, "smashed argument"); |
aoqi@1 | 1648 | MacroAssembler::call_VM_leaf_base(entry_point, 2); |
aoqi@1 | 1649 | } |
aoqi@1 | 1650 | void MacroAssembler::super_call_VM_leaf(address entry_point, |
aoqi@1 | 1651 | Register arg_1, |
aoqi@1 | 1652 | Register arg_2, |
aoqi@1 | 1653 | Register arg_3) { |
aoqi@1 | 1654 | if (arg_1 != A0) move(A0, arg_1); |
aoqi@1 | 1655 | if (arg_2 != A1) move(A1, arg_2); assert(arg_2 != A0, "smashed argument"); |
aoqi@1 | 1656 | if (arg_3 != A2) move(A2, arg_3); assert(arg_3 != A0 && arg_3 != A1, "smashed argument"); |
aoqi@1 | 1657 | MacroAssembler::call_VM_leaf_base(entry_point, 3); |
aoqi@1 | 1658 | } |
aoqi@1 | 1659 | |
aoqi@1 | 1660 | void MacroAssembler::check_and_handle_earlyret(Register java_thread) { |
aoqi@1 | 1661 | } |
aoqi@1 | 1662 | |
aoqi@1 | 1663 | void MacroAssembler::check_and_handle_popframe(Register java_thread) { |
aoqi@1 | 1664 | } |
aoqi@1 | 1665 | |
aoqi@1 | 1666 | void MacroAssembler::null_check(Register reg, int offset) { |
aoqi@1 | 1667 | if (needs_explicit_null_check(offset)) { |
aoqi@1 | 1668 | // provoke OS NULL exception if reg = NULL by |
aoqi@1 | 1669 | // accessing M[reg] w/o changing any (non-CC) registers |
aoqi@1 | 1670 | // NOTE: cmpl is plenty here to provoke a segv |
aoqi@1 | 1671 | lw(AT, reg, 0); |
aoqi@1 | 1672 | /* Jin |
aoqi@1 | 1673 | nop(); |
aoqi@1 | 1674 | nop(); |
aoqi@1 | 1675 | nop(); |
aoqi@1 | 1676 | */ |
aoqi@1 | 1677 | // Note: should probably use testl(rax, Address(reg, 0)); |
aoqi@1 | 1678 | // may be shorter code (however, this version of |
aoqi@1 | 1679 | // testl needs to be implemented first) |
aoqi@1 | 1680 | } else { |
aoqi@1 | 1681 | // nothing to do, (later) access of M[reg + offset] |
aoqi@1 | 1682 | // will provoke OS NULL exception if reg = NULL |
aoqi@1 | 1683 | } |
aoqi@1 | 1684 | } |
aoqi@1 | 1685 | |
aoqi@1 | 1686 | void MacroAssembler::enter() { |
aoqi@1 | 1687 | push2(RA, FP); |
aoqi@1 | 1688 | move(FP, SP); |
aoqi@1 | 1689 | } |
aoqi@1 | 1690 | |
aoqi@1 | 1691 | void MacroAssembler::leave() { |
aoqi@1 | 1692 | #ifndef _LP64 |
aoqi@1 | 1693 | //move(SP, FP); |
aoqi@1 | 1694 | //pop2(FP, RA); |
aoqi@1 | 1695 | addi(SP, FP, 2 * wordSize); |
aoqi@1 | 1696 | lw(RA, SP, - 1 * wordSize); |
aoqi@1 | 1697 | lw(FP, SP, - 2 * wordSize); |
aoqi@1 | 1698 | #else |
aoqi@1 | 1699 | daddi(SP, FP, 2 * wordSize); |
aoqi@1 | 1700 | ld(RA, SP, - 1 * wordSize); |
aoqi@1 | 1701 | ld(FP, SP, - 2 * wordSize); |
aoqi@1 | 1702 | #endif |
aoqi@1 | 1703 | } |
aoqi@1 | 1704 | /* |
aoqi@1 | 1705 | void MacroAssembler::os_breakpoint() { |
aoqi@1 | 1706 | // instead of directly emitting a breakpoint, call os:breakpoint for better debugability |
aoqi@1 | 1707 | // (e.g., MSVC can't call ps() otherwise) |
aoqi@1 | 1708 | call(RuntimeAddress(CAST_FROM_FN_PTR(address, os::breakpoint))); |
aoqi@1 | 1709 | } |
aoqi@1 | 1710 | */ |
aoqi@1 | 1711 | void MacroAssembler::reset_last_Java_frame(Register java_thread, bool clear_fp, bool clear_pc) { |
aoqi@1 | 1712 | // determine java_thread register |
aoqi@1 | 1713 | if (!java_thread->is_valid()) { |
aoqi@1 | 1714 | #ifndef OPT_THREAD |
aoqi@1 | 1715 | java_thread = T1; |
aoqi@1 | 1716 | get_thread(java_thread); |
aoqi@1 | 1717 | #else |
aoqi@1 | 1718 | java_thread = TREG; |
aoqi@1 | 1719 | #endif |
aoqi@1 | 1720 | } |
aoqi@1 | 1721 | // we must set sp to zero to clear frame |
aoqi@1 | 1722 | st_ptr(R0, java_thread, in_bytes(JavaThread::last_Java_sp_offset())); |
aoqi@1 | 1723 | // must clear fp, so that compiled frames are not confused; it is possible |
aoqi@1 | 1724 | // that we need it only for debugging |
aoqi@1 | 1725 | if(clear_fp) |
aoqi@1 | 1726 | st_ptr(R0, java_thread, in_bytes(JavaThread::last_Java_fp_offset())); |
aoqi@1 | 1727 | |
aoqi@1 | 1728 | if (clear_pc) |
aoqi@1 | 1729 | st_ptr(R0, java_thread, in_bytes(JavaThread::last_Java_pc_offset())); |
aoqi@1 | 1730 | } |
aoqi@1 | 1731 | |
aoqi@1 | 1732 | void MacroAssembler::reset_last_Java_frame(bool clear_fp, |
aoqi@1 | 1733 | bool clear_pc) { |
aoqi@1 | 1734 | Register thread = TREG; |
aoqi@1 | 1735 | #ifndef OPT_THREAD |
aoqi@1 | 1736 | get_thread(thread); |
aoqi@1 | 1737 | #endif |
aoqi@1 | 1738 | // we must set sp to zero to clear frame |
aoqi@1 | 1739 | sd(R0, Address(thread, JavaThread::last_Java_sp_offset())); |
aoqi@1 | 1740 | // must clear fp, so that compiled frames are not confused; it is |
aoqi@1 | 1741 | // possible that we need it only for debugging |
aoqi@1 | 1742 | if (clear_fp) { |
aoqi@1 | 1743 | sd(R0, Address(thread, JavaThread::last_Java_fp_offset())); |
aoqi@1 | 1744 | } |
aoqi@1 | 1745 | |
aoqi@1 | 1746 | if (clear_pc) { |
aoqi@1 | 1747 | sd(R0, Address(thread, JavaThread::last_Java_pc_offset())); |
aoqi@1 | 1748 | } |
aoqi@1 | 1749 | } |
aoqi@1 | 1750 | |
aoqi@1 | 1751 | // Write serialization page so VM thread can do a pseudo remote membar. |
aoqi@1 | 1752 | // We use the current thread pointer to calculate a thread specific |
aoqi@1 | 1753 | // offset to write to within the page. This minimizes bus traffic |
aoqi@1 | 1754 | // due to cache line collision. |
aoqi@1 | 1755 | void MacroAssembler::serialize_memory(Register thread, Register tmp) { |
aoqi@1 | 1756 | move(tmp, thread); |
aoqi@1 | 1757 | srl(tmp, tmp,os::get_serialize_page_shift_count()); |
aoqi@1 | 1758 | move(AT, (os::vm_page_size() - sizeof(int))); |
aoqi@1 | 1759 | andr(tmp, tmp,AT); |
aoqi@1 | 1760 | sw(tmp,Address(tmp, (intptr_t)os::get_memory_serialize_page())); |
aoqi@1 | 1761 | } |
aoqi@1 | 1762 | |
aoqi@1 | 1763 | // Calls to C land |
aoqi@1 | 1764 | // |
aoqi@1 | 1765 | // When entering C land, the rbp, & rsp of the last Java frame have to be recorded |
aoqi@1 | 1766 | // in the (thread-local) JavaThread object. When leaving C land, the last Java fp |
aoqi@1 | 1767 | // has to be reset to 0. This is required to allow proper stack traversal. |
aoqi@1 | 1768 | void MacroAssembler::set_last_Java_frame(Register java_thread, |
aoqi@1 | 1769 | Register last_java_sp, |
aoqi@1 | 1770 | Register last_java_fp, |
aoqi@1 | 1771 | address last_java_pc) { |
aoqi@1 | 1772 | // determine java_thread register |
aoqi@1 | 1773 | if (!java_thread->is_valid()) { |
aoqi@1 | 1774 | #ifndef OPT_THREAD |
aoqi@1 | 1775 | java_thread = T2; |
aoqi@1 | 1776 | get_thread(java_thread); |
aoqi@1 | 1777 | #else |
aoqi@1 | 1778 | java_thread = TREG; |
aoqi@1 | 1779 | #endif |
aoqi@1 | 1780 | } |
aoqi@1 | 1781 | // determine last_java_sp register |
aoqi@1 | 1782 | if (!last_java_sp->is_valid()) { |
aoqi@1 | 1783 | last_java_sp = SP; |
aoqi@1 | 1784 | } |
aoqi@1 | 1785 | |
aoqi@1 | 1786 | // last_java_fp is optional |
aoqi@1 | 1787 | |
aoqi@1 | 1788 | if (last_java_fp->is_valid()) { |
aoqi@1 | 1789 | st_ptr(last_java_fp, java_thread, in_bytes(JavaThread::last_Java_fp_offset())); |
aoqi@1 | 1790 | } |
aoqi@1 | 1791 | |
aoqi@1 | 1792 | // last_java_pc is optional |
aoqi@1 | 1793 | |
aoqi@1 | 1794 | if (last_java_pc != NULL) { |
aoqi@1 | 1795 | relocate(relocInfo::internal_pc_type); |
fujie@368 | 1796 | patchable_set48(AT, (long)last_java_pc); |
aoqi@1 | 1797 | st_ptr(AT, java_thread, in_bytes(JavaThread::last_Java_pc_offset())); |
aoqi@1 | 1798 | } |
aoqi@1 | 1799 | st_ptr(last_java_sp, java_thread, in_bytes(JavaThread::last_Java_sp_offset())); |
aoqi@1 | 1800 | } |
aoqi@1 | 1801 | |
aoqi@1 | 1802 | void MacroAssembler::set_last_Java_frame(Register last_java_sp, |
aoqi@1 | 1803 | Register last_java_fp, |
aoqi@1 | 1804 | address last_java_pc) { |
aoqi@1 | 1805 | // determine last_java_sp register |
aoqi@1 | 1806 | if (!last_java_sp->is_valid()) { |
aoqi@1 | 1807 | last_java_sp = SP; |
aoqi@1 | 1808 | } |
aoqi@1 | 1809 | |
aoqi@1 | 1810 | Register thread = TREG; |
aoqi@1 | 1811 | #ifndef OPT_THREAD |
aoqi@1 | 1812 | get_thread(thread); |
aoqi@1 | 1813 | #endif |
aoqi@1 | 1814 | // last_java_fp is optional |
aoqi@1 | 1815 | if (last_java_fp->is_valid()) { |
aoqi@1 | 1816 | sd(last_java_fp, Address(thread, JavaThread::last_Java_fp_offset())); |
aoqi@1 | 1817 | } |
aoqi@1 | 1818 | |
aoqi@1 | 1819 | // last_java_pc is optional |
aoqi@1 | 1820 | if (last_java_pc != NULL) { |
aoqi@1 | 1821 | Address java_pc(thread, |
aoqi@1 | 1822 | JavaThread::frame_anchor_offset() + JavaFrameAnchor::last_Java_pc_offset()); |
aoqi@1 | 1823 | li(AT, (intptr_t)(last_java_pc)); |
aoqi@1 | 1824 | sd(AT, java_pc); |
aoqi@1 | 1825 | } |
aoqi@1 | 1826 | |
aoqi@1 | 1827 | sd(last_java_sp, Address(thread, JavaThread::last_Java_sp_offset())); |
aoqi@1 | 1828 | } |
aoqi@1 | 1829 | |
aoqi@1 | 1830 | ////////////////////////////////////////////////////////////////////////////////// |
aoqi@1 | 1831 | #ifndef SERIALGC |
aoqi@1 | 1832 | |
aoqi@1 | 1833 | void MacroAssembler::g1_write_barrier_pre(Register obj, |
aoqi@1 | 1834 | #ifndef _LP64 |
aoqi@1 | 1835 | Register thread, |
aoqi@1 | 1836 | #endif |
aoqi@1 | 1837 | Register tmp, |
aoqi@1 | 1838 | Register tmp2, |
aoqi@1 | 1839 | bool tosca_live) { |
aoqi@1 | 1840 | /* LP64_ONLY(Register thread = r15_thread;) |
aoqi@1 | 1841 | Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
aoqi@1 | 1842 | PtrQueue::byte_offset_of_active())); |
aoqi@1 | 1843 | |
aoqi@1 | 1844 | Address index(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
aoqi@1 | 1845 | PtrQueue::byte_offset_of_index())); |
aoqi@1 | 1846 | Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() + |
aoqi@1 | 1847 | PtrQueue::byte_offset_of_buf())); |
aoqi@1 | 1848 | |
aoqi@1 | 1849 | |
aoqi@1 | 1850 | Label done; |
aoqi@1 | 1851 | Label runtime; |
aoqi@1 | 1852 | |
aoqi@1 | 1853 | // if (!marking_in_progress) goto done; |
aoqi@1 | 1854 | if (in_bytes(PtrQueue::byte_width_of_active()) == 4) { |
aoqi@1 | 1855 | cmpl(in_progress, 0); |
aoqi@1 | 1856 | } else { |
aoqi@1 | 1857 | assert(in_bytes(PtrQueue::byte_width_of_active()) == 1, "Assumption"); |
aoqi@1 | 1858 | cmpb(in_progress, 0); |
aoqi@1 | 1859 | } |
aoqi@1 | 1860 | jcc(Assembler::equal, done); |
aoqi@1 | 1861 | |
aoqi@1 | 1862 | // if (x.f == NULL) goto done; |
aoqi@1 | 1863 | cmpptr(Address(obj, 0), NULL_WORD); |
aoqi@1 | 1864 | jcc(Assembler::equal, done); |
aoqi@1 | 1865 | |
aoqi@1 | 1866 | // Can we store original value in the thread's buffer? |
aoqi@1 | 1867 | |
aoqi@1 | 1868 | LP64_ONLY(movslq(tmp, index);) |
aoqi@1 | 1869 | movptr(tmp2, Address(obj, 0)); |
aoqi@1 | 1870 | #ifdef _LP64 |
aoqi@1 | 1871 | cmpq(tmp, 0); |
aoqi@1 | 1872 | #else |
aoqi@1 | 1873 | cmpl(index, 0); |
aoqi@1 | 1874 | #endif |
aoqi@1 | 1875 | jcc(Assembler::equal, runtime); |
aoqi@1 | 1876 | #ifdef _LP64 |
aoqi@1 | 1877 | subq(tmp, wordSize); |
aoqi@1 | 1878 | movl(index, tmp); |
aoqi@1 | 1879 | addq(tmp, buffer); |
aoqi@1 | 1880 | #else |
aoqi@1 | 1881 | subl(index, wordSize); |
aoqi@1 | 1882 | movl(tmp, buffer); |
aoqi@1 | 1883 | addl(tmp, index); |
aoqi@1 | 1884 | #endif |
aoqi@1 | 1885 | movptr(Address(tmp, 0), tmp2); |
aoqi@1 | 1886 | jmp(done); |
aoqi@1 | 1887 | bind(runtime); |
aoqi@1 | 1888 | // save the live input values |
aoqi@1 | 1889 | if(tosca_live) push(rax); |
aoqi@1 | 1890 | push(obj); |
aoqi@1 | 1891 | #ifdef _LP64 |
aoqi@1 | 1892 | movq(c_rarg0, Address(obj, 0)); |
aoqi@1 | 1893 | call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), c_rarg0, r15_thread); |
aoqi@1 | 1894 | #else |
aoqi@1 | 1895 | push(thread); |
aoqi@1 | 1896 | call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), tmp2, thread); |
aoqi@1 | 1897 | pop(thread); |
aoqi@1 | 1898 | #endif |
aoqi@1 | 1899 | pop(obj); |
aoqi@1 | 1900 | if(tosca_live) pop(rax); |
aoqi@1 | 1901 | bind(done); |
aoqi@1 | 1902 | */ |
aoqi@1 | 1903 | } |
aoqi@1 | 1904 | |
aoqi@1 | 1905 | void MacroAssembler::g1_write_barrier_post(Register store_addr, |
aoqi@1 | 1906 | Register new_val, |
aoqi@1 | 1907 | #ifndef _LP64 |
aoqi@1 | 1908 | Register thread, |
aoqi@1 | 1909 | #endif |
aoqi@1 | 1910 | Register tmp, |
aoqi@1 | 1911 | Register tmp2) { |
aoqi@1 | 1912 | |
aoqi@1 | 1913 | /*LP64_ONLY(Register thread = r15_thread;) |
aoqi@1 | 1914 | Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
aoqi@1 | 1915 | PtrQueue::byte_offset_of_index())); |
aoqi@1 | 1916 | Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() + |
aoqi@1 | 1917 | PtrQueue::byte_offset_of_buf())); |
aoqi@1 | 1918 | BarrierSet* bs = Universe::heap()->barrier_set(); |
aoqi@1 | 1919 | CardTableModRefBS* ct = (CardTableModRefBS*)bs; |
aoqi@1 | 1920 | Label done; |
aoqi@1 | 1921 | Label runtime; |
aoqi@1 | 1922 | |
aoqi@1 | 1923 | // Does store cross heap regions? |
aoqi@1 | 1924 | |
aoqi@1 | 1925 | movptr(tmp, store_addr); |
aoqi@1 | 1926 | xorptr(tmp, new_val); |
aoqi@1 | 1927 | shrptr(tmp, HeapRegion::LogOfHRGrainBytes); |
aoqi@1 | 1928 | jcc(Assembler::equal, done); |
aoqi@1 | 1929 | |
aoqi@1 | 1930 | // crosses regions, storing NULL? |
aoqi@1 | 1931 | |
aoqi@1 | 1932 | cmpptr(new_val, (int32_t) NULL_WORD); |
aoqi@1 | 1933 | jcc(Assembler::equal, done); |
aoqi@1 | 1934 | |
aoqi@1 | 1935 | // storing region crossing non-NULL, is card already dirty? |
aoqi@1 | 1936 | |
aoqi@1 | 1937 | ExternalAddress cardtable((address) ct->byte_map_base); |
aoqi@1 | 1938 | assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
aoqi@1 | 1939 | #ifdef _LP64 |
aoqi@1 | 1940 | const Register card_addr = tmp; |
aoqi@1 | 1941 | |
aoqi@1 | 1942 | movq(card_addr, store_addr); |
aoqi@1 | 1943 | shrq(card_addr, CardTableModRefBS::card_shift); |
aoqi@1 | 1944 | |
aoqi@1 | 1945 | lea(tmp2, cardtable); |
aoqi@1 | 1946 | |
aoqi@1 | 1947 | // get the address of the card |
aoqi@1 | 1948 | addq(card_addr, tmp2); |
aoqi@1 | 1949 | #else |
aoqi@1 | 1950 | const Register card_index = tmp; |
aoqi@1 | 1951 | |
aoqi@1 | 1952 | movl(card_index, store_addr); |
aoqi@1 | 1953 | shrl(card_index, CardTableModRefBS::card_shift); |
aoqi@1 | 1954 | |
aoqi@1 | 1955 | Address index(noreg, card_index, Address::times_1); |
aoqi@1 | 1956 | const Register card_addr = tmp; |
aoqi@1 | 1957 | lea(card_addr, as_Address(ArrayAddress(cardtable, index))); |
aoqi@1 | 1958 | #endif |
aoqi@1 | 1959 | cmpb(Address(card_addr, 0), 0); |
aoqi@1 | 1960 | jcc(Assembler::equal, done); |
aoqi@1 | 1961 | |
aoqi@1 | 1962 | // storing a region crossing, non-NULL oop, card is clean. |
aoqi@1 | 1963 | // dirty card and log. |
aoqi@1 | 1964 | |
aoqi@1 | 1965 | movb(Address(card_addr, 0), 0); |
aoqi@1 | 1966 | |
aoqi@1 | 1967 | cmpl(queue_index, 0); |
aoqi@1 | 1968 | jcc(Assembler::equal, runtime); |
aoqi@1 | 1969 | subl(queue_index, wordSize); |
aoqi@1 | 1970 | movptr(tmp2, buffer); |
aoqi@1 | 1971 | #ifdef _LP64 |
aoqi@1 | 1972 | movslq(rscratch1, queue_index); |
aoqi@1 | 1973 | addq(tmp2, rscratch1); |
aoqi@1 | 1974 | movq(Address(tmp2, 0), card_addr); |
aoqi@1 | 1975 | #else |
aoqi@1 | 1976 | addl(tmp2, queue_index); |
aoqi@1 | 1977 | movl(Address(tmp2, 0), card_index); |
aoqi@1 | 1978 | #endif |
aoqi@1 | 1979 | jmp(done); |
aoqi@1 | 1980 | |
aoqi@1 | 1981 | bind(runtime); |
aoqi@1 | 1982 | // save the live input values |
aoqi@1 | 1983 | push(store_addr); |
aoqi@1 | 1984 | push(new_val); |
aoqi@1 | 1985 | #ifdef _LP64 |
aoqi@1 | 1986 | call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, r15_thread); |
aoqi@1 | 1987 | #else |
aoqi@1 | 1988 | push(thread); |
aoqi@1 | 1989 | call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); |
aoqi@1 | 1990 | pop(thread); |
aoqi@1 | 1991 | #endif |
aoqi@1 | 1992 | pop(new_val); |
aoqi@1 | 1993 | pop(store_addr); |
aoqi@1 | 1994 | |
aoqi@1 | 1995 | bind(done); |
aoqi@1 | 1996 | */ |
aoqi@1 | 1997 | } |
aoqi@1 | 1998 | |
aoqi@1 | 1999 | #endif // SERIALGC |
aoqi@1 | 2000 | ////////////////////////////////////////////////////////////////////////////////// |
aoqi@1 | 2001 | |
aoqi@1 | 2002 | |
aoqi@1 | 2003 | void MacroAssembler::store_check(Register obj) { |
aoqi@1 | 2004 | // Does a store check for the oop in register obj. The content of |
aoqi@1 | 2005 | // register obj is destroyed afterwards. |
aoqi@1 | 2006 | store_check_part_1(obj); |
aoqi@1 | 2007 | store_check_part_2(obj); |
aoqi@1 | 2008 | } |
aoqi@1 | 2009 | |
aoqi@1 | 2010 | void MacroAssembler::store_check(Register obj, Address dst) { |
aoqi@1 | 2011 | store_check(obj); |
aoqi@1 | 2012 | } |
aoqi@1 | 2013 | |
aoqi@1 | 2014 | |
aoqi@1 | 2015 | // split the store check operation so that other instructions can be scheduled inbetween |
aoqi@1 | 2016 | void MacroAssembler::store_check_part_1(Register obj) { |
aoqi@1 | 2017 | BarrierSet* bs = Universe::heap()->barrier_set(); |
aoqi@1 | 2018 | assert(bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind"); |
aoqi@1 | 2019 | #ifdef _LP64 |
aoqi@1 | 2020 | dsrl(obj, obj, CardTableModRefBS::card_shift); |
aoqi@1 | 2021 | #else |
aoqi@1 | 2022 | shr(obj, CardTableModRefBS::card_shift); |
aoqi@1 | 2023 | #endif |
aoqi@1 | 2024 | } |
aoqi@1 | 2025 | |
aoqi@1 | 2026 | void MacroAssembler::store_check_part_2(Register obj) { |
aoqi@1 | 2027 | BarrierSet* bs = Universe::heap()->barrier_set(); |
aoqi@1 | 2028 | assert(bs->kind() == BarrierSet::CardTableModRef, "Wrong barrier set kind"); |
aoqi@1 | 2029 | CardTableModRefBS* ct = (CardTableModRefBS*)bs; |
aoqi@1 | 2030 | assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); |
aoqi@1 | 2031 | |
aoqi@1 | 2032 | li(AT, (long)ct->byte_map_base); |
aoqi@1 | 2033 | #ifdef _LP64 |
aoqi@1 | 2034 | dadd(AT, AT, obj); |
aoqi@1 | 2035 | #else |
aoqi@1 | 2036 | add(AT, AT, obj); |
aoqi@1 | 2037 | #endif |
aoqi@1 | 2038 | sb(R0, AT, 0); |
fujie@114 | 2039 | sync(); |
aoqi@1 | 2040 | } |
aoqi@1 | 2041 | |
aoqi@1 | 2042 | // Defines obj, preserves var_size_in_bytes, okay for t2 == var_size_in_bytes. |
aoqi@1 | 2043 | void MacroAssembler::tlab_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, |
aoqi@1 | 2044 | Register t1, Register t2, Label& slow_case) { |
aoqi@1 | 2045 | assert_different_registers(obj, var_size_in_bytes, t1, t2, AT); |
aoqi@1 | 2046 | |
aoqi@1 | 2047 | Register end = t2; |
aoqi@1 | 2048 | #ifndef OPT_THREAD |
aoqi@1 | 2049 | Register thread = t1; |
aoqi@1 | 2050 | get_thread(thread); |
aoqi@1 | 2051 | #else |
aoqi@1 | 2052 | Register thread = TREG; |
aoqi@1 | 2053 | #endif |
aoqi@1 | 2054 | verify_tlab(t1, t2);//blows t1&t2 |
aoqi@1 | 2055 | |
aoqi@1 | 2056 | ld_ptr(obj, thread, in_bytes(JavaThread::tlab_top_offset())); |
aoqi@1 | 2057 | |
aoqi@1 | 2058 | if (var_size_in_bytes == NOREG) { |
aoqi@1 | 2059 | // i dont think we need move con_size_in_bytes to a register first. |
aoqi@1 | 2060 | // by yjl 8/17/2005 |
aoqi@1 | 2061 | assert(is_simm16(con_size_in_bytes), "fixme by moving imm to a register first"); |
aoqi@1 | 2062 | addi(end, obj, con_size_in_bytes); |
aoqi@1 | 2063 | } else { |
aoqi@1 | 2064 | add(end, obj, var_size_in_bytes); |
aoqi@1 | 2065 | } |
aoqi@1 | 2066 | |
aoqi@1 | 2067 | ld_ptr(AT, thread, in_bytes(JavaThread::tlab_end_offset())); |
aoqi@1 | 2068 | sltu(AT, AT, end); |
aoqi@1 | 2069 | bne_far(AT, R0, slow_case); |
aoqi@1 | 2070 | delayed()->nop(); |
aoqi@1 | 2071 | |
aoqi@1 | 2072 | |
aoqi@1 | 2073 | // update the tlab top pointer |
aoqi@1 | 2074 | st_ptr(end, thread, in_bytes(JavaThread::tlab_top_offset())); |
aoqi@1 | 2075 | |
aoqi@1 | 2076 | // recover var_size_in_bytes if necessary |
aoqi@1 | 2077 | /*if (var_size_in_bytes == end) { |
aoqi@1 | 2078 | sub(var_size_in_bytes, end, obj); |
aoqi@1 | 2079 | }*/ |
aoqi@1 | 2080 | |
aoqi@1 | 2081 | verify_tlab(t1, t2); |
aoqi@1 | 2082 | } |
aoqi@1 | 2083 | |
aoqi@1 | 2084 | // Defines obj, preserves var_size_in_bytes |
aoqi@1 | 2085 | void MacroAssembler::eden_allocate(Register obj, Register var_size_in_bytes, int con_size_in_bytes, |
aoqi@1 | 2086 | Register t1, Register t2, Label& slow_case) { |
aoqi@1 | 2087 | assert_different_registers(obj, var_size_in_bytes, t1, AT); |
aoqi@1 | 2088 | if (CMSIncrementalMode || !Universe::heap()->supports_inline_contig_alloc()) { //by yyq |
aoqi@1 | 2089 | // No allocation in the shared eden. |
aoqi@1 | 2090 | b_far(slow_case); |
aoqi@1 | 2091 | delayed()->nop(); |
aoqi@1 | 2092 | } else { |
aoqi@1 | 2093 | |
aoqi@1 | 2094 | #ifndef _LP64 |
aoqi@1 | 2095 | Address heap_top(t1, Assembler::split_low((intptr_t)Universe::heap()->top_addr())); |
aoqi@1 | 2096 | lui(t1, split_high((intptr_t)Universe::heap()->top_addr())); |
aoqi@1 | 2097 | #else |
aoqi@1 | 2098 | Address heap_top(t1); |
aoqi@1 | 2099 | li(t1, (long)Universe::heap()->top_addr()); |
aoqi@1 | 2100 | #endif |
aoqi@1 | 2101 | ld_ptr(obj, heap_top); |
aoqi@1 | 2102 | |
aoqi@1 | 2103 | Register end = t2; |
aoqi@1 | 2104 | Label retry; |
aoqi@1 | 2105 | |
aoqi@1 | 2106 | bind(retry); |
aoqi@1 | 2107 | if (var_size_in_bytes == NOREG) { |
aoqi@1 | 2108 | // i dont think we need move con_size_in_bytes to a register first. |
aoqi@1 | 2109 | // by yjl 8/17/2005 |
aoqi@1 | 2110 | assert(is_simm16(con_size_in_bytes), "fixme by moving imm to a register first"); |
aoqi@1 | 2111 | addi(end, obj, con_size_in_bytes); |
aoqi@1 | 2112 | } else { |
aoqi@1 | 2113 | add(end, obj, var_size_in_bytes); |
aoqi@1 | 2114 | } |
aoqi@1 | 2115 | // if end < obj then we wrapped around => object too long => slow case |
aoqi@1 | 2116 | sltu(AT, end, obj); |
aoqi@1 | 2117 | bne_far(AT, R0, slow_case); |
aoqi@1 | 2118 | delayed()->nop(); |
aoqi@1 | 2119 | |
aoqi@1 | 2120 | //lui(AT, split_high((int)Universe::heap()->end_addr())); |
aoqi@1 | 2121 | //lw(AT, AT, split_low((int)Universe::heap()->end_addr())); |
aoqi@1 | 2122 | li(AT, (long)Universe::heap()->end_addr()); |
aoqi@1 | 2123 | sltu(AT, AT, end); |
aoqi@1 | 2124 | bne_far(AT, R0, slow_case); |
aoqi@1 | 2125 | delayed()->nop(); |
aoqi@1 | 2126 | // Compare obj with the top addr, and if still equal, store the new top addr in |
aoqi@1 | 2127 | // end at the address of the top addr pointer. Sets ZF if was equal, and clears |
aoqi@1 | 2128 | // it otherwise. Use lock prefix for atomicity on MPs. |
aoqi@1 | 2129 | if (os::is_MP()) { |
aoqi@1 | 2130 | ///lock(); |
aoqi@1 | 2131 | } |
aoqi@1 | 2132 | |
aoqi@1 | 2133 | // if someone beat us on the allocation, try again, otherwise continue |
aoqi@1 | 2134 | cmpxchg(end, heap_top, obj); |
aoqi@1 | 2135 | beq_far(AT, R0, retry); //by yyq |
aoqi@1 | 2136 | delayed()->nop(); |
aoqi@1 | 2137 | |
aoqi@1 | 2138 | } |
aoqi@1 | 2139 | } |
aoqi@1 | 2140 | |
fujie@170 | 2141 | // C2 doesn't invoke this one. |
aoqi@1 | 2142 | void MacroAssembler::tlab_refill(Label& retry, Label& try_eden, Label& slow_case) { |
aoqi@1 | 2143 | Register top = T0; |
aoqi@1 | 2144 | Register t1 = T1; |
aoqi@1 | 2145 | /* Jin: tlab_refill() is called in |
aoqi@1 | 2146 | |
aoqi@1 | 2147 | [c1_Runtime1_mips.cpp] Runtime1::generate_code_for(new_type_array_id); |
aoqi@1 | 2148 | |
aoqi@1 | 2149 | In generate_code_for(), T2 has been assigned as a register(length), which is used |
aoqi@1 | 2150 | after calling tlab_refill(); |
aoqi@1 | 2151 | Therefore, tlab_refill() should not use T2. |
aoqi@1 | 2152 | |
aoqi@1 | 2153 | Source: |
aoqi@1 | 2154 | |
aoqi@1 | 2155 | Exception in thread "main" java.lang.ArrayIndexOutOfBoundsException |
aoqi@1 | 2156 | at java.lang.System.arraycopy(Native Method) |
aoqi@1 | 2157 | at java.util.Arrays.copyOf(Arrays.java:2799) <-- alloc_array |
aoqi@1 | 2158 | at sun.misc.Resource.getBytes(Resource.java:117) |
aoqi@1 | 2159 | at java.net.URLClassLoader.defineClass(URLClassLoader.java:273) |
aoqi@1 | 2160 | at java.net.URLClassLoader.findClass(URLClassLoader.java:205) |
aoqi@1 | 2161 | at java.lang.ClassLoader.loadClass(ClassLoader.java:321) |
aoqi@1 | 2162 | */ |
aoqi@1 | 2163 | Register t2 = T9; |
aoqi@1 | 2164 | Register t3 = T3; |
aoqi@1 | 2165 | Register thread_reg = T8; |
aoqi@1 | 2166 | Label do_refill, discard_tlab; |
aoqi@1 | 2167 | if (CMSIncrementalMode || !Universe::heap()->supports_inline_contig_alloc()) { //by yyq |
aoqi@1 | 2168 | // No allocation in the shared eden. |
aoqi@1 | 2169 | b(slow_case); |
aoqi@1 | 2170 | delayed()->nop(); |
aoqi@1 | 2171 | } |
aoqi@1 | 2172 | |
aoqi@1 | 2173 | get_thread(thread_reg); |
aoqi@1 | 2174 | |
aoqi@1 | 2175 | ld_ptr(top, thread_reg, in_bytes(JavaThread::tlab_top_offset())); |
aoqi@1 | 2176 | ld_ptr(t1, thread_reg, in_bytes(JavaThread::tlab_end_offset())); |
aoqi@1 | 2177 | |
aoqi@1 | 2178 | // calculate amount of free space |
aoqi@1 | 2179 | sub(t1, t1, top); |
aoqi@1 | 2180 | shr(t1, LogHeapWordSize); |
aoqi@1 | 2181 | |
aoqi@1 | 2182 | // Retain tlab and allocate object in shared space if |
aoqi@1 | 2183 | // the amount free in the tlab is too large to discard. |
aoqi@1 | 2184 | ld_ptr(t2, thread_reg, in_bytes(JavaThread::tlab_refill_waste_limit_offset())); |
aoqi@1 | 2185 | slt(AT, t2, t1); |
aoqi@1 | 2186 | beq(AT, R0, discard_tlab); |
aoqi@1 | 2187 | delayed()->nop(); |
aoqi@1 | 2188 | |
aoqi@1 | 2189 | // Retain |
aoqi@1 | 2190 | |
aoqi@1 | 2191 | #ifndef _LP64 |
aoqi@1 | 2192 | move(AT, ThreadLocalAllocBuffer::refill_waste_limit_increment()); |
aoqi@1 | 2193 | #else |
aoqi@1 | 2194 | li(AT, ThreadLocalAllocBuffer::refill_waste_limit_increment()); |
aoqi@1 | 2195 | #endif |
aoqi@1 | 2196 | add(t2, t2, AT); |
aoqi@1 | 2197 | st_ptr(t2, thread_reg, in_bytes(JavaThread::tlab_refill_waste_limit_offset())); |
aoqi@1 | 2198 | |
aoqi@1 | 2199 | if (TLABStats) { |
aoqi@1 | 2200 | // increment number of slow_allocations |
aoqi@1 | 2201 | lw(AT, thread_reg, in_bytes(JavaThread::tlab_slow_allocations_offset())); |
aoqi@1 | 2202 | addiu(AT, AT, 1); |
aoqi@1 | 2203 | sw(AT, thread_reg, in_bytes(JavaThread::tlab_slow_allocations_offset())); |
aoqi@1 | 2204 | } |
aoqi@1 | 2205 | b(try_eden); |
aoqi@1 | 2206 | delayed()->nop(); |
aoqi@1 | 2207 | |
aoqi@1 | 2208 | bind(discard_tlab); |
aoqi@1 | 2209 | if (TLABStats) { |
aoqi@1 | 2210 | // increment number of refills |
aoqi@1 | 2211 | lw(AT, thread_reg, in_bytes(JavaThread::tlab_number_of_refills_offset())); |
aoqi@1 | 2212 | addi(AT, AT, 1); |
aoqi@1 | 2213 | sw(AT, thread_reg, in_bytes(JavaThread::tlab_number_of_refills_offset())); |
aoqi@1 | 2214 | // accumulate wastage -- t1 is amount free in tlab |
aoqi@1 | 2215 | lw(AT, thread_reg, in_bytes(JavaThread::tlab_fast_refill_waste_offset())); |
aoqi@1 | 2216 | add(AT, AT, t1); |
aoqi@1 | 2217 | sw(AT, thread_reg, in_bytes(JavaThread::tlab_fast_refill_waste_offset())); |
aoqi@1 | 2218 | } |
aoqi@1 | 2219 | |
aoqi@1 | 2220 | // if tlab is currently allocated (top or end != null) then |
aoqi@1 | 2221 | // fill [top, end + alignment_reserve) with array object |
aoqi@1 | 2222 | beq(top, R0, do_refill); |
aoqi@1 | 2223 | delayed()->nop(); |
aoqi@1 | 2224 | |
aoqi@1 | 2225 | // set up the mark word |
aoqi@1 | 2226 | li(AT, (long)markOopDesc::prototype()->copy_set_hash(0x2)); |
aoqi@1 | 2227 | st_ptr(AT, top, oopDesc::mark_offset_in_bytes()); |
aoqi@1 | 2228 | |
aoqi@1 | 2229 | // set the length to the remaining space |
aoqi@1 | 2230 | addi(t1, t1, - typeArrayOopDesc::header_size(T_INT)); |
aoqi@1 | 2231 | addi(t1, t1, ThreadLocalAllocBuffer::alignment_reserve()); |
aoqi@1 | 2232 | shl(t1, log2_intptr(HeapWordSize/sizeof(jint))); |
aoqi@1 | 2233 | sw(t1, top, arrayOopDesc::length_offset_in_bytes()); |
aoqi@1 | 2234 | |
aoqi@1 | 2235 | // set klass to intArrayKlass |
aoqi@1 | 2236 | #ifndef _LP64 |
aoqi@1 | 2237 | lui(AT, split_high((intptr_t)Universe::intArrayKlassObj_addr())); |
aoqi@1 | 2238 | lw(t1, AT, split_low((intptr_t)Universe::intArrayKlassObj_addr())); |
aoqi@1 | 2239 | #else |
aoqi@1 | 2240 | li(AT, (intptr_t)Universe::intArrayKlassObj_addr()); |
aoqi@1 | 2241 | ld_ptr(t1, AT, 0); |
aoqi@1 | 2242 | #endif |
aoqi@1 | 2243 | //st_ptr(t1, top, oopDesc::klass_offset_in_bytes()); |
aoqi@1 | 2244 | store_klass(top, t1); |
aoqi@1 | 2245 | |
aoqi@1 | 2246 | // refill the tlab with an eden allocation |
aoqi@1 | 2247 | bind(do_refill); |
aoqi@1 | 2248 | ld_ptr(t1, thread_reg, in_bytes(JavaThread::tlab_size_offset())); |
aoqi@1 | 2249 | shl(t1, LogHeapWordSize); |
aoqi@1 | 2250 | // add object_size ?? |
aoqi@1 | 2251 | eden_allocate(top, t1, 0, t2, t3, slow_case); |
aoqi@1 | 2252 | |
aoqi@1 | 2253 | // Check that t1 was preserved in eden_allocate. |
aoqi@1 | 2254 | #ifdef ASSERT |
aoqi@1 | 2255 | if (UseTLAB) { |
aoqi@1 | 2256 | Label ok; |
aoqi@1 | 2257 | assert_different_registers(thread_reg, t1); |
aoqi@1 | 2258 | ld_ptr(AT, thread_reg, in_bytes(JavaThread::tlab_size_offset())); |
aoqi@1 | 2259 | shl(AT, LogHeapWordSize); |
aoqi@1 | 2260 | beq(AT, t1, ok); |
aoqi@1 | 2261 | delayed()->nop(); |
aoqi@1 | 2262 | stop("assert(t1 != tlab size)"); |
aoqi@1 | 2263 | should_not_reach_here(); |
aoqi@1 | 2264 | |
aoqi@1 | 2265 | bind(ok); |
aoqi@1 | 2266 | } |
aoqi@1 | 2267 | #endif |
aoqi@1 | 2268 | st_ptr(top, thread_reg, in_bytes(JavaThread::tlab_start_offset())); |
aoqi@1 | 2269 | st_ptr(top, thread_reg, in_bytes(JavaThread::tlab_top_offset())); |
aoqi@1 | 2270 | add(top, top, t1); |
aoqi@1 | 2271 | addi(top, top, - ThreadLocalAllocBuffer::alignment_reserve_in_bytes()); |
aoqi@1 | 2272 | st_ptr(top, thread_reg, in_bytes(JavaThread::tlab_end_offset())); |
aoqi@1 | 2273 | verify_tlab(t1, t2); |
aoqi@1 | 2274 | b(retry); |
aoqi@1 | 2275 | delayed()->nop(); |
aoqi@1 | 2276 | } |
aoqi@1 | 2277 | |
aoqi@1 | 2278 | static const double pi_4 = 0.7853981633974483; |
aoqi@1 | 2279 | |
aoqi@1 | 2280 | // the x86 version is to clumsy, i dont think we need that fuss. maybe i'm wrong, FIXME |
aoqi@1 | 2281 | // must get argument(a double) in F12/F13 |
aoqi@1 | 2282 | //void MacroAssembler::trigfunc(char trig, bool preserve_cpu_regs, int num_fpu_regs_in_use) { |
aoqi@1 | 2283 | //We need to preseve the register which maybe modified during the Call @Jerome |
aoqi@1 | 2284 | void MacroAssembler::trigfunc(char trig, int num_fpu_regs_in_use) { |
aoqi@1 | 2285 | //save all modified register here |
aoqi@1 | 2286 | // if (preserve_cpu_regs) { |
aoqi@1 | 2287 | // } |
aoqi@1 | 2288 | //FIXME, in the disassembly of tirgfunc, only used V0,V1,T9, SP,RA,so we ony save V0,V1,T9 |
aoqi@1 | 2289 | pushad(); |
aoqi@1 | 2290 | //we should preserve the stack space before we call |
aoqi@1 | 2291 | addi(SP, SP, -wordSize * 2); |
aoqi@1 | 2292 | switch (trig){ |
aoqi@1 | 2293 | case 's' : |
aoqi@1 | 2294 | call( CAST_FROM_FN_PTR(address, SharedRuntime::dsin), relocInfo::runtime_call_type ); |
aoqi@1 | 2295 | delayed()->nop(); |
aoqi@1 | 2296 | break; |
aoqi@1 | 2297 | case 'c': |
aoqi@1 | 2298 | call( CAST_FROM_FN_PTR(address, SharedRuntime::dcos), relocInfo::runtime_call_type ); |
aoqi@1 | 2299 | delayed()->nop(); |
aoqi@1 | 2300 | break; |
aoqi@1 | 2301 | case 't': |
aoqi@1 | 2302 | call( CAST_FROM_FN_PTR(address, SharedRuntime::dtan), relocInfo::runtime_call_type ); |
aoqi@1 | 2303 | delayed()->nop(); |
aoqi@1 | 2304 | break; |
aoqi@1 | 2305 | default:assert (false, "bad intrinsic"); |
aoqi@1 | 2306 | break; |
aoqi@1 | 2307 | |
aoqi@1 | 2308 | } |
aoqi@1 | 2309 | |
aoqi@1 | 2310 | addi(SP, SP, wordSize * 2); |
aoqi@1 | 2311 | popad(); |
aoqi@1 | 2312 | // if (preserve_cpu_regs) { |
aoqi@1 | 2313 | // } |
aoqi@1 | 2314 | } |
aoqi@1 | 2315 | |
aoqi@1 | 2316 | #ifdef _LP64 |
aoqi@1 | 2317 | void MacroAssembler::li(Register rd, long imm) { |
aoqi@1 | 2318 | if (imm <= max_jint && imm >= min_jint) { |
aoqi@1 | 2319 | li32(rd, (int)imm); |
aoqi@1 | 2320 | } else if (julong(imm) <= 0xFFFFFFFF) { |
aoqi@1 | 2321 | assert_not_delayed(); |
aoqi@1 | 2322 | // lui sign-extends, so we can't use that. |
aoqi@1 | 2323 | ori(rd, R0, julong(imm) >> 16); |
aoqi@1 | 2324 | dsll(rd, rd, 16); |
aoqi@1 | 2325 | ori(rd, rd, split_low(imm)); |
aoqi@1 | 2326 | //aoqi_test |
aoqi@1 | 2327 | //} else if ((imm > 0) && ((imm >> 48) == 0)) { |
aoqi@1 | 2328 | } else if ((imm > 0) && is_simm16(imm >> 32)) { |
aoqi@1 | 2329 | /* A 48-bit address */ |
aoqi@1 | 2330 | li48(rd, imm); |
aoqi@1 | 2331 | } else { |
aoqi@1 | 2332 | li64(rd, imm); |
aoqi@1 | 2333 | } |
aoqi@1 | 2334 | } |
aoqi@1 | 2335 | #else |
aoqi@1 | 2336 | void MacroAssembler::li(Register rd, long imm) { |
aoqi@1 | 2337 | li32(rd, (int)imm); |
aoqi@1 | 2338 | } |
aoqi@1 | 2339 | #endif |
aoqi@1 | 2340 | |
aoqi@1 | 2341 | void MacroAssembler::li32(Register reg, int imm) { |
aoqi@1 | 2342 | if (is_simm16(imm)) { |
aoqi@1 | 2343 | /* Jin: for imm < 0, we should use addi instead of addiu. |
aoqi@1 | 2344 | * |
aoqi@1 | 2345 | * java.lang.StringCoding$StringDecoder.decode(jobject, jint, jint) |
aoqi@1 | 2346 | * |
aoqi@1 | 2347 | * 78 move [int:-1|I] [a0|I] |
aoqi@1 | 2348 | * : daddi a0, zero, 0xffffffff (correct) |
aoqi@1 | 2349 | * : daddiu a0, zero, 0xffffffff (incorrect) |
aoqi@1 | 2350 | */ |
aoqi@1 | 2351 | if (imm >= 0) |
aoqi@1 | 2352 | addiu(reg, R0, imm); |
aoqi@1 | 2353 | else |
aoqi@1 | 2354 | addi(reg, R0, imm); |
aoqi@1 | 2355 | } else { |
aoqi@1 | 2356 | lui(reg, split_low(imm >> 16)); |
aoqi@1 | 2357 | if (split_low(imm)) |
aoqi@1 | 2358 | ori(reg, reg, split_low(imm)); |
aoqi@1 | 2359 | } |
aoqi@1 | 2360 | } |
aoqi@1 | 2361 | |
aoqi@1 | 2362 | #ifdef _LP64 |
fujie@283 | 2363 | void MacroAssembler::set64(Register d, jlong value) { |
fujie@283 | 2364 | assert_not_delayed(); |
fujie@283 | 2365 | |
fujie@283 | 2366 | int hi = (int)(value >> 32); |
fujie@283 | 2367 | int lo = (int)(value & ~0); |
fujie@283 | 2368 | |
fujie@283 | 2369 | if (value == lo) { // 32-bit integer |
fujie@283 | 2370 | if (is_simm16(value)) { |
fujie@283 | 2371 | daddiu(d, R0, value); |
fujie@283 | 2372 | } else { |
fujie@283 | 2373 | lui(d, split_low(value >> 16)); |
fujie@283 | 2374 | if (split_low(value)) { |
fujie@283 | 2375 | ori(d, d, split_low(value)); |
fujie@283 | 2376 | } |
fujie@283 | 2377 | } |
fujie@283 | 2378 | } else if (hi == 0) { // hardware zero-extends to upper 32 |
fujie@283 | 2379 | ori(d, R0, julong(value) >> 16); |
fujie@283 | 2380 | dsll(d, d, 16); |
fujie@283 | 2381 | if (split_low(value)) { |
fujie@283 | 2382 | ori(d, d, split_low(value)); |
fujie@283 | 2383 | } |
fujie@283 | 2384 | } else if ((value> 0) && is_simm16(value >> 32)) { // li48 |
fujie@283 | 2385 | // 4 insts |
fujie@283 | 2386 | li48(d, value); |
fujie@283 | 2387 | } else { // li64 |
fujie@283 | 2388 | // 6 insts |
fujie@283 | 2389 | li64(d, value); |
fujie@283 | 2390 | } |
fujie@283 | 2391 | } |
fujie@283 | 2392 | |
fujie@283 | 2393 | |
fujie@283 | 2394 | int MacroAssembler::insts_for_set64(jlong value) { |
fujie@283 | 2395 | int hi = (int)(value >> 32); |
fujie@283 | 2396 | int lo = (int)(value & ~0); |
fujie@283 | 2397 | |
fujie@283 | 2398 | int count = 0; |
fujie@283 | 2399 | |
fujie@283 | 2400 | if (value == lo) { // 32-bit integer |
fujie@283 | 2401 | if (is_simm16(value)) { |
fujie@283 | 2402 | //daddiu(d, R0, value); |
fujie@283 | 2403 | count++; |
fujie@283 | 2404 | } else { |
fujie@283 | 2405 | //lui(d, split_low(value >> 16)); |
fujie@283 | 2406 | count++; |
fujie@283 | 2407 | if (split_low(value)) { |
fujie@283 | 2408 | //ori(d, d, split_low(value)); |
fujie@283 | 2409 | count++; |
fujie@283 | 2410 | } |
fujie@283 | 2411 | } |
fujie@283 | 2412 | } else if (hi == 0) { // hardware zero-extends to upper 32 |
fujie@283 | 2413 | //ori(d, R0, julong(value) >> 16); |
fujie@283 | 2414 | //dsll(d, d, 16); |
fujie@283 | 2415 | count += 2; |
fujie@283 | 2416 | if (split_low(value)) { |
fujie@283 | 2417 | //ori(d, d, split_low(value)); |
fujie@283 | 2418 | count++; |
fujie@283 | 2419 | } |
fujie@283 | 2420 | } else if ((value> 0) && is_simm16(value >> 32)) { // li48 |
fujie@283 | 2421 | // 4 insts |
fujie@283 | 2422 | //li48(d, value); |
fujie@283 | 2423 | count += 4; |
fujie@283 | 2424 | } else { // li64 |
fujie@283 | 2425 | // 6 insts |
fujie@283 | 2426 | //li64(d, value); |
fujie@283 | 2427 | count += 6; |
fujie@283 | 2428 | } |
fujie@283 | 2429 | |
fujie@283 | 2430 | return count; |
fujie@283 | 2431 | } |
fujie@283 | 2432 | |
fujie@340 | 2433 | void MacroAssembler::patchable_set48(Register d, jlong value) { |
fujie@340 | 2434 | assert_not_delayed(); |
fujie@340 | 2435 | |
fujie@340 | 2436 | int hi = (int)(value >> 32); |
fujie@340 | 2437 | int lo = (int)(value & ~0); |
fujie@340 | 2438 | |
fujie@340 | 2439 | int count = 0; |
fujie@340 | 2440 | |
fujie@340 | 2441 | if (value == lo) { // 32-bit integer |
fujie@340 | 2442 | if (is_simm16(value)) { |
fujie@340 | 2443 | daddiu(d, R0, value); |
fujie@340 | 2444 | count += 1; |
fujie@340 | 2445 | } else { |
fujie@340 | 2446 | lui(d, split_low(value >> 16)); |
fujie@340 | 2447 | count += 1; |
fujie@340 | 2448 | if (split_low(value)) { |
fujie@340 | 2449 | ori(d, d, split_low(value)); |
fujie@340 | 2450 | count += 1; |
fujie@340 | 2451 | } |
fujie@340 | 2452 | } |
fujie@340 | 2453 | } else if (hi == 0) { // hardware zero-extends to upper 32 |
fujie@340 | 2454 | ori(d, R0, julong(value) >> 16); |
fujie@340 | 2455 | dsll(d, d, 16); |
fujie@340 | 2456 | count += 2; |
fujie@340 | 2457 | if (split_low(value)) { |
fujie@340 | 2458 | ori(d, d, split_low(value)); |
fujie@340 | 2459 | count += 1; |
fujie@340 | 2460 | } |
fujie@340 | 2461 | } else if ((value> 0) && is_simm16(value >> 32)) { // li48 |
fujie@340 | 2462 | // 4 insts |
fujie@340 | 2463 | li48(d, value); |
fujie@340 | 2464 | count += 4; |
fujie@340 | 2465 | } else { // li64 |
fujie@373 | 2466 | tty->print_cr("value = 0x%x", value); |
fujie@340 | 2467 | guarantee(false, "Not supported yet !"); |
fujie@340 | 2468 | } |
fujie@340 | 2469 | |
fujie@340 | 2470 | for (count; count < 4; count++) { |
fujie@340 | 2471 | nop(); |
fujie@340 | 2472 | } |
fujie@340 | 2473 | } |
fujie@340 | 2474 | |
fujie@340 | 2475 | void MacroAssembler::patchable_set32(Register d, jlong value) { |
fujie@340 | 2476 | assert_not_delayed(); |
fujie@340 | 2477 | |
fujie@340 | 2478 | int hi = (int)(value >> 32); |
fujie@340 | 2479 | int lo = (int)(value & ~0); |
fujie@340 | 2480 | |
fujie@340 | 2481 | int count = 0; |
fujie@340 | 2482 | |
fujie@340 | 2483 | if (value == lo) { // 32-bit integer |
fujie@340 | 2484 | if (is_simm16(value)) { |
fujie@340 | 2485 | daddiu(d, R0, value); |
fujie@340 | 2486 | count += 1; |
fujie@340 | 2487 | } else { |
fujie@340 | 2488 | lui(d, split_low(value >> 16)); |
fujie@340 | 2489 | count += 1; |
fujie@340 | 2490 | if (split_low(value)) { |
fujie@340 | 2491 | ori(d, d, split_low(value)); |
fujie@340 | 2492 | count += 1; |
fujie@340 | 2493 | } |
fujie@340 | 2494 | } |
fujie@345 | 2495 | } else if (hi == 0) { // hardware zero-extends to upper 32 |
fujie@345 | 2496 | ori(d, R0, julong(value) >> 16); |
fujie@345 | 2497 | dsll(d, d, 16); |
fujie@345 | 2498 | count += 2; |
fujie@345 | 2499 | if (split_low(value)) { |
fujie@345 | 2500 | ori(d, d, split_low(value)); |
fujie@345 | 2501 | count += 1; |
fujie@345 | 2502 | } |
fujie@340 | 2503 | } else { |
fujie@373 | 2504 | tty->print_cr("value = 0x%x", value); |
fujie@340 | 2505 | guarantee(false, "Not supported yet !"); |
fujie@340 | 2506 | } |
fujie@340 | 2507 | |
fujie@345 | 2508 | for (count; count < 3; count++) { |
fujie@340 | 2509 | nop(); |
fujie@340 | 2510 | } |
fujie@340 | 2511 | } |
fujie@340 | 2512 | |
fujie@373 | 2513 | void MacroAssembler::patchable_call32(Register d, jlong value) { |
fujie@373 | 2514 | assert_not_delayed(); |
fujie@373 | 2515 | |
fujie@373 | 2516 | int hi = (int)(value >> 32); |
fujie@373 | 2517 | int lo = (int)(value & ~0); |
fujie@373 | 2518 | |
fujie@373 | 2519 | int count = 0; |
fujie@373 | 2520 | |
fujie@373 | 2521 | if (value == lo) { // 32-bit integer |
fujie@373 | 2522 | if (is_simm16(value)) { |
fujie@373 | 2523 | daddiu(d, R0, value); |
fujie@373 | 2524 | count += 1; |
fujie@373 | 2525 | } else { |
fujie@373 | 2526 | lui(d, split_low(value >> 16)); |
fujie@373 | 2527 | count += 1; |
fujie@373 | 2528 | if (split_low(value)) { |
fujie@373 | 2529 | ori(d, d, split_low(value)); |
fujie@373 | 2530 | count += 1; |
fujie@373 | 2531 | } |
fujie@373 | 2532 | } |
fujie@373 | 2533 | } else { |
fujie@373 | 2534 | tty->print_cr("value = 0x%x", value); |
fujie@373 | 2535 | guarantee(false, "Not supported yet !"); |
fujie@373 | 2536 | } |
fujie@373 | 2537 | |
fujie@373 | 2538 | for (count; count < 2; count++) { |
fujie@373 | 2539 | nop(); |
fujie@373 | 2540 | } |
fujie@373 | 2541 | } |
fujie@344 | 2542 | |
fujie@344 | 2543 | void MacroAssembler::set_narrow_klass(Register dst, Klass* k) { |
fujie@344 | 2544 | assert(UseCompressedClassPointers, "should only be used for compressed header"); |
fujie@344 | 2545 | assert(oop_recorder() != NULL, "this assembler needs an OopRecorder"); |
fujie@344 | 2546 | |
fujie@344 | 2547 | int klass_index = oop_recorder()->find_index(k); |
fujie@344 | 2548 | RelocationHolder rspec = metadata_Relocation::spec(klass_index); |
fujie@344 | 2549 | long narrowKlass = (long)Klass::encode_klass(k); |
fujie@344 | 2550 | |
fujie@344 | 2551 | relocate(rspec, Assembler::narrow_oop_operand); |
fujie@347 | 2552 | patchable_set48(dst, narrowKlass); |
fujie@344 | 2553 | } |
fujie@344 | 2554 | |
fujie@344 | 2555 | |
fujie@344 | 2556 | void MacroAssembler::set_narrow_oop(Register dst, jobject obj) { |
fujie@344 | 2557 | assert(UseCompressedOops, "should only be used for compressed header"); |
fujie@344 | 2558 | assert(oop_recorder() != NULL, "this assembler needs an OopRecorder"); |
fujie@344 | 2559 | |
fujie@344 | 2560 | int oop_index = oop_recorder()->find_index(obj); |
fujie@344 | 2561 | RelocationHolder rspec = oop_Relocation::spec(oop_index); |
fujie@344 | 2562 | |
fujie@344 | 2563 | relocate(rspec, Assembler::narrow_oop_operand); |
fujie@347 | 2564 | patchable_set48(dst, oop_index); |
fujie@344 | 2565 | } |
fujie@344 | 2566 | |
aoqi@1 | 2567 | void MacroAssembler::li64(Register rd, long imm) { |
aoqi@1 | 2568 | assert_not_delayed(); |
aoqi@1 | 2569 | lui(rd, imm >> 48); |
aoqi@1 | 2570 | ori(rd, rd, split_low(imm >> 32)); |
aoqi@1 | 2571 | dsll(rd, rd, 16); |
aoqi@1 | 2572 | ori(rd, rd, split_low(imm >> 16)); |
aoqi@1 | 2573 | dsll(rd, rd, 16); |
aoqi@1 | 2574 | ori(rd, rd, split_low(imm)); |
aoqi@1 | 2575 | } |
aoqi@1 | 2576 | |
aoqi@1 | 2577 | void MacroAssembler::li48(Register rd, long imm) { |
fujie@283 | 2578 | assert_not_delayed(); |
aoqi@1 | 2579 | assert(is_simm16(imm >> 32), "Not a 48-bit address"); |
aoqi@1 | 2580 | lui(rd, imm >> 32); |
aoqi@1 | 2581 | ori(rd, rd, split_low(imm >> 16)); |
aoqi@1 | 2582 | dsll(rd, rd, 16); |
aoqi@1 | 2583 | ori(rd, rd, split_low(imm)); |
aoqi@1 | 2584 | } |
aoqi@1 | 2585 | #endif |
aoqi@1 | 2586 | // NOTE: i dont push eax as i486. |
aoqi@1 | 2587 | // the x86 save eax for it use eax as the jump register |
aoqi@1 | 2588 | void MacroAssembler::verify_oop(Register reg, const char* s) { |
aoqi@1 | 2589 | /* |
aoqi@1 | 2590 | if (!VerifyOops) return; |
aoqi@1 | 2591 | |
aoqi@1 | 2592 | // Pass register number to verify_oop_subroutine |
aoqi@1 | 2593 | char* b = new char[strlen(s) + 50]; |
aoqi@1 | 2594 | sprintf(b, "verify_oop: %s: %s", reg->name(), s); |
aoqi@1 | 2595 | push(rax); // save rax, |
aoqi@1 | 2596 | push(reg); // pass register argument |
aoqi@1 | 2597 | ExternalAddress buffer((address) b); |
aoqi@1 | 2598 | // avoid using pushptr, as it modifies scratch registers |
aoqi@1 | 2599 | // and our contract is not to modify anything |
aoqi@1 | 2600 | movptr(rax, buffer.addr()); |
aoqi@1 | 2601 | push(rax); |
aoqi@1 | 2602 | // call indirectly to solve generation ordering problem |
aoqi@1 | 2603 | movptr(rax, ExternalAddress(StubRoutines::verify_oop_subroutine_entry_address())); |
aoqi@1 | 2604 | call(rax); |
aoqi@1 | 2605 | */ |
aoqi@1 | 2606 | if (!VerifyOops) return; |
aoqi@1 | 2607 | const char * b = NULL; |
aoqi@1 | 2608 | stringStream ss; |
aoqi@1 | 2609 | ss.print("verify_oop: %s: %s", reg->name(), s); |
aoqi@1 | 2610 | b = code_string(ss.as_string()); |
aoqi@1 | 2611 | #ifdef _LP64 |
aoqi@1 | 2612 | pushad(); |
aoqi@1 | 2613 | move(A1, reg); |
aoqi@1 | 2614 | li(A0, (long)b); |
aoqi@1 | 2615 | li(AT, (long)StubRoutines::verify_oop_subroutine_entry_address()); |
aoqi@1 | 2616 | ld(T9, AT, 0); |
aoqi@1 | 2617 | jalr(T9); |
aoqi@1 | 2618 | delayed()->nop(); |
aoqi@1 | 2619 | popad(); |
aoqi@1 | 2620 | #else |
aoqi@1 | 2621 | // Pass register number to verify_oop_subroutine |
aoqi@1 | 2622 | sw(T0, SP, - wordSize); |
aoqi@1 | 2623 | sw(T1, SP, - 2*wordSize); |
aoqi@1 | 2624 | sw(RA, SP, - 3*wordSize); |
aoqi@1 | 2625 | sw(A0, SP ,- 4*wordSize); |
aoqi@1 | 2626 | sw(A1, SP ,- 5*wordSize); |
aoqi@1 | 2627 | sw(AT, SP ,- 6*wordSize); |
aoqi@1 | 2628 | sw(T9, SP ,- 7*wordSize); |
aoqi@1 | 2629 | addiu(SP, SP, - 7 * wordSize); |
aoqi@1 | 2630 | move(A1, reg); |
aoqi@1 | 2631 | li(A0, (long)b); |
aoqi@1 | 2632 | // call indirectly to solve generation ordering problem |
aoqi@1 | 2633 | li(AT, (long)StubRoutines::verify_oop_subroutine_entry_address()); |
aoqi@1 | 2634 | lw(T9, AT, 0); |
aoqi@1 | 2635 | jalr(T9); |
aoqi@1 | 2636 | delayed()->nop(); |
aoqi@1 | 2637 | lw(T0, SP, 6* wordSize); |
aoqi@1 | 2638 | lw(T1, SP, 5* wordSize); |
aoqi@1 | 2639 | lw(RA, SP, 4* wordSize); |
aoqi@1 | 2640 | lw(A0, SP, 3* wordSize); |
aoqi@1 | 2641 | lw(A1, SP, 2* wordSize); |
aoqi@1 | 2642 | lw(AT, SP, 1* wordSize); |
aoqi@1 | 2643 | lw(T9, SP, 0* wordSize); |
aoqi@1 | 2644 | addiu(SP, SP, 7 * wordSize); |
aoqi@1 | 2645 | #endif |
aoqi@1 | 2646 | } |
aoqi@1 | 2647 | |
aoqi@1 | 2648 | |
aoqi@1 | 2649 | void MacroAssembler::verify_oop_addr(Address addr, const char* s) { |
aoqi@1 | 2650 | if (!VerifyOops) { |
aoqi@1 | 2651 | nop(); |
aoqi@1 | 2652 | return; |
aoqi@1 | 2653 | } |
aoqi@1 | 2654 | // Pass register number to verify_oop_subroutine |
aoqi@1 | 2655 | const char * b = NULL; |
aoqi@1 | 2656 | stringStream ss; |
aoqi@1 | 2657 | ss.print("verify_oop_addr: %s", s); |
aoqi@1 | 2658 | b = code_string(ss.as_string()); |
aoqi@1 | 2659 | |
aoqi@1 | 2660 | st_ptr(T0, SP, - wordSize); |
aoqi@1 | 2661 | st_ptr(T1, SP, - 2*wordSize); |
aoqi@1 | 2662 | st_ptr(RA, SP, - 3*wordSize); |
aoqi@1 | 2663 | st_ptr(A0, SP, - 4*wordSize); |
aoqi@1 | 2664 | st_ptr(A1, SP, - 5*wordSize); |
aoqi@1 | 2665 | st_ptr(AT, SP, - 6*wordSize); |
aoqi@1 | 2666 | st_ptr(T9, SP, - 7*wordSize); |
aoqi@1 | 2667 | ld_ptr(A1, addr); // addr may use SP, so load from it before change SP |
aoqi@1 | 2668 | addiu(SP, SP, - 7 * wordSize); |
aoqi@1 | 2669 | |
aoqi@1 | 2670 | li(A0, (long)b); |
aoqi@1 | 2671 | // call indirectly to solve generation ordering problem |
aoqi@1 | 2672 | li(AT, (long)StubRoutines::verify_oop_subroutine_entry_address()); |
aoqi@1 | 2673 | ld_ptr(T9, AT, 0); |
aoqi@1 | 2674 | jalr(T9); |
aoqi@1 | 2675 | delayed()->nop(); |
aoqi@1 | 2676 | ld_ptr(T0, SP, 6* wordSize); |
aoqi@1 | 2677 | ld_ptr(T1, SP, 5* wordSize); |
aoqi@1 | 2678 | ld_ptr(RA, SP, 4* wordSize); |
aoqi@1 | 2679 | ld_ptr(A0, SP, 3* wordSize); |
aoqi@1 | 2680 | ld_ptr(A1, SP, 2* wordSize); |
aoqi@1 | 2681 | ld_ptr(AT, SP, 1* wordSize); |
aoqi@1 | 2682 | ld_ptr(T9, SP, 0* wordSize); |
aoqi@1 | 2683 | addiu(SP, SP, 7 * wordSize); |
aoqi@1 | 2684 | } |
aoqi@1 | 2685 | |
aoqi@1 | 2686 | // used registers : T0, T1 |
aoqi@1 | 2687 | void MacroAssembler::verify_oop_subroutine() { |
aoqi@1 | 2688 | // RA: ra |
aoqi@1 | 2689 | // A0: char* error message |
aoqi@1 | 2690 | // A1: oop object to verify |
aoqi@1 | 2691 | |
aoqi@1 | 2692 | Label exit, error; |
aoqi@1 | 2693 | // increment counter |
aoqi@1 | 2694 | li(T0, (long)StubRoutines::verify_oop_count_addr()); |
aoqi@1 | 2695 | lw(AT, T0, 0); |
aoqi@1 | 2696 | #ifdef _LP64 |
aoqi@1 | 2697 | //FIXME, aoqi: rewrite addi, addu, etc in 64bits mode. |
aoqi@1 | 2698 | daddi(AT, AT, 1); |
aoqi@1 | 2699 | #else |
aoqi@1 | 2700 | addi(AT, AT, 1); |
aoqi@1 | 2701 | #endif |
aoqi@1 | 2702 | sw(AT, T0, 0); |
aoqi@1 | 2703 | |
aoqi@1 | 2704 | // make sure object is 'reasonable' |
aoqi@1 | 2705 | beq(A1, R0, exit); // if obj is NULL it is ok |
aoqi@1 | 2706 | delayed()->nop(); |
aoqi@1 | 2707 | |
aoqi@1 | 2708 | // Check if the oop is in the right area of memory |
aoqi@1 | 2709 | //const int oop_mask = Universe::verify_oop_mask(); |
aoqi@1 | 2710 | //const int oop_bits = Universe::verify_oop_bits(); |
aoqi@1 | 2711 | const uintptr_t oop_mask = Universe::verify_oop_mask(); |
aoqi@1 | 2712 | const uintptr_t oop_bits = Universe::verify_oop_bits(); |
aoqi@1 | 2713 | li(AT, oop_mask); |
aoqi@1 | 2714 | andr(T0, A1, AT); |
aoqi@1 | 2715 | li(AT, oop_bits); |
aoqi@1 | 2716 | bne(T0, AT, error); |
aoqi@1 | 2717 | delayed()->nop(); |
aoqi@1 | 2718 | |
aoqi@1 | 2719 | // make sure klass is 'reasonable' |
aoqi@1 | 2720 | //add for compressedoops |
aoqi@1 | 2721 | reinit_heapbase(); |
aoqi@1 | 2722 | //add for compressedoops |
aoqi@1 | 2723 | load_klass(T0, A1); |
aoqi@1 | 2724 | beq(T0, R0, error); // if klass is NULL it is broken |
aoqi@1 | 2725 | delayed()->nop(); |
aoqi@1 | 2726 | #if 0 |
aoqi@1 | 2727 | //FIXME:wuhui. |
aoqi@1 | 2728 | // Check if the klass is in the right area of memory |
aoqi@1 | 2729 | //const int klass_mask = Universe::verify_klass_mask(); |
aoqi@1 | 2730 | //const int klass_bits = Universe::verify_klass_bits(); |
aoqi@1 | 2731 | const uintptr_t klass_mask = Universe::verify_klass_mask(); |
aoqi@1 | 2732 | const uintptr_t klass_bits = Universe::verify_klass_bits(); |
aoqi@1 | 2733 | |
aoqi@1 | 2734 | li(AT, klass_mask); |
aoqi@1 | 2735 | andr(T1, T0, AT); |
aoqi@1 | 2736 | li(AT, klass_bits); |
aoqi@1 | 2737 | bne(T1, AT, error); |
aoqi@1 | 2738 | delayed()->nop(); |
aoqi@1 | 2739 | // make sure klass' klass is 'reasonable' |
aoqi@1 | 2740 | //add for compressedoops |
aoqi@1 | 2741 | load_klass(T0, T0); |
aoqi@1 | 2742 | beq(T0, R0, error); // if klass' klass is NULL it is broken |
aoqi@1 | 2743 | delayed()->nop(); |
aoqi@1 | 2744 | |
aoqi@1 | 2745 | li(AT, klass_mask); |
aoqi@1 | 2746 | andr(T1, T0, AT); |
aoqi@1 | 2747 | li(AT, klass_bits); |
aoqi@1 | 2748 | bne(T1, AT, error); |
aoqi@1 | 2749 | delayed()->nop(); // if klass not in right area of memory it is broken too. |
aoqi@1 | 2750 | #endif |
aoqi@1 | 2751 | // return if everything seems ok |
aoqi@1 | 2752 | bind(exit); |
aoqi@1 | 2753 | |
aoqi@1 | 2754 | jr(RA); |
aoqi@1 | 2755 | delayed()->nop(); |
aoqi@1 | 2756 | |
aoqi@1 | 2757 | // handle errors |
aoqi@1 | 2758 | bind(error); |
aoqi@1 | 2759 | pushad(); |
aoqi@1 | 2760 | #ifndef _LP64 |
aoqi@1 | 2761 | addi(SP, SP, (-1) * wordSize); |
aoqi@1 | 2762 | #endif |
aoqi@1 | 2763 | call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type); |
aoqi@1 | 2764 | delayed()->nop(); |
aoqi@1 | 2765 | #ifndef _LP64 |
aoqi@1 | 2766 | addiu(SP, SP, 1 * wordSize); |
aoqi@1 | 2767 | #endif |
aoqi@1 | 2768 | popad(); |
aoqi@1 | 2769 | jr(RA); |
aoqi@1 | 2770 | delayed()->nop(); |
aoqi@1 | 2771 | } |
aoqi@1 | 2772 | |
aoqi@1 | 2773 | void MacroAssembler::verify_tlab(Register t1, Register t2) { |
aoqi@1 | 2774 | #ifdef ASSERT |
aoqi@1 | 2775 | assert_different_registers(t1, t2, AT); |
aoqi@1 | 2776 | if (UseTLAB && VerifyOops) { |
aoqi@1 | 2777 | Label next, ok; |
aoqi@1 | 2778 | |
aoqi@1 | 2779 | get_thread(t1); |
aoqi@1 | 2780 | |
aoqi@1 | 2781 | ld_ptr(t2, t1, in_bytes(JavaThread::tlab_top_offset())); |
aoqi@1 | 2782 | ld_ptr(AT, t1, in_bytes(JavaThread::tlab_start_offset())); |
aoqi@1 | 2783 | sltu(AT, t2, AT); |
aoqi@1 | 2784 | beq(AT, R0, next); |
aoqi@1 | 2785 | delayed()->nop(); |
aoqi@1 | 2786 | |
aoqi@1 | 2787 | stop("assert(top >= start)"); |
aoqi@1 | 2788 | |
aoqi@1 | 2789 | bind(next); |
aoqi@1 | 2790 | ld_ptr(AT, t1, in_bytes(JavaThread::tlab_end_offset())); |
aoqi@1 | 2791 | sltu(AT, AT, t2); |
aoqi@1 | 2792 | beq(AT, R0, ok); |
aoqi@1 | 2793 | delayed()->nop(); |
aoqi@1 | 2794 | |
aoqi@1 | 2795 | stop("assert(top <= end)"); |
aoqi@1 | 2796 | |
aoqi@1 | 2797 | bind(ok); |
aoqi@1 | 2798 | |
aoqi@1 | 2799 | /* |
aoqi@1 | 2800 | Label next, ok; |
aoqi@1 | 2801 | Register t1 = rsi; |
aoqi@1 | 2802 | Register thread_reg = NOT_LP64(rbx) LP64_ONLY(r15_thread); |
aoqi@1 | 2803 | |
aoqi@1 | 2804 | push(t1); |
aoqi@1 | 2805 | NOT_LP64(push(thread_reg)); |
aoqi@1 | 2806 | NOT_LP64(get_thread(thread_reg)); |
aoqi@1 | 2807 | |
aoqi@1 | 2808 | movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); |
aoqi@1 | 2809 | cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_start_offset()))); |
aoqi@1 | 2810 | jcc(Assembler::aboveEqual, next); |
aoqi@1 | 2811 | stop("assert(top >= start)"); |
aoqi@1 | 2812 | should_not_reach_here(); |
aoqi@1 | 2813 | |
aoqi@1 | 2814 | bind(next); |
aoqi@1 | 2815 | movptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_end_offset()))); |
aoqi@1 | 2816 | cmpptr(t1, Address(thread_reg, in_bytes(JavaThread::tlab_top_offset()))); |
aoqi@1 | 2817 | jcc(Assembler::aboveEqual, ok); |
aoqi@1 | 2818 | stop("assert(top <= end)"); |
aoqi@1 | 2819 | should_not_reach_here(); |
aoqi@1 | 2820 | |
aoqi@1 | 2821 | bind(ok); |
aoqi@1 | 2822 | NOT_LP64(pop(thread_reg)); |
aoqi@1 | 2823 | pop(t1); |
aoqi@1 | 2824 | */ |
aoqi@1 | 2825 | } |
aoqi@1 | 2826 | #endif |
aoqi@1 | 2827 | } |
aoqi@1 | 2828 | RegisterOrConstant MacroAssembler::delayed_value_impl(intptr_t* delayed_value_addr, |
aoqi@1 | 2829 | Register tmp, |
aoqi@1 | 2830 | int offset) { |
aoqi@1 | 2831 | intptr_t value = *delayed_value_addr; |
aoqi@1 | 2832 | if (value != 0) |
aoqi@1 | 2833 | return RegisterOrConstant(value + offset); |
aoqi@1 | 2834 | AddressLiteral a(delayed_value_addr); |
aoqi@1 | 2835 | // load indirectly to solve generation ordering problem |
aoqi@1 | 2836 | //movptr(tmp, ExternalAddress((address) delayed_value_addr)); |
aoqi@1 | 2837 | //ld(tmp, a); |
aoqi@1 | 2838 | /* #ifdef ASSERT |
aoqi@1 | 2839 | { Label L; |
aoqi@1 | 2840 | testptr(tmp, tmp); |
aoqi@1 | 2841 | if (WizardMode) { |
aoqi@1 | 2842 | jcc(Assembler::notZero, L); |
aoqi@1 | 2843 | char* buf = new char[40]; |
aoqi@1 | 2844 | sprintf(buf, "DelayedValue="INTPTR_FORMAT, delayed_value_addr[1]); |
aoqi@1 | 2845 | STOP(buf); |
aoqi@1 | 2846 | } else { |
aoqi@1 | 2847 | jccb(Assembler::notZero, L); |
aoqi@1 | 2848 | hlt(); |
aoqi@1 | 2849 | } |
aoqi@1 | 2850 | bind(L); |
aoqi@1 | 2851 | } |
aoqi@1 | 2852 | #endif*/ |
aoqi@1 | 2853 | if (offset != 0) |
aoqi@1 | 2854 | daddi(tmp,tmp, offset); |
aoqi@1 | 2855 | |
aoqi@1 | 2856 | return RegisterOrConstant(tmp); |
aoqi@1 | 2857 | } |
aoqi@1 | 2858 | |
aoqi@1 | 2859 | void MacroAssembler::hswap(Register reg) { |
aoqi@199 | 2860 | //short |
aoqi@1 | 2861 | //andi(reg, reg, 0xffff); |
aoqi@1 | 2862 | srl(AT, reg, 8); |
aoqi@1 | 2863 | sll(reg, reg, 24); |
aoqi@1 | 2864 | sra(reg, reg, 16); |
aoqi@1 | 2865 | orr(reg, reg, AT); |
aoqi@1 | 2866 | } |
aoqi@1 | 2867 | |
aoqi@1 | 2868 | void MacroAssembler::huswap(Register reg) { |
aoqi@1 | 2869 | #ifdef _LP64 |
aoqi@1 | 2870 | dsrl(AT, reg, 8); |
aoqi@1 | 2871 | dsll(reg, reg, 24); |
aoqi@1 | 2872 | dsrl(reg, reg, 16); |
aoqi@1 | 2873 | orr(reg, reg, AT); |
aoqi@1 | 2874 | andi(reg, reg, 0xffff); |
aoqi@1 | 2875 | #else |
aoqi@1 | 2876 | //andi(reg, reg, 0xffff); |
aoqi@1 | 2877 | srl(AT, reg, 8); |
aoqi@1 | 2878 | sll(reg, reg, 24); |
aoqi@1 | 2879 | srl(reg, reg, 16); |
aoqi@1 | 2880 | orr(reg, reg, AT); |
aoqi@1 | 2881 | #endif |
aoqi@1 | 2882 | } |
aoqi@1 | 2883 | |
aoqi@1 | 2884 | // something funny to do this will only one more register AT |
aoqi@199 | 2885 | // 32 bits |
aoqi@1 | 2886 | // by yjl 6/29/2005 |
aoqi@1 | 2887 | void MacroAssembler::swap(Register reg) { |
aoqi@1 | 2888 | srl(AT, reg, 8); |
aoqi@1 | 2889 | sll(reg, reg, 24); |
aoqi@1 | 2890 | orr(reg, reg, AT); |
aoqi@1 | 2891 | //reg : 4 1 2 3 |
aoqi@1 | 2892 | srl(AT, AT, 16); |
aoqi@1 | 2893 | xorr(AT, AT, reg); |
aoqi@1 | 2894 | andi(AT, AT, 0xff); |
aoqi@1 | 2895 | //AT : 0 0 0 1^3); |
aoqi@1 | 2896 | xorr(reg, reg, AT); |
aoqi@1 | 2897 | //reg : 4 1 2 1 |
aoqi@1 | 2898 | sll(AT, AT, 16); |
aoqi@1 | 2899 | xorr(reg, reg, AT); |
aoqi@1 | 2900 | //reg : 4 3 2 1 |
aoqi@1 | 2901 | } |
aoqi@1 | 2902 | |
aoqi@1 | 2903 | #ifdef _LP64 |
aoqi@1 | 2904 | |
aoqi@1 | 2905 | /* do 32-bit CAS using MIPS64 lld/scd |
aoqi@1 | 2906 | |
aoqi@1 | 2907 | Jin: cas_int should only compare 32-bits of the memory value. |
aoqi@1 | 2908 | However, lld/scd will do 64-bit operation, which violates the intention of cas_int. |
aoqi@1 | 2909 | To simulate a 32-bit atomic operation, the value loaded with LLD should be split into |
aoqi@1 | 2910 | tow halves, and only the low-32 bits is compared. If equals, the low-32 bits of newval, |
aoqi@1 | 2911 | plus the high-32 bits or memory value, are stored togethor with SCD. |
aoqi@1 | 2912 | |
aoqi@1 | 2913 | Example: |
aoqi@1 | 2914 | |
aoqi@1 | 2915 | double d = 3.1415926; |
aoqi@1 | 2916 | System.err.println("hello" + d); |
aoqi@1 | 2917 | |
aoqi@1 | 2918 | sun.misc.FloatingDecimal$1.<init>() |
aoqi@1 | 2919 | | |
aoqi@1 | 2920 | `- java.util.concurrent.atomic.AtomicInteger::compareAndSet() |
aoqi@1 | 2921 | |
aoqi@1 | 2922 | 38 cas_int [a7a7|J] [a0|I] [a6|I] |
aoqi@1 | 2923 | // a0: 0xffffffffe8ea9f63 pc: 0x55647f3354 |
aoqi@1 | 2924 | // a6: 0x4ab325aa |
aoqi@1 | 2925 | |
aoqi@1 | 2926 | again: |
aoqi@1 | 2927 | 0x00000055647f3c5c: lld at, 0x0(a7) ; 64-bit load, "0xe8ea9f63" |
aoqi@1 | 2928 | |
aoqi@1 | 2929 | 0x00000055647f3c60: sll t9, at, 0 ; t9: low-32 bits (sign extended) |
aoqi@1 | 2930 | 0x00000055647f3c64: dsrl32 t8, at, 0 ; t8: high-32 bits |
aoqi@1 | 2931 | 0x00000055647f3c68: dsll32 t8, t8, 0 |
aoqi@1 | 2932 | 0x00000055647f3c6c: bne t9, a0, 0x00000055647f3c9c ; goto nequal |
aoqi@1 | 2933 | 0x00000055647f3c70: sll zero, zero, 0 |
aoqi@1 | 2934 | |
aoqi@1 | 2935 | 0x00000055647f3c74: ori v1, zero, 0xffffffff ; v1: low-32 bits of newval (sign unextended) |
aoqi@1 | 2936 | 0x00000055647f3c78: dsll v1, v1, 16 ; v1 = a6 & 0xFFFFFFFF; |
aoqi@1 | 2937 | 0x00000055647f3c7c: ori v1, v1, 0xffffffff |
aoqi@1 | 2938 | 0x00000055647f3c80: and v1, a6, v1 |
aoqi@1 | 2939 | 0x00000055647f3c84: or at, t8, v1 |
aoqi@1 | 2940 | 0x00000055647f3c88: scd at, 0x0(a7) |
aoqi@1 | 2941 | 0x00000055647f3c8c: beq at, zero, 0x00000055647f3c5c ; goto again |
aoqi@1 | 2942 | 0x00000055647f3c90: sll zero, zero, 0 |
aoqi@1 | 2943 | 0x00000055647f3c94: beq zero, zero, 0x00000055647f45ac ; goto done |
aoqi@1 | 2944 | 0x00000055647f3c98: sll zero, zero, 0 |
aoqi@1 | 2945 | nequal: |
aoqi@1 | 2946 | 0x00000055647f45a4: dadd a0, t9, zero |
aoqi@1 | 2947 | 0x00000055647f45a8: dadd at, zero, zero |
aoqi@1 | 2948 | done: |
aoqi@1 | 2949 | */ |
aoqi@1 | 2950 | |
aoqi@1 | 2951 | void MacroAssembler::cmpxchg32(Register x_reg, Address dest, Register c_reg) { |
aoqi@1 | 2952 | #if 0 |
aoqi@1 | 2953 | Label done, again, nequal; |
aoqi@1 | 2954 | bind(again); |
aoqi@1 | 2955 | |
aoqi@1 | 2956 | sync(); |
aoqi@1 | 2957 | lld(AT, dest); |
aoqi@1 | 2958 | |
aoqi@1 | 2959 | /* T9: 32 bits, sign extended |
aoqi@1 | 2960 | * V1: low 32 bits, sign unextended |
aoqi@1 | 2961 | * T8: high 32 bits (may be another variables's space) |
aoqi@1 | 2962 | */ |
aoqi@1 | 2963 | sll(T9, AT, 0); // Use 32-bit sll to extend bit 31 |
aoqi@1 | 2964 | dsrl32(T8, AT, 0); |
aoqi@1 | 2965 | dsll32(T8, T8, 0); |
aoqi@1 | 2966 | |
aoqi@1 | 2967 | bne(T9, c_reg, nequal); |
aoqi@1 | 2968 | delayed()->nop(); |
aoqi@1 | 2969 | |
aoqi@1 | 2970 | ori(V1, R0, 0xFFFF); |
aoqi@1 | 2971 | dsll(V1, V1, 16); |
aoqi@1 | 2972 | ori(V1, V1, 0xFFFF); |
aoqi@1 | 2973 | andr(V1, x_reg, V1); |
aoqi@1 | 2974 | orr(AT, T8, V1); |
aoqi@1 | 2975 | scd(AT, dest); |
aoqi@1 | 2976 | beq(AT, R0, again); |
aoqi@1 | 2977 | delayed()->nop(); |
aoqi@1 | 2978 | b(done); |
aoqi@1 | 2979 | delayed()->nop(); |
aoqi@1 | 2980 | |
aoqi@1 | 2981 | // not xchged |
aoqi@1 | 2982 | bind(nequal); |
aoqi@1 | 2983 | move(c_reg, T9); |
aoqi@1 | 2984 | move(AT, R0); |
aoqi@1 | 2985 | |
aoqi@1 | 2986 | bind(done); |
aoqi@1 | 2987 | #else |
aoqi@1 | 2988 | |
aoqi@1 | 2989 | /* 2012/11/11 Jin: MIPS64 can use ll/sc for 32-bit atomic memory access */ |
aoqi@1 | 2990 | Label done, again, nequal; |
aoqi@1 | 2991 | |
aoqi@1 | 2992 | bind(again); |
aoqi@1 | 2993 | |
fujie@389 | 2994 | if(!Use3A2000) sync(); |
aoqi@1 | 2995 | ll(AT, dest); |
aoqi@1 | 2996 | bne(AT, c_reg, nequal); |
aoqi@1 | 2997 | delayed()->nop(); |
aoqi@1 | 2998 | |
aoqi@1 | 2999 | move(AT, x_reg); |
aoqi@1 | 3000 | sc(AT, dest); |
aoqi@1 | 3001 | beq(AT, R0, again); |
aoqi@1 | 3002 | delayed()->nop(); |
aoqi@1 | 3003 | b(done); |
aoqi@1 | 3004 | delayed()->nop(); |
aoqi@1 | 3005 | |
aoqi@1 | 3006 | // not xchged |
aoqi@1 | 3007 | bind(nequal); |
aoqi@1 | 3008 | sync(); |
aoqi@1 | 3009 | move(c_reg, AT); |
aoqi@1 | 3010 | move(AT, R0); |
aoqi@1 | 3011 | |
aoqi@1 | 3012 | bind(done); |
aoqi@1 | 3013 | #endif |
aoqi@1 | 3014 | } |
aoqi@1 | 3015 | #endif // cmpxchg32 |
aoqi@1 | 3016 | |
aoqi@1 | 3017 | void MacroAssembler::cmpxchg(Register x_reg, Address dest, Register c_reg) { |
aoqi@1 | 3018 | Label done, again, nequal; |
aoqi@1 | 3019 | |
aoqi@1 | 3020 | bind(again); |
aoqi@1 | 3021 | #ifdef _LP64 |
fujie@389 | 3022 | if(!Use3A2000) sync(); |
aoqi@1 | 3023 | lld(AT, dest); |
aoqi@1 | 3024 | #else |
fujie@389 | 3025 | if(!Use3A2000) sync(); |
aoqi@1 | 3026 | ll(AT, dest); |
aoqi@1 | 3027 | #endif |
aoqi@1 | 3028 | bne(AT, c_reg, nequal); |
aoqi@1 | 3029 | delayed()->nop(); |
aoqi@1 | 3030 | |
aoqi@1 | 3031 | move(AT, x_reg); |
aoqi@1 | 3032 | #ifdef _LP64 |
aoqi@1 | 3033 | scd(AT, dest); |
aoqi@1 | 3034 | #else |
aoqi@1 | 3035 | sc(AT, dest); |
aoqi@1 | 3036 | #endif |
aoqi@1 | 3037 | beq(AT, R0, again); |
aoqi@1 | 3038 | delayed()->nop(); |
aoqi@1 | 3039 | b(done); |
aoqi@1 | 3040 | delayed()->nop(); |
aoqi@1 | 3041 | |
aoqi@1 | 3042 | // not xchged |
aoqi@1 | 3043 | bind(nequal); |
aoqi@1 | 3044 | sync(); |
aoqi@1 | 3045 | move(c_reg, AT); |
aoqi@1 | 3046 | move(AT, R0); |
aoqi@1 | 3047 | |
aoqi@1 | 3048 | bind(done); |
aoqi@1 | 3049 | } |
aoqi@1 | 3050 | |
aoqi@1 | 3051 | void MacroAssembler::cmpxchg8(Register x_regLo, Register x_regHi, Address dest, Register c_regLo, Register c_regHi) { |
aoqi@1 | 3052 | Label done, again, nequal; |
aoqi@1 | 3053 | |
aoqi@1 | 3054 | Register x_reg = x_regLo; |
aoqi@1 | 3055 | dsll32(x_regHi, x_regHi, 0); |
aoqi@1 | 3056 | dsll32(x_regLo, x_regLo, 0); |
aoqi@1 | 3057 | dsrl32(x_regLo, x_regLo, 0); |
aoqi@1 | 3058 | orr(x_reg, x_regLo, x_regHi); |
aoqi@1 | 3059 | |
aoqi@1 | 3060 | Register c_reg = c_regLo; |
aoqi@1 | 3061 | dsll32(c_regHi, c_regHi, 0); |
aoqi@1 | 3062 | dsll32(c_regLo, c_regLo, 0); |
aoqi@1 | 3063 | dsrl32(c_regLo, c_regLo, 0); |
aoqi@1 | 3064 | orr(c_reg, c_regLo, c_regHi); |
aoqi@1 | 3065 | |
aoqi@1 | 3066 | bind(again); |
aoqi@1 | 3067 | |
fujie@389 | 3068 | if(!Use3A2000) sync(); |
aoqi@1 | 3069 | lld(AT, dest); |
aoqi@1 | 3070 | bne(AT, c_reg, nequal); |
aoqi@1 | 3071 | delayed()->nop(); |
aoqi@1 | 3072 | |
aoqi@1 | 3073 | //move(AT, x_reg); |
aoqi@1 | 3074 | dadd(AT, x_reg, R0); |
aoqi@1 | 3075 | scd(AT, dest); |
aoqi@1 | 3076 | beq(AT, R0, again); |
aoqi@1 | 3077 | delayed()->nop(); |
aoqi@1 | 3078 | b(done); |
aoqi@1 | 3079 | delayed()->nop(); |
aoqi@1 | 3080 | |
aoqi@1 | 3081 | // not xchged |
aoqi@1 | 3082 | bind(nequal); |
aoqi@1 | 3083 | sync(); |
aoqi@1 | 3084 | //move(c_reg, AT); |
aoqi@1 | 3085 | //move(AT, R0); |
aoqi@1 | 3086 | dadd(c_reg, AT, R0); |
aoqi@1 | 3087 | dadd(AT, R0, R0); |
aoqi@1 | 3088 | bind(done); |
aoqi@1 | 3089 | } |
aoqi@1 | 3090 | |
aoqi@1 | 3091 | // be sure the three register is different |
aoqi@1 | 3092 | void MacroAssembler::rem_s(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp) { |
aoqi@1 | 3093 | assert_different_registers(tmp, fs, ft); |
aoqi@1 | 3094 | div_s(tmp, fs, ft); |
aoqi@1 | 3095 | trunc_l_s(tmp, tmp); |
aoqi@1 | 3096 | cvt_s_l(tmp, tmp); |
aoqi@1 | 3097 | mul_s(tmp, tmp, ft); |
aoqi@1 | 3098 | sub_s(fd, fs, tmp); |
aoqi@1 | 3099 | } |
aoqi@1 | 3100 | |
aoqi@1 | 3101 | // be sure the three register is different |
aoqi@1 | 3102 | void MacroAssembler::rem_d(FloatRegister fd, FloatRegister fs, FloatRegister ft, FloatRegister tmp) { |
aoqi@1 | 3103 | assert_different_registers(tmp, fs, ft); |
aoqi@1 | 3104 | div_d(tmp, fs, ft); |
aoqi@1 | 3105 | trunc_l_d(tmp, tmp); |
aoqi@1 | 3106 | cvt_d_l(tmp, tmp); |
aoqi@1 | 3107 | mul_d(tmp, tmp, ft); |
aoqi@1 | 3108 | sub_d(fd, fs, tmp); |
aoqi@1 | 3109 | } |
aoqi@1 | 3110 | |
aoqi@30 | 3111 | // Fast_Lock and Fast_Unlock used by C2 |
aoqi@30 | 3112 | |
aoqi@30 | 3113 | // Because the transitions from emitted code to the runtime |
aoqi@30 | 3114 | // monitorenter/exit helper stubs are so slow it's critical that |
aoqi@30 | 3115 | // we inline both the stack-locking fast-path and the inflated fast path. |
aoqi@30 | 3116 | // |
aoqi@30 | 3117 | // See also: cmpFastLock and cmpFastUnlock. |
aoqi@30 | 3118 | // |
aoqi@30 | 3119 | // What follows is a specialized inline transliteration of the code |
aoqi@30 | 3120 | // in slow_enter() and slow_exit(). If we're concerned about I$ bloat |
aoqi@30 | 3121 | // another option would be to emit TrySlowEnter and TrySlowExit methods |
aoqi@30 | 3122 | // at startup-time. These methods would accept arguments as |
aoqi@30 | 3123 | // (rax,=Obj, rbx=Self, rcx=box, rdx=Scratch) and return success-failure |
aoqi@30 | 3124 | // indications in the icc.ZFlag. Fast_Lock and Fast_Unlock would simply |
aoqi@30 | 3125 | // marshal the arguments and emit calls to TrySlowEnter and TrySlowExit. |
aoqi@30 | 3126 | // In practice, however, the # of lock sites is bounded and is usually small. |
aoqi@30 | 3127 | // Besides the call overhead, TrySlowEnter and TrySlowExit might suffer |
aoqi@30 | 3128 | // if the processor uses simple bimodal branch predictors keyed by EIP |
aoqi@30 | 3129 | // Since the helper routines would be called from multiple synchronization |
aoqi@30 | 3130 | // sites. |
aoqi@30 | 3131 | // |
aoqi@30 | 3132 | // An even better approach would be write "MonitorEnter()" and "MonitorExit()" |
aoqi@30 | 3133 | // in java - using j.u.c and unsafe - and just bind the lock and unlock sites |
aoqi@30 | 3134 | // to those specialized methods. That'd give us a mostly platform-independent |
aoqi@30 | 3135 | // implementation that the JITs could optimize and inline at their pleasure. |
aoqi@30 | 3136 | // Done correctly, the only time we'd need to cross to native could would be |
aoqi@30 | 3137 | // to park() or unpark() threads. We'd also need a few more unsafe operators |
aoqi@30 | 3138 | // to (a) prevent compiler-JIT reordering of non-volatile accesses, and |
aoqi@30 | 3139 | // (b) explicit barriers or fence operations. |
aoqi@30 | 3140 | // |
aoqi@30 | 3141 | // TODO: |
aoqi@30 | 3142 | // |
aoqi@30 | 3143 | // * Arrange for C2 to pass "Self" into Fast_Lock and Fast_Unlock in one of the registers (scr). |
aoqi@30 | 3144 | // This avoids manifesting the Self pointer in the Fast_Lock and Fast_Unlock terminals. |
aoqi@30 | 3145 | // Given TLAB allocation, Self is usually manifested in a register, so passing it into |
aoqi@30 | 3146 | // the lock operators would typically be faster than reifying Self. |
aoqi@30 | 3147 | // |
aoqi@30 | 3148 | // * Ideally I'd define the primitives as: |
aoqi@30 | 3149 | // fast_lock (nax Obj, nax box, EAX tmp, nax scr) where box, tmp and scr are KILLED. |
aoqi@30 | 3150 | // fast_unlock (nax Obj, EAX box, nax tmp) where box and tmp are KILLED |
aoqi@30 | 3151 | // Unfortunately ADLC bugs prevent us from expressing the ideal form. |
aoqi@30 | 3152 | // Instead, we're stuck with a rather awkward and brittle register assignments below. |
aoqi@30 | 3153 | // Furthermore the register assignments are overconstrained, possibly resulting in |
aoqi@30 | 3154 | // sub-optimal code near the synchronization site. |
aoqi@30 | 3155 | // |
aoqi@30 | 3156 | // * Eliminate the sp-proximity tests and just use "== Self" tests instead. |
aoqi@30 | 3157 | // Alternately, use a better sp-proximity test. |
aoqi@30 | 3158 | // |
aoqi@30 | 3159 | // * Currently ObjectMonitor._Owner can hold either an sp value or a (THREAD *) value. |
aoqi@30 | 3160 | // Either one is sufficient to uniquely identify a thread. |
aoqi@30 | 3161 | // TODO: eliminate use of sp in _owner and use get_thread(tr) instead. |
aoqi@30 | 3162 | // |
aoqi@30 | 3163 | // * Intrinsify notify() and notifyAll() for the common cases where the |
aoqi@30 | 3164 | // object is locked by the calling thread but the waitlist is empty. |
aoqi@30 | 3165 | // avoid the expensive JNI call to JVM_Notify() and JVM_NotifyAll(). |
aoqi@30 | 3166 | // |
aoqi@30 | 3167 | // * use jccb and jmpb instead of jcc and jmp to improve code density. |
aoqi@30 | 3168 | // But beware of excessive branch density on AMD Opterons. |
aoqi@30 | 3169 | // |
aoqi@30 | 3170 | // * Both Fast_Lock and Fast_Unlock set the ICC.ZF to indicate success |
aoqi@30 | 3171 | // or failure of the fast-path. If the fast-path fails then we pass |
aoqi@30 | 3172 | // control to the slow-path, typically in C. In Fast_Lock and |
aoqi@30 | 3173 | // Fast_Unlock we often branch to DONE_LABEL, just to find that C2 |
aoqi@30 | 3174 | // will emit a conditional branch immediately after the node. |
aoqi@30 | 3175 | // So we have branches to branches and lots of ICC.ZF games. |
aoqi@30 | 3176 | // Instead, it might be better to have C2 pass a "FailureLabel" |
aoqi@30 | 3177 | // into Fast_Lock and Fast_Unlock. In the case of success, control |
aoqi@30 | 3178 | // will drop through the node. ICC.ZF is undefined at exit. |
aoqi@30 | 3179 | // In the case of failure, the node will branch directly to the |
aoqi@30 | 3180 | // FailureLabel |
aoqi@30 | 3181 | |
aoqi@30 | 3182 | |
aoqi@30 | 3183 | // obj: object to lock |
aoqi@30 | 3184 | // box: on-stack box address (displaced header location) - KILLED |
aoqi@30 | 3185 | // rax,: tmp -- KILLED |
aoqi@30 | 3186 | // scr: tmp -- KILLED |
aoqi@30 | 3187 | void MacroAssembler::fast_lock(Register objReg, Register boxReg, Register tmpReg, Register scrReg) { |
aoqi@30 | 3188 | |
aoqi@30 | 3189 | // Ensure the register assignents are disjoint |
aoqi@30 | 3190 | guarantee (objReg != boxReg, "") ; |
aoqi@30 | 3191 | guarantee (objReg != tmpReg, "") ; |
aoqi@30 | 3192 | guarantee (objReg != scrReg, "") ; |
aoqi@30 | 3193 | guarantee (boxReg != tmpReg, "") ; |
aoqi@30 | 3194 | guarantee (boxReg != scrReg, "") ; |
aoqi@30 | 3195 | |
aoqi@30 | 3196 | |
aoqi@30 | 3197 | block_comment("FastLock"); |
aoqi@30 | 3198 | /* |
aoqi@138 | 3199 | move(AT, 0x0); |
aoqi@30 | 3200 | return; |
aoqi@30 | 3201 | */ |
aoqi@30 | 3202 | if (PrintBiasedLockingStatistics) { |
aoqi@30 | 3203 | push(tmpReg); |
aoqi@30 | 3204 | atomic_inc32((address)BiasedLocking::total_entry_count_addr(), 1, AT, tmpReg); |
aoqi@30 | 3205 | pop(tmpReg); |
aoqi@30 | 3206 | } |
aoqi@30 | 3207 | |
aoqi@30 | 3208 | if (EmitSync & 1) { |
aoqi@30 | 3209 | // set box->dhw = unused_mark (3) |
aoqi@30 | 3210 | // Force all sync thru slow-path: slow_enter() and slow_exit() |
aoqi@30 | 3211 | move (AT, (int32_t)intptr_t(markOopDesc::unused_mark())); |
aoqi@30 | 3212 | sd(AT, Address(boxReg, 0)); |
aoqi@30 | 3213 | move (AT, (int32_t)0) ; // Eflags.ZF = 0 |
aoqi@30 | 3214 | } else |
aoqi@30 | 3215 | if (EmitSync & 2) { |
aoqi@30 | 3216 | Label DONE_LABEL ; |
aoqi@30 | 3217 | if (UseBiasedLocking) { |
aoqi@30 | 3218 | // Note: tmpReg maps to the swap_reg argument and scrReg to the tmp_reg argument. |
aoqi@30 | 3219 | biased_locking_enter(boxReg, objReg, tmpReg, scrReg, false, DONE_LABEL, NULL); |
aoqi@30 | 3220 | } |
aoqi@30 | 3221 | |
aoqi@30 | 3222 | ld(tmpReg, Address(objReg, 0)) ; // fetch markword |
aoqi@30 | 3223 | ori(tmpReg, tmpReg, 0x1); |
aoqi@30 | 3224 | sd(tmpReg, Address(boxReg, 0)); // Anticipate successful CAS |
aoqi@30 | 3225 | |
aoqi@30 | 3226 | cmpxchg(boxReg, Address(objReg, 0), tmpReg); // Updates tmpReg |
aoqi@30 | 3227 | bne(AT, R0, DONE_LABEL); |
aoqi@30 | 3228 | delayed()->nop(); |
aoqi@30 | 3229 | |
aoqi@30 | 3230 | // Recursive locking |
aoqi@30 | 3231 | dsubu(tmpReg, tmpReg, SP); |
aoqi@30 | 3232 | li(AT, (7 - os::vm_page_size() )); |
aoqi@30 | 3233 | andr(tmpReg, tmpReg, AT); |
aoqi@30 | 3234 | sd(tmpReg, Address(boxReg, 0)); |
aoqi@30 | 3235 | bind(DONE_LABEL) ; |
aoqi@30 | 3236 | } else { |
aoqi@30 | 3237 | // Possible cases that we'll encounter in fast_lock |
aoqi@30 | 3238 | // ------------------------------------------------ |
aoqi@30 | 3239 | // * Inflated |
aoqi@30 | 3240 | // -- unlocked |
aoqi@30 | 3241 | // -- Locked |
aoqi@30 | 3242 | // = by self |
aoqi@30 | 3243 | // = by other |
aoqi@30 | 3244 | // * biased |
aoqi@30 | 3245 | // -- by Self |
aoqi@30 | 3246 | // -- by other |
aoqi@30 | 3247 | // * neutral |
aoqi@30 | 3248 | // * stack-locked |
aoqi@30 | 3249 | // -- by self |
aoqi@30 | 3250 | // = sp-proximity test hits |
aoqi@30 | 3251 | // = sp-proximity test generates false-negative |
aoqi@30 | 3252 | // -- by other |
aoqi@30 | 3253 | // |
aoqi@30 | 3254 | |
aoqi@30 | 3255 | Label IsInflated, DONE_LABEL, PopDone ; |
aoqi@30 | 3256 | |
aoqi@30 | 3257 | // TODO: optimize away redundant LDs of obj->mark and improve the markword triage |
aoqi@30 | 3258 | // order to reduce the number of conditional branches in the most common cases. |
aoqi@30 | 3259 | // Beware -- there's a subtle invariant that fetch of the markword |
aoqi@30 | 3260 | // at [FETCH], below, will never observe a biased encoding (*101b). |
aoqi@30 | 3261 | // If this invariant is not held we risk exclusion (safety) failure. |
aoqi@30 | 3262 | if (UseBiasedLocking && !UseOptoBiasInlining) { |
aoqi@30 | 3263 | biased_locking_enter(boxReg, objReg, tmpReg, scrReg, false, DONE_LABEL, NULL); |
aoqi@30 | 3264 | } |
aoqi@30 | 3265 | |
aoqi@30 | 3266 | ld(tmpReg, Address(objReg, 0)) ; //Fetch the markword of the object. |
aoqi@138 | 3267 | andi(AT, tmpReg, markOopDesc::monitor_value); |
aoqi@138 | 3268 | bne(AT, R0, IsInflated); // inflated vs stack-locked|neutral|bias |
aoqi@30 | 3269 | delayed()->nop(); |
aoqi@30 | 3270 | |
aoqi@30 | 3271 | // Attempt stack-locking ... |
aoqi@138 | 3272 | ori (tmpReg, tmpReg, markOopDesc::unlocked_value); |
aoqi@30 | 3273 | sd(tmpReg, Address(boxReg, 0)); // Anticipate successful CAS |
aoqi@30 | 3274 | |
aoqi@30 | 3275 | cmpxchg(boxReg, Address(objReg, 0), tmpReg); // Updates tmpReg |
aoqi@30 | 3276 | |
aoqi@30 | 3277 | if (PrintBiasedLockingStatistics) { |
aoqi@30 | 3278 | Label L; |
aoqi@30 | 3279 | beq(AT, R0, L); |
aoqi@30 | 3280 | delayed()->nop(); |
aoqi@30 | 3281 | push(T0); |
aoqi@30 | 3282 | push(T1); |
aoqi@30 | 3283 | atomic_inc32((address)BiasedLocking::fast_path_entry_count_addr(), 1, T0, T1); |
aoqi@30 | 3284 | pop(T1); |
aoqi@30 | 3285 | pop(T0); |
aoqi@30 | 3286 | bind(L); |
aoqi@30 | 3287 | } |
aoqi@30 | 3288 | bne(AT, R0, DONE_LABEL); |
aoqi@30 | 3289 | delayed()->nop(); |
aoqi@30 | 3290 | |
aoqi@30 | 3291 | // Recursive locking |
aoqi@138 | 3292 | // The object is stack-locked: markword contains stack pointer to BasicLock. |
aoqi@138 | 3293 | // Locked by current thread if difference with current SP is less than one page. |
aoqi@30 | 3294 | dsubu(tmpReg, tmpReg, SP); |
aoqi@30 | 3295 | li(AT, 7 - os::vm_page_size() ); |
aoqi@30 | 3296 | andr(tmpReg, tmpReg, AT); |
aoqi@30 | 3297 | sd(tmpReg, Address(boxReg, 0)); |
aoqi@30 | 3298 | if (PrintBiasedLockingStatistics) { |
aoqi@30 | 3299 | Label L; |
aoqi@30 | 3300 | // tmpReg == 0 => BiasedLocking::_fast_path_entry_count++ |
aoqi@30 | 3301 | bne(tmpReg, R0, L); |
aoqi@30 | 3302 | delayed()->nop(); |
aoqi@30 | 3303 | push(T0); |
aoqi@30 | 3304 | push(T1); |
aoqi@30 | 3305 | atomic_inc32((address)BiasedLocking::fast_path_entry_count_addr(), 1, T0, T1); |
aoqi@30 | 3306 | pop(T1); |
aoqi@30 | 3307 | pop(T0); |
aoqi@30 | 3308 | bind(L); |
aoqi@30 | 3309 | } |
aoqi@30 | 3310 | sltiu(AT, tmpReg, 1); /* AT = (tmpReg == 0) ? 1 : 0 */ |
aoqi@30 | 3311 | |
aoqi@30 | 3312 | b(DONE_LABEL) ; |
aoqi@30 | 3313 | delayed()->nop(); |
aoqi@30 | 3314 | |
aoqi@30 | 3315 | bind(IsInflated) ; |
aoqi@30 | 3316 | |
aoqi@30 | 3317 | // TODO: someday avoid the ST-before-CAS penalty by |
aoqi@30 | 3318 | // relocating (deferring) the following ST. |
aoqi@30 | 3319 | // We should also think about trying a CAS without having |
aoqi@30 | 3320 | // fetched _owner. If the CAS is successful we may |
aoqi@30 | 3321 | // avoid an RTO->RTS upgrade on the $line. |
aoqi@30 | 3322 | // Without cast to int32_t a movptr will destroy r10 which is typically obj |
aoqi@30 | 3323 | li(AT, (int32_t)intptr_t(markOopDesc::unused_mark())); |
aoqi@30 | 3324 | sd(AT, Address(boxReg, 0)); |
aoqi@30 | 3325 | |
aoqi@30 | 3326 | move(boxReg, tmpReg) ; |
aoqi@30 | 3327 | ld(tmpReg, Address(tmpReg, ObjectMonitor::owner_offset_in_bytes()-2)) ; |
aoqi@138 | 3328 | // AT = (tmpReg == 0) ? 1:0 |
aoqi@30 | 3329 | sltiu(AT, tmpReg, 1); /* Jin: AT = !tmpReg; */ |
aoqi@30 | 3330 | bne(tmpReg, R0, DONE_LABEL); |
aoqi@30 | 3331 | delayed()->nop(); |
aoqi@30 | 3332 | |
aoqi@138 | 3333 | // It's inflated and appears unlocke |
aoqi@138 | 3334 | if (os::is_MP()) { |
aoqi@138 | 3335 | //lock(); |
aoqi@138 | 3336 | } |
aoqi@30 | 3337 | cmpxchg(TREG, Address(boxReg, ObjectMonitor::owner_offset_in_bytes()-2), tmpReg) ; |
aoqi@30 | 3338 | // Intentional fall-through into DONE_LABEL ... |
aoqi@30 | 3339 | |
aoqi@30 | 3340 | |
aoqi@30 | 3341 | // DONE_LABEL is a hot target - we'd really like to place it at the |
aoqi@30 | 3342 | // start of cache line by padding with NOPs. |
aoqi@30 | 3343 | // See the AMD and Intel software optimization manuals for the |
aoqi@30 | 3344 | // most efficient "long" NOP encodings. |
aoqi@30 | 3345 | // Unfortunately none of our alignment mechanisms suffice. |
aoqi@30 | 3346 | bind(DONE_LABEL); |
aoqi@30 | 3347 | |
aoqi@30 | 3348 | // Avoid branch-to-branch on AMD processors |
aoqi@30 | 3349 | // This appears to be superstition. |
aoqi@30 | 3350 | if (EmitSync & 32) nop() ; |
aoqi@30 | 3351 | |
aoqi@30 | 3352 | |
aoqi@30 | 3353 | // At DONE_LABEL the icc ZFlag is set as follows ... |
aoqi@30 | 3354 | // Fast_Unlock uses the same protocol. |
aoqi@30 | 3355 | // ZFlag == 1 -> Success |
aoqi@30 | 3356 | // ZFlag == 0 -> Failure - force control through the slow-path |
aoqi@30 | 3357 | } |
aoqi@30 | 3358 | } |
aoqi@30 | 3359 | |
aoqi@30 | 3360 | // obj: object to unlock |
aoqi@30 | 3361 | // box: box address (displaced header location), killed. Must be EAX. |
aoqi@30 | 3362 | // rbx,: killed tmp; cannot be obj nor box. |
aoqi@30 | 3363 | // |
aoqi@30 | 3364 | // Some commentary on balanced locking: |
aoqi@30 | 3365 | // |
aoqi@30 | 3366 | // Fast_Lock and Fast_Unlock are emitted only for provably balanced lock sites. |
aoqi@30 | 3367 | // Methods that don't have provably balanced locking are forced to run in the |
aoqi@30 | 3368 | // interpreter - such methods won't be compiled to use fast_lock and fast_unlock. |
aoqi@30 | 3369 | // The interpreter provides two properties: |
aoqi@30 | 3370 | // I1: At return-time the interpreter automatically and quietly unlocks any |
aoqi@30 | 3371 | // objects acquired the current activation (frame). Recall that the |
aoqi@30 | 3372 | // interpreter maintains an on-stack list of locks currently held by |
aoqi@30 | 3373 | // a frame. |
aoqi@30 | 3374 | // I2: If a method attempts to unlock an object that is not held by the |
aoqi@30 | 3375 | // the frame the interpreter throws IMSX. |
aoqi@30 | 3376 | // |
aoqi@30 | 3377 | // Lets say A(), which has provably balanced locking, acquires O and then calls B(). |
aoqi@30 | 3378 | // B() doesn't have provably balanced locking so it runs in the interpreter. |
aoqi@30 | 3379 | // Control returns to A() and A() unlocks O. By I1 and I2, above, we know that O |
aoqi@30 | 3380 | // is still locked by A(). |
aoqi@30 | 3381 | // |
aoqi@30 | 3382 | // The only other source of unbalanced locking would be JNI. The "Java Native Interface: |
aoqi@30 | 3383 | // Programmer's Guide and Specification" claims that an object locked by jni_monitorenter |
aoqi@30 | 3384 | // should not be unlocked by "normal" java-level locking and vice-versa. The specification |
aoqi@30 | 3385 | // doesn't specify what will occur if a program engages in such mixed-mode locking, however. |
aoqi@30 | 3386 | |
aoqi@30 | 3387 | void MacroAssembler::fast_unlock(Register objReg, Register boxReg, Register tmpReg) { |
aoqi@30 | 3388 | |
aoqi@30 | 3389 | guarantee (objReg != boxReg, "") ; |
aoqi@30 | 3390 | guarantee (objReg != tmpReg, "") ; |
aoqi@30 | 3391 | guarantee (boxReg != tmpReg, "") ; |
aoqi@30 | 3392 | |
aoqi@30 | 3393 | |
aoqi@30 | 3394 | |
aoqi@30 | 3395 | block_comment("FastUnlock"); |
aoqi@30 | 3396 | |
aoqi@30 | 3397 | /* |
aoqi@30 | 3398 | move(AT, 0x0); |
aoqi@30 | 3399 | return; |
aoqi@30 | 3400 | */ |
aoqi@30 | 3401 | |
aoqi@30 | 3402 | if (EmitSync & 4) { |
aoqi@30 | 3403 | // Disable - inhibit all inlining. Force control through the slow-path |
aoqi@30 | 3404 | move(AT, R0); |
aoqi@30 | 3405 | } else |
aoqi@30 | 3406 | if (EmitSync & 8) { |
aoqi@30 | 3407 | Label DONE_LABEL ; |
aoqi@30 | 3408 | if (UseBiasedLocking) { |
aoqi@30 | 3409 | biased_locking_exit(objReg, tmpReg, DONE_LABEL); |
aoqi@30 | 3410 | } |
aoqi@30 | 3411 | // classic stack-locking code ... |
aoqi@30 | 3412 | ld(tmpReg, Address(boxReg, 0)) ; |
aoqi@30 | 3413 | beq(tmpReg, R0, DONE_LABEL) ; |
aoqi@30 | 3414 | move(AT, 0x1); // delay slot |
aoqi@30 | 3415 | |
aoqi@30 | 3416 | cmpxchg(tmpReg, Address(objReg, 0), boxReg); // Uses EAX which is box |
aoqi@30 | 3417 | bind(DONE_LABEL); |
aoqi@30 | 3418 | } else { |
aoqi@30 | 3419 | Label DONE_LABEL, Stacked, CheckSucc, Inflated ; |
aoqi@30 | 3420 | |
aoqi@30 | 3421 | // Critically, the biased locking test must have precedence over |
aoqi@30 | 3422 | // and appear before the (box->dhw == 0) recursive stack-lock test. |
aoqi@30 | 3423 | if (UseBiasedLocking && !UseOptoBiasInlining) { |
aoqi@30 | 3424 | biased_locking_exit(objReg, tmpReg, DONE_LABEL); |
aoqi@30 | 3425 | } |
aoqi@30 | 3426 | |
aoqi@30 | 3427 | ld(AT, Address(boxReg, 0)) ; // Examine the displaced header |
aoqi@30 | 3428 | beq(AT, R0, DONE_LABEL) ; // 0 indicates recursive stack-lock |
aoqi@30 | 3429 | delayed()->daddiu(AT, R0, 0x1); |
aoqi@30 | 3430 | |
aoqi@137 | 3431 | ld(tmpReg, Address(objReg, 0)) ; // Examine the object's markword |
aoqi@30 | 3432 | andi(AT, tmpReg, markOopDesc::monitor_value) ; // Inflated? |
aoqi@30 | 3433 | beq(AT, R0, Stacked) ; // Inflated? |
aoqi@30 | 3434 | delayed()->nop(); |
aoqi@30 | 3435 | |
aoqi@30 | 3436 | bind(Inflated) ; |
aoqi@30 | 3437 | // It's inflated. |
aoqi@30 | 3438 | // Despite our balanced locking property we still check that m->_owner == Self |
aoqi@30 | 3439 | // as java routines or native JNI code called by this thread might |
aoqi@30 | 3440 | // have released the lock. |
aoqi@30 | 3441 | // Refer to the comments in synchronizer.cpp for how we might encode extra |
aoqi@30 | 3442 | // state in _succ so we can avoid fetching EntryList|cxq. |
aoqi@30 | 3443 | // |
aoqi@30 | 3444 | // I'd like to add more cases in fast_lock() and fast_unlock() -- |
aoqi@30 | 3445 | // such as recursive enter and exit -- but we have to be wary of |
aoqi@30 | 3446 | // I$ bloat, T$ effects and BP$ effects. |
aoqi@30 | 3447 | // |
aoqi@30 | 3448 | // If there's no contention try a 1-0 exit. That is, exit without |
aoqi@30 | 3449 | // a costly MEMBAR or CAS. See synchronizer.cpp for details on how |
aoqi@30 | 3450 | // we detect and recover from the race that the 1-0 exit admits. |
aoqi@30 | 3451 | // |
aoqi@30 | 3452 | // Conceptually Fast_Unlock() must execute a STST|LDST "release" barrier |
aoqi@30 | 3453 | // before it STs null into _owner, releasing the lock. Updates |
aoqi@30 | 3454 | // to data protected by the critical section must be visible before |
aoqi@30 | 3455 | // we drop the lock (and thus before any other thread could acquire |
aoqi@30 | 3456 | // the lock and observe the fields protected by the lock). |
aoqi@30 | 3457 | // IA32's memory-model is SPO, so STs are ordered with respect to |
aoqi@30 | 3458 | // each other and there's no need for an explicit barrier (fence). |
aoqi@30 | 3459 | // See also http://gee.cs.oswego.edu/dl/jmm/cookbook.html. |
aoqi@137 | 3460 | #ifndef OPT_THREAD |
aoqi@137 | 3461 | get_thread (TREG) ; |
aoqi@30 | 3462 | #endif |
aoqi@30 | 3463 | |
aoqi@30 | 3464 | // It's inflated |
aoqi@137 | 3465 | ld(boxReg, Address (tmpReg, ObjectMonitor::owner_offset_in_bytes()-2)) ; |
aoqi@137 | 3466 | xorr(boxReg, boxReg, TREG); |
aoqi@30 | 3467 | |
aoqi@30 | 3468 | ld(AT, Address (tmpReg, ObjectMonitor::recursions_offset_in_bytes()-2)) ; |
aoqi@30 | 3469 | orr(boxReg, boxReg, AT); |
aoqi@30 | 3470 | |
aoqi@30 | 3471 | move(AT, R0); |
aoqi@30 | 3472 | bne(boxReg, R0, DONE_LABEL); |
aoqi@30 | 3473 | delayed()->nop(); |
aoqi@30 | 3474 | |
aoqi@137 | 3475 | ld(boxReg, Address (tmpReg, ObjectMonitor::cxq_offset_in_bytes()-2)) ; |
aoqi@137 | 3476 | ld(AT, Address (tmpReg, ObjectMonitor::EntryList_offset_in_bytes()-2)) ; |
aoqi@30 | 3477 | orr(boxReg, boxReg, AT); |
aoqi@30 | 3478 | |
aoqi@30 | 3479 | move(AT, R0); |
aoqi@30 | 3480 | bne(boxReg, R0, CheckSucc); |
aoqi@30 | 3481 | delayed()->nop(); |
aoqi@30 | 3482 | |
fujie@264 | 3483 | sync(); |
aoqi@30 | 3484 | sd(R0, Address (tmpReg, ObjectMonitor::owner_offset_in_bytes()-2)) ; |
aoqi@30 | 3485 | move(AT, 0x1); |
aoqi@30 | 3486 | b(DONE_LABEL); |
aoqi@30 | 3487 | delayed()->nop(); |
aoqi@30 | 3488 | |
aoqi@30 | 3489 | |
aoqi@30 | 3490 | if ((EmitSync & 65536) == 0) { |
aoqi@30 | 3491 | Label LSuccess, LGoSlowPath ; |
aoqi@30 | 3492 | bind (CheckSucc); |
aoqi@30 | 3493 | ld(AT, Address (tmpReg, ObjectMonitor::succ_offset_in_bytes()-2)) ; |
aoqi@30 | 3494 | beq(AT, R0, LGoSlowPath); |
aoqi@30 | 3495 | delayed()->nop(); |
aoqi@30 | 3496 | |
aoqi@30 | 3497 | // I'd much rather use lock:andl m->_owner, 0 as it's faster than the |
aoqi@30 | 3498 | // the explicit ST;MEMBAR combination, but masm doesn't currently support |
aoqi@30 | 3499 | // "ANDQ M,IMM". Don't use MFENCE here. lock:add to TOS, xchg, etc |
aoqi@30 | 3500 | // are all faster when the write buffer is populated. |
jiangshaofeng@176 | 3501 | xorr(boxReg, boxReg, boxReg); |
aoqi@30 | 3502 | sd(R0, Address (tmpReg, ObjectMonitor::owner_offset_in_bytes()-2)) ; |
aoqi@30 | 3503 | if (os::is_MP()) { |
aoqi@137 | 3504 | // lock (); |
aoqi@30 | 3505 | } |
aoqi@30 | 3506 | ld(AT, Address (tmpReg, ObjectMonitor::succ_offset_in_bytes()-2)) ; |
aoqi@30 | 3507 | bne(AT, R0, LSuccess); |
aoqi@30 | 3508 | delayed()->nop(); |
aoqi@30 | 3509 | |
aoqi@137 | 3510 | #ifndef OPT_THREAD |
aoqi@137 | 3511 | get_thread (TREG) ; |
aoqi@137 | 3512 | #endif |
aoqi@30 | 3513 | move(boxReg, R0) ; // box is really EAX |
aoqi@30 | 3514 | //if (os::is_MP()) { lock(); } |
aoqi@137 | 3515 | cmpxchg(TREG, Address(tmpReg, ObjectMonitor::owner_offset_in_bytes()-2), boxReg); |
aoqi@30 | 3516 | beq(AT, R0, LSuccess); |
aoqi@30 | 3517 | delayed()->nop(); |
aoqi@30 | 3518 | // Intentional fall-through into slow-path |
aoqi@30 | 3519 | |
aoqi@30 | 3520 | bind (LGoSlowPath); |
aoqi@30 | 3521 | move(AT, R0); |
aoqi@30 | 3522 | b(DONE_LABEL) ; |
aoqi@30 | 3523 | delayed()->nop(); |
aoqi@30 | 3524 | |
aoqi@30 | 3525 | |
aoqi@30 | 3526 | bind (LSuccess); |
aoqi@137 | 3527 | move(AT, 0); |
aoqi@137 | 3528 | sltiu(AT, boxReg, 1) ; // set ICC.ZF=1 to indicate success |
aoqi@30 | 3529 | b(DONE_LABEL) ; |
aoqi@30 | 3530 | delayed()->nop(); |
aoqi@30 | 3531 | } |
aoqi@30 | 3532 | |
aoqi@30 | 3533 | bind (Stacked); |
aoqi@30 | 3534 | ld(tmpReg, Address(boxReg, 0)) ; |
aoqi@30 | 3535 | //if (os::is_MP()) { lock(); } |
aoqi@137 | 3536 | cmpxchg(tmpReg, Address(objReg, 0), boxReg); |
aoqi@30 | 3537 | |
aoqi@30 | 3538 | if (EmitSync & 65536) { |
aoqi@30 | 3539 | bind (CheckSucc); |
aoqi@30 | 3540 | } |
aoqi@30 | 3541 | |
aoqi@30 | 3542 | bind(DONE_LABEL); |
aoqi@30 | 3543 | |
aoqi@30 | 3544 | // Avoid branch to branch on AMD processors |
aoqi@30 | 3545 | if (EmitSync & 32768) { nop() ; } |
aoqi@30 | 3546 | } |
aoqi@30 | 3547 | } |
aoqi@30 | 3548 | |
aoqi@1 | 3549 | class ControlWord { |
aoqi@1 | 3550 | public: |
aoqi@1 | 3551 | int32_t _value; |
aoqi@1 | 3552 | |
aoqi@1 | 3553 | int rounding_control() const { return (_value >> 10) & 3 ; } |
aoqi@1 | 3554 | int precision_control() const { return (_value >> 8) & 3 ; } |
aoqi@1 | 3555 | bool precision() const { return ((_value >> 5) & 1) != 0; } |
aoqi@1 | 3556 | bool underflow() const { return ((_value >> 4) & 1) != 0; } |
aoqi@1 | 3557 | bool overflow() const { return ((_value >> 3) & 1) != 0; } |
aoqi@1 | 3558 | bool zero_divide() const { return ((_value >> 2) & 1) != 0; } |
aoqi@1 | 3559 | bool denormalized() const { return ((_value >> 1) & 1) != 0; } |
aoqi@1 | 3560 | bool invalid() const { return ((_value >> 0) & 1) != 0; } |
aoqi@1 | 3561 | |
aoqi@1 | 3562 | void print() const { |
aoqi@1 | 3563 | // rounding control |
aoqi@1 | 3564 | const char* rc; |
aoqi@1 | 3565 | switch (rounding_control()) { |
aoqi@1 | 3566 | case 0: rc = "round near"; break; |
aoqi@1 | 3567 | case 1: rc = "round down"; break; |
aoqi@1 | 3568 | case 2: rc = "round up "; break; |
aoqi@1 | 3569 | case 3: rc = "chop "; break; |
aoqi@1 | 3570 | }; |
aoqi@1 | 3571 | // precision control |
aoqi@1 | 3572 | const char* pc; |
aoqi@1 | 3573 | switch (precision_control()) { |
aoqi@1 | 3574 | case 0: pc = "24 bits "; break; |
aoqi@1 | 3575 | case 1: pc = "reserved"; break; |
aoqi@1 | 3576 | case 2: pc = "53 bits "; break; |
aoqi@1 | 3577 | case 3: pc = "64 bits "; break; |
aoqi@1 | 3578 | }; |
aoqi@1 | 3579 | // flags |
aoqi@1 | 3580 | char f[9]; |
aoqi@1 | 3581 | f[0] = ' '; |
aoqi@1 | 3582 | f[1] = ' '; |
aoqi@1 | 3583 | f[2] = (precision ()) ? 'P' : 'p'; |
aoqi@1 | 3584 | f[3] = (underflow ()) ? 'U' : 'u'; |
aoqi@1 | 3585 | f[4] = (overflow ()) ? 'O' : 'o'; |
aoqi@1 | 3586 | f[5] = (zero_divide ()) ? 'Z' : 'z'; |
aoqi@1 | 3587 | f[6] = (denormalized()) ? 'D' : 'd'; |
aoqi@1 | 3588 | f[7] = (invalid ()) ? 'I' : 'i'; |
aoqi@1 | 3589 | f[8] = '\x0'; |
aoqi@1 | 3590 | // output |
aoqi@1 | 3591 | printf("%04x masks = %s, %s, %s", _value & 0xFFFF, f, rc, pc); |
aoqi@1 | 3592 | } |
aoqi@1 | 3593 | |
aoqi@1 | 3594 | }; |
aoqi@1 | 3595 | |
aoqi@1 | 3596 | class StatusWord { |
aoqi@1 | 3597 | public: |
aoqi@1 | 3598 | int32_t _value; |
aoqi@1 | 3599 | |
aoqi@1 | 3600 | bool busy() const { return ((_value >> 15) & 1) != 0; } |
aoqi@1 | 3601 | bool C3() const { return ((_value >> 14) & 1) != 0; } |
aoqi@1 | 3602 | bool C2() const { return ((_value >> 10) & 1) != 0; } |
aoqi@1 | 3603 | bool C1() const { return ((_value >> 9) & 1) != 0; } |
aoqi@1 | 3604 | bool C0() const { return ((_value >> 8) & 1) != 0; } |
aoqi@1 | 3605 | int top() const { return (_value >> 11) & 7 ; } |
aoqi@1 | 3606 | bool error_status() const { return ((_value >> 7) & 1) != 0; } |
aoqi@1 | 3607 | bool stack_fault() const { return ((_value >> 6) & 1) != 0; } |
aoqi@1 | 3608 | bool precision() const { return ((_value >> 5) & 1) != 0; } |
aoqi@1 | 3609 | bool underflow() const { return ((_value >> 4) & 1) != 0; } |
aoqi@1 | 3610 | bool overflow() const { return ((_value >> 3) & 1) != 0; } |
aoqi@1 | 3611 | bool zero_divide() const { return ((_value >> 2) & 1) != 0; } |
aoqi@1 | 3612 | bool denormalized() const { return ((_value >> 1) & 1) != 0; } |
aoqi@1 | 3613 | bool invalid() const { return ((_value >> 0) & 1) != 0; } |
aoqi@1 | 3614 | |
aoqi@1 | 3615 | void print() const { |
aoqi@1 | 3616 | // condition codes |
aoqi@1 | 3617 | char c[5]; |
aoqi@1 | 3618 | c[0] = (C3()) ? '3' : '-'; |
aoqi@1 | 3619 | c[1] = (C2()) ? '2' : '-'; |
aoqi@1 | 3620 | c[2] = (C1()) ? '1' : '-'; |
aoqi@1 | 3621 | c[3] = (C0()) ? '0' : '-'; |
aoqi@1 | 3622 | c[4] = '\x0'; |
aoqi@1 | 3623 | // flags |
aoqi@1 | 3624 | char f[9]; |
aoqi@1 | 3625 | f[0] = (error_status()) ? 'E' : '-'; |
aoqi@1 | 3626 | f[1] = (stack_fault ()) ? 'S' : '-'; |
aoqi@1 | 3627 | f[2] = (precision ()) ? 'P' : '-'; |
aoqi@1 | 3628 | f[3] = (underflow ()) ? 'U' : '-'; |
aoqi@1 | 3629 | f[4] = (overflow ()) ? 'O' : '-'; |
aoqi@1 | 3630 | f[5] = (zero_divide ()) ? 'Z' : '-'; |
aoqi@1 | 3631 | f[6] = (denormalized()) ? 'D' : '-'; |
aoqi@1 | 3632 | f[7] = (invalid ()) ? 'I' : '-'; |
aoqi@1 | 3633 | f[8] = '\x0'; |
aoqi@1 | 3634 | // output |
aoqi@1 | 3635 | printf("%04x flags = %s, cc = %s, top = %d", _value & 0xFFFF, f, c, top()); |
aoqi@1 | 3636 | } |
aoqi@1 | 3637 | |
aoqi@1 | 3638 | }; |
aoqi@1 | 3639 | |
aoqi@1 | 3640 | class TagWord { |
aoqi@1 | 3641 | public: |
aoqi@1 | 3642 | int32_t _value; |
aoqi@1 | 3643 | |
aoqi@1 | 3644 | int tag_at(int i) const { return (_value >> (i*2)) & 3; } |
aoqi@1 | 3645 | |
aoqi@1 | 3646 | void print() const { |
aoqi@1 | 3647 | printf("%04x", _value & 0xFFFF); |
aoqi@1 | 3648 | } |
aoqi@1 | 3649 | |
aoqi@1 | 3650 | }; |
aoqi@1 | 3651 | |
aoqi@1 | 3652 | class FPU_Register { |
aoqi@1 | 3653 | public: |
aoqi@1 | 3654 | int32_t _m0; |
aoqi@1 | 3655 | int32_t _m1; |
aoqi@1 | 3656 | int16_t _ex; |
aoqi@1 | 3657 | |
aoqi@1 | 3658 | bool is_indefinite() const { |
aoqi@1 | 3659 | return _ex == -1 && _m1 == (int32_t)0xC0000000 && _m0 == 0; |
aoqi@1 | 3660 | } |
aoqi@1 | 3661 | |
aoqi@1 | 3662 | void print() const { |
aoqi@1 | 3663 | char sign = (_ex < 0) ? '-' : '+'; |
aoqi@1 | 3664 | const char* kind = (_ex == 0x7FFF || _ex == (int16_t)-1) ? "NaN" : " "; |
aoqi@1 | 3665 | printf("%c%04hx.%08x%08x %s", sign, _ex, _m1, _m0, kind); |
aoqi@1 | 3666 | }; |
aoqi@1 | 3667 | |
aoqi@1 | 3668 | }; |
aoqi@1 | 3669 | |
aoqi@1 | 3670 | class FPU_State { |
aoqi@1 | 3671 | public: |
aoqi@1 | 3672 | enum { |
aoqi@1 | 3673 | register_size = 10, |
aoqi@1 | 3674 | number_of_registers = 8, |
aoqi@1 | 3675 | register_mask = 7 |
aoqi@1 | 3676 | }; |
aoqi@1 | 3677 | |
aoqi@1 | 3678 | ControlWord _control_word; |
aoqi@1 | 3679 | StatusWord _status_word; |
aoqi@1 | 3680 | TagWord _tag_word; |
aoqi@1 | 3681 | int32_t _error_offset; |
aoqi@1 | 3682 | int32_t _error_selector; |
aoqi@1 | 3683 | int32_t _data_offset; |
aoqi@1 | 3684 | int32_t _data_selector; |
aoqi@1 | 3685 | int8_t _register[register_size * number_of_registers]; |
aoqi@1 | 3686 | |
aoqi@1 | 3687 | int tag_for_st(int i) const { return _tag_word.tag_at((_status_word.top() + i) & register_mask); } |
aoqi@1 | 3688 | FPU_Register* st(int i) const { return (FPU_Register*)&_register[register_size * i]; } |
aoqi@1 | 3689 | |
aoqi@1 | 3690 | const char* tag_as_string(int tag) const { |
aoqi@1 | 3691 | switch (tag) { |
aoqi@1 | 3692 | case 0: return "valid"; |
aoqi@1 | 3693 | case 1: return "zero"; |
aoqi@1 | 3694 | case 2: return "special"; |
aoqi@1 | 3695 | case 3: return "empty"; |
aoqi@1 | 3696 | } |
aoqi@1 | 3697 | ShouldNotReachHere(); |
aoqi@1 | 3698 | return NULL; |
aoqi@1 | 3699 | } |
aoqi@1 | 3700 | |
aoqi@1 | 3701 | void print() const { |
aoqi@1 | 3702 | // print computation registers |
aoqi@1 | 3703 | { int t = _status_word.top(); |
aoqi@1 | 3704 | for (int i = 0; i < number_of_registers; i++) { |
aoqi@1 | 3705 | int j = (i - t) & register_mask; |
aoqi@1 | 3706 | printf("%c r%d = ST%d = ", (j == 0 ? '*' : ' '), i, j); |
aoqi@1 | 3707 | st(j)->print(); |
aoqi@1 | 3708 | printf(" %s\n", tag_as_string(_tag_word.tag_at(i))); |
aoqi@1 | 3709 | } |
aoqi@1 | 3710 | } |
aoqi@1 | 3711 | printf("\n"); |
aoqi@1 | 3712 | // print control registers |
aoqi@1 | 3713 | printf("ctrl = "); _control_word.print(); printf("\n"); |
aoqi@1 | 3714 | printf("stat = "); _status_word .print(); printf("\n"); |
aoqi@1 | 3715 | printf("tags = "); _tag_word .print(); printf("\n"); |
aoqi@1 | 3716 | } |
aoqi@1 | 3717 | |
aoqi@1 | 3718 | }; |
aoqi@1 | 3719 | |
aoqi@1 | 3720 | class Flag_Register { |
aoqi@1 | 3721 | public: |
aoqi@1 | 3722 | int32_t _value; |
aoqi@1 | 3723 | |
aoqi@1 | 3724 | bool overflow() const { return ((_value >> 11) & 1) != 0; } |
aoqi@1 | 3725 | bool direction() const { return ((_value >> 10) & 1) != 0; } |
aoqi@1 | 3726 | bool sign() const { return ((_value >> 7) & 1) != 0; } |
aoqi@1 | 3727 | bool zero() const { return ((_value >> 6) & 1) != 0; } |
aoqi@1 | 3728 | bool auxiliary_carry() const { return ((_value >> 4) & 1) != 0; } |
aoqi@1 | 3729 | bool parity() const { return ((_value >> 2) & 1) != 0; } |
aoqi@1 | 3730 | bool carry() const { return ((_value >> 0) & 1) != 0; } |
aoqi@1 | 3731 | |
aoqi@1 | 3732 | void print() const { |
aoqi@1 | 3733 | // flags |
aoqi@1 | 3734 | char f[8]; |
aoqi@1 | 3735 | f[0] = (overflow ()) ? 'O' : '-'; |
aoqi@1 | 3736 | f[1] = (direction ()) ? 'D' : '-'; |
aoqi@1 | 3737 | f[2] = (sign ()) ? 'S' : '-'; |
aoqi@1 | 3738 | f[3] = (zero ()) ? 'Z' : '-'; |
aoqi@1 | 3739 | f[4] = (auxiliary_carry()) ? 'A' : '-'; |
aoqi@1 | 3740 | f[5] = (parity ()) ? 'P' : '-'; |
aoqi@1 | 3741 | f[6] = (carry ()) ? 'C' : '-'; |
aoqi@1 | 3742 | f[7] = '\x0'; |
aoqi@1 | 3743 | // output |
aoqi@1 | 3744 | printf("%08x flags = %s", _value, f); |
aoqi@1 | 3745 | } |
aoqi@1 | 3746 | |
aoqi@1 | 3747 | }; |
aoqi@1 | 3748 | |
aoqi@1 | 3749 | class IU_Register { |
aoqi@1 | 3750 | public: |
aoqi@1 | 3751 | int32_t _value; |
aoqi@1 | 3752 | |
aoqi@1 | 3753 | void print() const { |
aoqi@1 | 3754 | printf("%08x %11d", _value, _value); |
aoqi@1 | 3755 | } |
aoqi@1 | 3756 | |
aoqi@1 | 3757 | }; |
aoqi@1 | 3758 | |
aoqi@1 | 3759 | class IU_State { |
aoqi@1 | 3760 | public: |
aoqi@1 | 3761 | Flag_Register _eflags; |
aoqi@1 | 3762 | IU_Register _rdi; |
aoqi@1 | 3763 | IU_Register _rsi; |
aoqi@1 | 3764 | IU_Register _rbp; |
aoqi@1 | 3765 | IU_Register _rsp; |
aoqi@1 | 3766 | IU_Register _rbx; |
aoqi@1 | 3767 | IU_Register _rdx; |
aoqi@1 | 3768 | IU_Register _rcx; |
aoqi@1 | 3769 | IU_Register _rax; |
aoqi@1 | 3770 | |
aoqi@1 | 3771 | void print() const { |
aoqi@1 | 3772 | // computation registers |
aoqi@1 | 3773 | printf("rax, = "); _rax.print(); printf("\n"); |
aoqi@1 | 3774 | printf("rbx, = "); _rbx.print(); printf("\n"); |
aoqi@1 | 3775 | printf("rcx = "); _rcx.print(); printf("\n"); |
aoqi@1 | 3776 | printf("rdx = "); _rdx.print(); printf("\n"); |
aoqi@1 | 3777 | printf("rdi = "); _rdi.print(); printf("\n"); |
aoqi@1 | 3778 | printf("rsi = "); _rsi.print(); printf("\n"); |
aoqi@1 | 3779 | printf("rbp, = "); _rbp.print(); printf("\n"); |
aoqi@1 | 3780 | printf("rsp = "); _rsp.print(); printf("\n"); |
aoqi@1 | 3781 | printf("\n"); |
aoqi@1 | 3782 | // control registers |
aoqi@1 | 3783 | printf("flgs = "); _eflags.print(); printf("\n"); |
aoqi@1 | 3784 | } |
aoqi@1 | 3785 | }; |
aoqi@1 | 3786 | |
aoqi@1 | 3787 | |
aoqi@1 | 3788 | class CPU_State { |
aoqi@1 | 3789 | public: |
aoqi@1 | 3790 | FPU_State _fpu_state; |
aoqi@1 | 3791 | IU_State _iu_state; |
aoqi@1 | 3792 | |
aoqi@1 | 3793 | void print() const { |
aoqi@1 | 3794 | printf("--------------------------------------------------\n"); |
aoqi@1 | 3795 | _iu_state .print(); |
aoqi@1 | 3796 | printf("\n"); |
aoqi@1 | 3797 | _fpu_state.print(); |
aoqi@1 | 3798 | printf("--------------------------------------------------\n"); |
aoqi@1 | 3799 | } |
aoqi@1 | 3800 | |
aoqi@1 | 3801 | }; |
aoqi@1 | 3802 | |
aoqi@1 | 3803 | |
aoqi@1 | 3804 | /* |
aoqi@1 | 3805 | static void _print_CPU_state(CPU_State* state) { |
aoqi@1 | 3806 | state->print(); |
aoqi@1 | 3807 | }; |
aoqi@1 | 3808 | |
aoqi@1 | 3809 | void MacroAssembler::print_CPU_state() { |
aoqi@1 | 3810 | push_CPU_state(); |
aoqi@1 | 3811 | push(rsp); // pass CPU state |
aoqi@1 | 3812 | call(RuntimeAddress(CAST_FROM_FN_PTR(address, _print_CPU_state))); |
aoqi@1 | 3813 | addptr(rsp, wordSize); // discard argument |
aoqi@1 | 3814 | pop_CPU_state(); |
aoqi@1 | 3815 | } |
aoqi@1 | 3816 | */ |
aoqi@1 | 3817 | |
aoqi@1 | 3818 | void MacroAssembler::align(int modulus) { |
aoqi@1 | 3819 | while (offset() % modulus != 0) nop(); |
aoqi@1 | 3820 | } |
aoqi@1 | 3821 | |
aoqi@1 | 3822 | |
aoqi@1 | 3823 | void MacroAssembler::verify_FPU(int stack_depth, const char* s) { |
aoqi@1 | 3824 | //FIXME aoqi |
aoqi@1 | 3825 | // %%%%% need to implement this |
aoqi@1 | 3826 | //Unimplemented(); |
aoqi@1 | 3827 | /* |
aoqi@1 | 3828 | if (!VerifyFPU) return; |
aoqi@1 | 3829 | push_CPU_state(); |
aoqi@1 | 3830 | push(rsp); // pass CPU state |
aoqi@1 | 3831 | ExternalAddress msg((address) s); |
aoqi@1 | 3832 | // pass message string s |
aoqi@1 | 3833 | pushptr(msg.addr()); |
aoqi@1 | 3834 | push(stack_depth); // pass stack depth |
aoqi@1 | 3835 | call(RuntimeAddress(CAST_FROM_FN_PTR(address, _verify_FPU))); |
aoqi@1 | 3836 | addptr(rsp, 3 * wordSize); // discard arguments |
aoqi@1 | 3837 | // check for error |
aoqi@1 | 3838 | { Label L; |
aoqi@1 | 3839 | testl(rax, rax); |
aoqi@1 | 3840 | jcc(Assembler::notZero, L); |
aoqi@1 | 3841 | int3(); // break if error condition |
aoqi@1 | 3842 | bind(L); |
aoqi@1 | 3843 | } |
aoqi@1 | 3844 | pop_CPU_state(); |
aoqi@1 | 3845 | */ |
aoqi@1 | 3846 | } |
aoqi@1 | 3847 | |
aoqi@1 | 3848 | #ifdef _LP64 |
aoqi@1 | 3849 | Register caller_saved_registers[] = {AT, V0, V1, A0, A1, A2, A3, A4, A5, A6, A7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; |
aoqi@1 | 3850 | |
aoqi@1 | 3851 | /* FIXME: Jin: In MIPS64, F0~23 are all caller-saved registers */ |
aoqi@1 | 3852 | FloatRegister caller_saved_fpu_registers[] = {F0, F12, F13}; |
aoqi@1 | 3853 | #else |
aoqi@1 | 3854 | Register caller_saved_registers[] = {AT, V0, V1, A0, A1, A2, A3, T4, T5, T6, T7, T0, T1, T2, T3, T8, T9, GP, RA, FP}; |
aoqi@1 | 3855 | |
aoqi@1 | 3856 | Register caller_saved_fpu_registers[] = {}; |
aoqi@1 | 3857 | #endif |
aoqi@1 | 3858 | |
aoqi@1 | 3859 | //We preserve all caller-saved register |
aoqi@1 | 3860 | void MacroAssembler::pushad(){ |
aoqi@1 | 3861 | int i; |
aoqi@1 | 3862 | |
aoqi@1 | 3863 | /* Fixed-point registers */ |
aoqi@1 | 3864 | int len = sizeof(caller_saved_registers) / sizeof(caller_saved_registers[0]); |
aoqi@1 | 3865 | daddi(SP, SP, -1 * len * wordSize); |
aoqi@1 | 3866 | for (i = 0; i < len; i++) |
aoqi@1 | 3867 | { |
aoqi@1 | 3868 | #ifdef _LP64 |
aoqi@1 | 3869 | sd(caller_saved_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3870 | #else |
aoqi@1 | 3871 | sw(caller_saved_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3872 | #endif |
aoqi@1 | 3873 | } |
aoqi@1 | 3874 | |
aoqi@1 | 3875 | /* Floating-point registers */ |
aoqi@1 | 3876 | len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); |
aoqi@1 | 3877 | daddi(SP, SP, -1 * len * wordSize); |
aoqi@1 | 3878 | for (i = 0; i < len; i++) |
aoqi@1 | 3879 | { |
aoqi@1 | 3880 | #ifdef _LP64 |
aoqi@1 | 3881 | sdc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3882 | #else |
aoqi@1 | 3883 | swc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3884 | #endif |
aoqi@1 | 3885 | } |
aoqi@1 | 3886 | }; |
aoqi@1 | 3887 | |
aoqi@1 | 3888 | void MacroAssembler::popad(){ |
aoqi@1 | 3889 | int i; |
aoqi@1 | 3890 | |
aoqi@1 | 3891 | /* Floating-point registers */ |
aoqi@1 | 3892 | int len = sizeof(caller_saved_fpu_registers) / sizeof(caller_saved_fpu_registers[0]); |
aoqi@1 | 3893 | for (i = 0; i < len; i++) |
aoqi@1 | 3894 | { |
aoqi@1 | 3895 | #ifdef _LP64 |
aoqi@1 | 3896 | ldc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3897 | #else |
aoqi@1 | 3898 | lwc1(caller_saved_fpu_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3899 | #endif |
aoqi@1 | 3900 | } |
aoqi@1 | 3901 | daddi(SP, SP, len * wordSize); |
aoqi@1 | 3902 | |
aoqi@1 | 3903 | /* Fixed-point registers */ |
aoqi@1 | 3904 | len = sizeof(caller_saved_registers) / sizeof(caller_saved_registers[0]); |
aoqi@1 | 3905 | for (i = 0; i < len; i++) |
aoqi@1 | 3906 | { |
aoqi@1 | 3907 | #ifdef _LP64 |
aoqi@1 | 3908 | ld(caller_saved_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3909 | #else |
aoqi@1 | 3910 | lw(caller_saved_registers[i], SP, (len - i - 1) * wordSize); |
aoqi@1 | 3911 | #endif |
aoqi@1 | 3912 | } |
aoqi@1 | 3913 | daddi(SP, SP, len * wordSize); |
aoqi@1 | 3914 | }; |
aoqi@1 | 3915 | |
aoqi@1 | 3916 | void MacroAssembler::push2(Register reg1, Register reg2) { |
aoqi@1 | 3917 | #ifdef _LP64 |
aoqi@1 | 3918 | daddi(SP, SP, -16); |
aoqi@1 | 3919 | sd(reg2, SP, 0); |
aoqi@1 | 3920 | sd(reg1, SP, 8); |
aoqi@1 | 3921 | #else |
aoqi@1 | 3922 | addi(SP, SP, -8); |
aoqi@1 | 3923 | sw(reg2, SP, 0); |
aoqi@1 | 3924 | sw(reg1, SP, 4); |
aoqi@1 | 3925 | #endif |
aoqi@1 | 3926 | } |
aoqi@1 | 3927 | |
aoqi@1 | 3928 | void MacroAssembler::pop2(Register reg1, Register reg2) { |
aoqi@1 | 3929 | #ifdef _LP64 |
aoqi@1 | 3930 | ld(reg1, SP, 0); |
aoqi@1 | 3931 | ld(reg2, SP, 8); |
aoqi@1 | 3932 | daddi(SP, SP, 16); |
aoqi@1 | 3933 | #else |
aoqi@1 | 3934 | lw(reg1, SP, 0); |
aoqi@1 | 3935 | lw(reg2, SP, 4); |
aoqi@1 | 3936 | addi(SP, SP, 8); |
aoqi@1 | 3937 | #endif |
aoqi@1 | 3938 | } |
aoqi@1 | 3939 | |
aoqi@1 | 3940 | //for UseCompressedOops Option |
aoqi@1 | 3941 | void MacroAssembler::load_klass(Register dst, Register src) { |
aoqi@1 | 3942 | #ifdef _LP64 |
aoqi@1 | 3943 | if(UseCompressedClassPointers){ |
aoqi@1 | 3944 | lwu(dst, Address(src, oopDesc::klass_offset_in_bytes())); |
fujie@292 | 3945 | decode_klass_not_null(dst); |
aoqi@1 | 3946 | } else |
aoqi@1 | 3947 | #endif |
aoqi@1 | 3948 | ld(dst, src, oopDesc::klass_offset_in_bytes()); |
aoqi@1 | 3949 | } |
aoqi@1 | 3950 | |
aoqi@1 | 3951 | void MacroAssembler::store_klass(Register dst, Register src) { |
aoqi@1 | 3952 | #ifdef _LP64 |
aoqi@1 | 3953 | if(UseCompressedClassPointers){ |
aoqi@1 | 3954 | encode_klass_not_null(src); |
aoqi@1 | 3955 | sw(src, dst, oopDesc::klass_offset_in_bytes()); |
aoqi@1 | 3956 | } else { |
aoqi@1 | 3957 | #endif |
aoqi@1 | 3958 | sd(src, dst, oopDesc::klass_offset_in_bytes()); |
aoqi@1 | 3959 | } |
aoqi@1 | 3960 | } |
aoqi@1 | 3961 | |
aoqi@1 | 3962 | void MacroAssembler::load_prototype_header(Register dst, Register src) { |
aoqi@1 | 3963 | load_klass(dst, src); |
aoqi@1 | 3964 | ld(dst, Address(dst, Klass::prototype_header_offset())); |
aoqi@1 | 3965 | } |
aoqi@1 | 3966 | |
aoqi@1 | 3967 | #ifdef _LP64 |
aoqi@1 | 3968 | void MacroAssembler::store_klass_gap(Register dst, Register src) { |
aoqi@1 | 3969 | if (UseCompressedClassPointers) { |
aoqi@1 | 3970 | sw(src, dst, oopDesc::klass_gap_offset_in_bytes()); |
aoqi@1 | 3971 | } |
aoqi@1 | 3972 | } |
aoqi@1 | 3973 | |
aoqi@1 | 3974 | void MacroAssembler::load_heap_oop(Register dst, Address src) { |
aoqi@1 | 3975 | if(UseCompressedOops){ |
aoqi@1 | 3976 | lwu(dst, src); |
aoqi@1 | 3977 | decode_heap_oop(dst); |
aoqi@1 | 3978 | } else{ |
aoqi@1 | 3979 | ld(dst, src); |
aoqi@1 | 3980 | } |
aoqi@1 | 3981 | } |
aoqi@1 | 3982 | |
aoqi@1 | 3983 | void MacroAssembler::store_heap_oop(Address dst, Register src){ |
aoqi@1 | 3984 | if(UseCompressedOops){ |
aoqi@1 | 3985 | assert(!dst.uses(src), "not enough registers"); |
aoqi@1 | 3986 | encode_heap_oop(src); |
aoqi@1 | 3987 | sw(src, dst); |
aoqi@1 | 3988 | } else{ |
aoqi@1 | 3989 | sd(src, dst); |
aoqi@1 | 3990 | } |
aoqi@1 | 3991 | } |
aoqi@1 | 3992 | |
aoqi@1 | 3993 | #ifdef ASSERT |
aoqi@1 | 3994 | void MacroAssembler::verify_heapbase(const char* msg) { |
aoqi@1 | 3995 | assert (UseCompressedOops || UseCompressedClassPointers, "should be compressed"); |
aoqi@1 | 3996 | assert (Universe::heap() != NULL, "java heap should be initialized"); |
aoqi@1 | 3997 | /* if (CheckCompressedOops) { |
aoqi@1 | 3998 | Label ok; |
aoqi@1 | 3999 | push(rscratch1); // cmpptr trashes rscratch1 |
aoqi@1 | 4000 | cmpptr(r12_heapbase, ExternalAddress((address)Universe::narrow_ptrs_base_addr())); |
aoqi@1 | 4001 | jcc(Assembler::equal, ok); |
aoqi@1 | 4002 | STOP(msg); |
aoqi@1 | 4003 | bind(ok); |
aoqi@1 | 4004 | pop(rscratch1); |
aoqi@1 | 4005 | }*/ |
aoqi@1 | 4006 | } |
aoqi@1 | 4007 | #endif |
aoqi@1 | 4008 | |
aoqi@1 | 4009 | |
aoqi@1 | 4010 | // Algorithm must match oop.inline.hpp encode_heap_oop. |
aoqi@1 | 4011 | void MacroAssembler::encode_heap_oop(Register r) { |
aoqi@1 | 4012 | #ifdef ASSERT |
aoqi@1 | 4013 | verify_heapbase("MacroAssembler::encode_heap_oop:heap base corrupted?"); |
aoqi@1 | 4014 | #endif |
aoqi@1 | 4015 | verify_oop(r, "broken oop in encode_heap_oop"); |
aoqi@1 | 4016 | if (Universe::narrow_oop_base() == NULL) { |
aoqi@1 | 4017 | if (Universe::narrow_oop_shift() != 0) { |
aoqi@1 | 4018 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
aoqi@1 | 4019 | shr(r, LogMinObjAlignmentInBytes); |
aoqi@1 | 4020 | } |
aoqi@1 | 4021 | return; |
aoqi@1 | 4022 | } |
aoqi@1 | 4023 | |
fujie@387 | 4024 | movz(r, S5_heapbase, r); |
aoqi@1 | 4025 | dsub(r, r, S5_heapbase); |
fujie@391 | 4026 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4027 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4028 | shr(r, LogMinObjAlignmentInBytes); |
fujie@391 | 4029 | } |
fujie@391 | 4030 | } |
fujie@391 | 4031 | |
fujie@391 | 4032 | void MacroAssembler::encode_heap_oop(Register dst, Register src) { |
fujie@391 | 4033 | #ifdef ASSERT |
fujie@391 | 4034 | verify_heapbase("MacroAssembler::encode_heap_oop:heap base corrupted?"); |
fujie@391 | 4035 | #endif |
fujie@391 | 4036 | verify_oop(src, "broken oop in encode_heap_oop"); |
fujie@391 | 4037 | if (Universe::narrow_oop_base() == NULL) { |
fujie@391 | 4038 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4039 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4040 | dsrl(dst, src, LogMinObjAlignmentInBytes); |
fujie@391 | 4041 | } else { |
fujie@391 | 4042 | if (dst != src) move(dst, src); |
fujie@391 | 4043 | } |
fujie@391 | 4044 | } else { |
fujie@391 | 4045 | if (dst == src) { |
fujie@391 | 4046 | movz(dst, S5_heapbase, dst); |
fujie@391 | 4047 | dsub(dst, dst, S5_heapbase); |
fujie@391 | 4048 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4049 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4050 | shr(dst, LogMinObjAlignmentInBytes); |
fujie@391 | 4051 | } |
fujie@391 | 4052 | } else { |
fujie@391 | 4053 | dsub(dst, src, S5_heapbase); |
fujie@391 | 4054 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4055 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4056 | shr(dst, LogMinObjAlignmentInBytes); |
fujie@391 | 4057 | } |
fujie@391 | 4058 | movz(dst, R0, src); |
fujie@391 | 4059 | } |
fujie@391 | 4060 | } |
aoqi@1 | 4061 | } |
aoqi@1 | 4062 | |
aoqi@1 | 4063 | void MacroAssembler::encode_heap_oop_not_null(Register r) { |
aoqi@1 | 4064 | assert (UseCompressedOops, "should be compressed"); |
aoqi@1 | 4065 | #ifdef ASSERT |
aoqi@1 | 4066 | if (CheckCompressedOops) { |
aoqi@1 | 4067 | Label ok; |
aoqi@1 | 4068 | bne(r, R0, ok); |
aoqi@1 | 4069 | delayed()->nop(); |
aoqi@1 | 4070 | stop("null oop passed to encode_heap_oop_not_null"); |
aoqi@1 | 4071 | bind(ok); |
aoqi@1 | 4072 | } |
aoqi@1 | 4073 | #endif |
aoqi@1 | 4074 | verify_oop(r, "broken oop in encode_heap_oop_not_null"); |
aoqi@1 | 4075 | if (Universe::narrow_oop_base() != NULL) { |
aoqi@1 | 4076 | dsub(r, r, S5_heapbase); |
aoqi@1 | 4077 | } |
aoqi@1 | 4078 | if (Universe::narrow_oop_shift() != 0) { |
aoqi@1 | 4079 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
aoqi@1 | 4080 | shr(r, LogMinObjAlignmentInBytes); |
aoqi@1 | 4081 | } |
aoqi@1 | 4082 | |
aoqi@1 | 4083 | } |
aoqi@1 | 4084 | |
aoqi@1 | 4085 | void MacroAssembler::encode_heap_oop_not_null(Register dst, Register src) { |
aoqi@1 | 4086 | assert (UseCompressedOops, "should be compressed"); |
aoqi@1 | 4087 | #ifdef ASSERT |
aoqi@1 | 4088 | if (CheckCompressedOops) { |
aoqi@1 | 4089 | Label ok; |
aoqi@1 | 4090 | bne(src, R0, ok); |
aoqi@1 | 4091 | delayed()->nop(); |
aoqi@1 | 4092 | stop("null oop passed to encode_heap_oop_not_null2"); |
aoqi@1 | 4093 | bind(ok); |
aoqi@1 | 4094 | } |
aoqi@1 | 4095 | #endif |
aoqi@1 | 4096 | verify_oop(src, "broken oop in encode_heap_oop_not_null2"); |
fujie@391 | 4097 | |
fujie@391 | 4098 | if (Universe::narrow_oop_base() != NULL) { |
fujie@391 | 4099 | dsub(dst, src, S5_heapbase); |
fujie@391 | 4100 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4101 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4102 | shr(dst, LogMinObjAlignmentInBytes); |
fujie@391 | 4103 | } |
fujie@391 | 4104 | } else { |
fujie@391 | 4105 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4106 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4107 | dsrl(dst, src, LogMinObjAlignmentInBytes); |
fujie@391 | 4108 | } else { |
fujie@391 | 4109 | if (dst != src) move(dst, src); |
fujie@391 | 4110 | } |
aoqi@1 | 4111 | } |
aoqi@1 | 4112 | } |
aoqi@1 | 4113 | |
aoqi@1 | 4114 | void MacroAssembler::decode_heap_oop(Register r) { |
aoqi@1 | 4115 | #ifdef ASSERT |
aoqi@1 | 4116 | verify_heapbase("MacroAssembler::decode_heap_oop corrupted?"); |
aoqi@1 | 4117 | #endif |
aoqi@1 | 4118 | if (Universe::narrow_oop_base() == NULL) { |
aoqi@1 | 4119 | if (Universe::narrow_oop_shift() != 0) { |
aoqi@1 | 4120 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
aoqi@1 | 4121 | shl(r, LogMinObjAlignmentInBytes); |
aoqi@1 | 4122 | } |
aoqi@1 | 4123 | } else { |
fujie@387 | 4124 | move(AT, r); |
fujie@391 | 4125 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4126 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4127 | shl(r, LogMinObjAlignmentInBytes); |
fujie@391 | 4128 | } |
aoqi@1 | 4129 | dadd(r, r, S5_heapbase); |
fujie@387 | 4130 | movz(r, R0, AT); |
aoqi@1 | 4131 | } |
aoqi@1 | 4132 | verify_oop(r, "broken oop in decode_heap_oop"); |
aoqi@1 | 4133 | } |
aoqi@1 | 4134 | |
fujie@391 | 4135 | void MacroAssembler::decode_heap_oop(Register dst, Register src) { |
fujie@391 | 4136 | #ifdef ASSERT |
fujie@391 | 4137 | verify_heapbase("MacroAssembler::decode_heap_oop corrupted?"); |
fujie@391 | 4138 | #endif |
fujie@391 | 4139 | if (Universe::narrow_oop_base() == NULL) { |
fujie@391 | 4140 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4141 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4142 | dsll(dst, src, LogMinObjAlignmentInBytes); |
fujie@391 | 4143 | } else { |
fujie@391 | 4144 | if (dst != src) move(dst, src); |
fujie@391 | 4145 | } |
fujie@391 | 4146 | } else { |
fujie@391 | 4147 | if (dst == src) { |
fujie@391 | 4148 | move(AT, dst); |
fujie@391 | 4149 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4150 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4151 | shl(dst, LogMinObjAlignmentInBytes); |
fujie@391 | 4152 | } |
fujie@391 | 4153 | dadd(dst, dst, S5_heapbase); |
fujie@391 | 4154 | movz(dst, R0, AT); |
fujie@391 | 4155 | } else { |
fujie@391 | 4156 | if (Universe::narrow_oop_shift() != 0) { |
fujie@391 | 4157 | assert (LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
fujie@391 | 4158 | dsll(dst, src, LogMinObjAlignmentInBytes); |
fujie@391 | 4159 | daddu(dst, dst, S5_heapbase); |
fujie@391 | 4160 | } else { |
fujie@391 | 4161 | daddu(dst, src, S5_heapbase); |
fujie@391 | 4162 | } |
fujie@391 | 4163 | movz(dst, R0, src); |
fujie@391 | 4164 | } |
fujie@391 | 4165 | } |
fujie@391 | 4166 | verify_oop(dst, "broken oop in decode_heap_oop"); |
fujie@391 | 4167 | } |
fujie@391 | 4168 | |
aoqi@1 | 4169 | void MacroAssembler::decode_heap_oop_not_null(Register r) { |
aoqi@1 | 4170 | // Note: it will change flags |
aoqi@1 | 4171 | assert (UseCompressedOops, "should only be used for compressed headers"); |
aoqi@1 | 4172 | assert (Universe::heap() != NULL, "java heap should be initialized"); |
aoqi@1 | 4173 | // Cannot assert, unverified entry point counts instructions (see .ad file) |
aoqi@1 | 4174 | // vtableStubs also counts instructions in pd_code_size_limit. |
aoqi@1 | 4175 | // Also do not verify_oop as this is called by verify_oop. |
aoqi@1 | 4176 | if (Universe::narrow_oop_shift() != 0) { |
aoqi@1 | 4177 | assert(LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
aoqi@1 | 4178 | shl(r, LogMinObjAlignmentInBytes); |
aoqi@1 | 4179 | if (Universe::narrow_oop_base() != NULL) { |
fujie@105 | 4180 | daddu(r, r, S5_heapbase); |
aoqi@1 | 4181 | } |
aoqi@1 | 4182 | } else { |
aoqi@1 | 4183 | assert (Universe::narrow_oop_base() == NULL, "sanity"); |
aoqi@1 | 4184 | } |
aoqi@1 | 4185 | } |
aoqi@1 | 4186 | |
aoqi@1 | 4187 | void MacroAssembler::decode_heap_oop_not_null(Register dst, Register src) { |
aoqi@1 | 4188 | assert (UseCompressedOops, "should only be used for compressed headers"); |
aoqi@1 | 4189 | assert (Universe::heap() != NULL, "java heap should be initialized"); |
aoqi@1 | 4190 | |
aoqi@1 | 4191 | // Cannot assert, unverified entry point counts instructions (see .ad file) |
aoqi@1 | 4192 | // vtableStubs also counts instructions in pd_code_size_limit. |
aoqi@1 | 4193 | // Also do not verify_oop as this is called by verify_oop. |
aoqi@1 | 4194 | //lea(dst, Address(S5_heapbase, src, Address::times_8, 0)); |
aoqi@1 | 4195 | if (Universe::narrow_oop_shift() != 0) { |
aoqi@1 | 4196 | assert(LogMinObjAlignmentInBytes == Universe::narrow_oop_shift(), "decode alg wrong"); |
aoqi@1 | 4197 | if (LogMinObjAlignmentInBytes == Address::times_8) { |
aoqi@1 | 4198 | dsll(dst, src, LogMinObjAlignmentInBytes); |
fujie@105 | 4199 | daddu(dst, dst, S5_heapbase); |
aoqi@1 | 4200 | } else { |
fujie@391 | 4201 | dsll(dst, src, LogMinObjAlignmentInBytes); |
aoqi@1 | 4202 | if (Universe::narrow_oop_base() != NULL) { |
fujie@105 | 4203 | daddu(dst, dst, S5_heapbase); |
aoqi@1 | 4204 | } |
aoqi@1 | 4205 | } |
aoqi@1 | 4206 | } else { |
aoqi@1 | 4207 | assert (Universe::narrow_oop_base() == NULL, "sanity"); |
aoqi@1 | 4208 | if (dst != src) { |
aoqi@1 | 4209 | move(dst, src); |
aoqi@1 | 4210 | } |
aoqi@1 | 4211 | } |
aoqi@1 | 4212 | } |
aoqi@1 | 4213 | |
aoqi@1 | 4214 | void MacroAssembler::encode_klass_not_null(Register r) { |
aoqi@1 | 4215 | if (Universe::narrow_klass_base() != NULL) { |
fujie@387 | 4216 | assert(r != AT, "Encoding a klass in AT"); |
fujie@387 | 4217 | set64(AT, (int64_t)Universe::narrow_klass_base()); |
fujie@387 | 4218 | dsub(r, r, AT); |
aoqi@1 | 4219 | } |
aoqi@1 | 4220 | if (Universe::narrow_klass_shift() != 0) { |
aoqi@1 | 4221 | assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); |
aoqi@1 | 4222 | shr(r, LogKlassAlignmentInBytes); |
aoqi@1 | 4223 | } |
fujie@387 | 4224 | // Not neccessary for MIPS at all. |
fujie@387 | 4225 | //if (Universe::narrow_klass_base() != NULL) { |
fujie@387 | 4226 | // reinit_heapbase(); |
fujie@387 | 4227 | //} |
aoqi@1 | 4228 | } |
aoqi@1 | 4229 | |
aoqi@1 | 4230 | void MacroAssembler::encode_klass_not_null(Register dst, Register src) { |
aoqi@1 | 4231 | if (dst == src) { |
aoqi@1 | 4232 | encode_klass_not_null(src); |
aoqi@1 | 4233 | } else { |
aoqi@1 | 4234 | if (Universe::narrow_klass_base() != NULL) { |
fujie@368 | 4235 | set64(dst, (int64_t)Universe::narrow_klass_base()); |
aoqi@1 | 4236 | dsub(dst, src, dst); |
fujie@391 | 4237 | if (Universe::narrow_klass_shift() != 0) { |
fujie@391 | 4238 | assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); |
fujie@391 | 4239 | shr(dst, LogKlassAlignmentInBytes); |
fujie@391 | 4240 | } |
aoqi@1 | 4241 | } else { |
fujie@391 | 4242 | if (Universe::narrow_klass_shift() != 0) { |
fujie@391 | 4243 | assert (LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); |
fujie@391 | 4244 | dsrl(dst, src, LogKlassAlignmentInBytes); |
fujie@391 | 4245 | } else { |
fujie@391 | 4246 | move(dst, src); |
fujie@391 | 4247 | } |
aoqi@1 | 4248 | } |
aoqi@1 | 4249 | } |
aoqi@1 | 4250 | } |
aoqi@1 | 4251 | |
aoqi@1 | 4252 | // Function instr_size_for_decode_klass_not_null() counts the instructions |
aoqi@1 | 4253 | // generated by decode_klass_not_null(register r) and reinit_heapbase(), |
aoqi@1 | 4254 | // when (Universe::heap() != NULL). Hence, if the instructions they |
aoqi@1 | 4255 | // generate change, then this method needs to be updated. |
aoqi@1 | 4256 | int MacroAssembler::instr_size_for_decode_klass_not_null() { |
aoqi@1 | 4257 | assert (UseCompressedClassPointers, "only for compressed klass ptrs"); |
aoqi@1 | 4258 | if (Universe::narrow_klass_base() != NULL) { |
aoqi@1 | 4259 | // mov64 + addq + shlq? + mov64 (for reinit_heapbase()). |
aoqi@1 | 4260 | return (Universe::narrow_klass_shift() == 0 ? 4 * 9 : 4 * 10); |
aoqi@1 | 4261 | } else { |
aoqi@1 | 4262 | // longest load decode klass function, mov64, leaq |
aoqi@1 | 4263 | return (Universe::narrow_klass_shift() == 0 ? 4 * 0 : 4 * 1); |
aoqi@1 | 4264 | } |
aoqi@1 | 4265 | } |
aoqi@1 | 4266 | |
aoqi@1 | 4267 | void MacroAssembler::decode_klass_not_null(Register r) { |
aoqi@1 | 4268 | assert (UseCompressedClassPointers, "should only be used for compressed headers"); |
fujie@387 | 4269 | assert(r != AT, "Decoding a klass in AT"); |
aoqi@1 | 4270 | // Cannot assert, unverified entry point counts instructions (see .ad file) |
aoqi@1 | 4271 | // vtableStubs also counts instructions in pd_code_size_limit. |
aoqi@1 | 4272 | // Also do not verify_oop as this is called by verify_oop. |
aoqi@1 | 4273 | if (Universe::narrow_klass_shift() != 0) { |
aoqi@1 | 4274 | assert(LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); |
aoqi@1 | 4275 | shl(r, LogKlassAlignmentInBytes); |
aoqi@1 | 4276 | } |
aoqi@1 | 4277 | if (Universe::narrow_klass_base() != NULL) { |
fujie@387 | 4278 | set64(AT, (int64_t)Universe::narrow_klass_base()); |
fujie@387 | 4279 | daddu(r, r, AT); |
fujie@387 | 4280 | //Not neccessary for MIPS at all. |
fujie@387 | 4281 | //reinit_heapbase(); |
aoqi@1 | 4282 | } |
aoqi@1 | 4283 | } |
aoqi@1 | 4284 | |
aoqi@1 | 4285 | void MacroAssembler::decode_klass_not_null(Register dst, Register src) { |
aoqi@1 | 4286 | assert (UseCompressedClassPointers, "should only be used for compressed headers"); |
aoqi@1 | 4287 | |
aoqi@1 | 4288 | if (dst == src) { |
aoqi@1 | 4289 | decode_klass_not_null(dst); |
aoqi@1 | 4290 | } else { |
aoqi@1 | 4291 | // Cannot assert, unverified entry point counts instructions (see .ad file) |
aoqi@1 | 4292 | // vtableStubs also counts instructions in pd_code_size_limit. |
aoqi@1 | 4293 | // Also do not verify_oop as this is called by verify_oop. |
fujie@368 | 4294 | set64(dst, (int64_t)Universe::narrow_klass_base()); |
aoqi@1 | 4295 | if (Universe::narrow_klass_shift() != 0) { |
aoqi@1 | 4296 | assert(LogKlassAlignmentInBytes == Universe::narrow_klass_shift(), "decode alg wrong"); |
aoqi@1 | 4297 | assert(LogKlassAlignmentInBytes == Address::times_8, "klass not aligned on 64bits?"); |
fujie@105 | 4298 | dsll(AT, src, Address::times_8); |
fujie@105 | 4299 | daddu(dst, dst, AT); |
aoqi@1 | 4300 | } else { |
fujie@105 | 4301 | daddu(dst, src, dst); |
aoqi@1 | 4302 | } |
aoqi@1 | 4303 | } |
aoqi@1 | 4304 | } |
aoqi@1 | 4305 | |
aoqi@1 | 4306 | void MacroAssembler::incrementl(Register reg, int value) { |
aoqi@1 | 4307 | if (value == min_jint) { |
aoqi@1 | 4308 | move(AT, value); |
aoqi@1 | 4309 | LP64_ONLY(addu32(reg, reg, AT)) NOT_LP64(addu(reg, reg, AT)); |
aoqi@1 | 4310 | return; |
aoqi@1 | 4311 | } |
aoqi@1 | 4312 | if (value < 0) { decrementl(reg, -value); return; } |
aoqi@1 | 4313 | if (value == 0) { ; return; } |
aoqi@1 | 4314 | |
aoqi@1 | 4315 | if(Assembler::is_simm16(value)) { |
aoqi@1 | 4316 | NOT_LP64(addiu(reg, reg, value)); |
aoqi@1 | 4317 | LP64_ONLY(move(AT, value); addu32(reg, reg, AT)); |
aoqi@1 | 4318 | } else { |
aoqi@1 | 4319 | move(AT, value); |
aoqi@1 | 4320 | LP64_ONLY(addu32(reg, reg, AT)) NOT_LP64(addu(reg, reg, AT)); |
aoqi@1 | 4321 | } |
aoqi@1 | 4322 | } |
aoqi@1 | 4323 | |
aoqi@1 | 4324 | void MacroAssembler::decrementl(Register reg, int value) { |
aoqi@1 | 4325 | if (value == min_jint) { |
aoqi@1 | 4326 | move(AT, value); |
aoqi@1 | 4327 | LP64_ONLY(subu32(reg, reg, AT)) NOT_LP64(subu(reg, reg, AT)); |
aoqi@1 | 4328 | return; |
aoqi@1 | 4329 | } |
aoqi@1 | 4330 | if (value < 0) { incrementl(reg, -value); return; } |
aoqi@1 | 4331 | if (value == 0) { ; return; } |
aoqi@1 | 4332 | |
aoqi@1 | 4333 | if(Assembler::is_simm16(value)) { |
aoqi@1 | 4334 | NOT_LP64(addiu(reg, reg, -value)); |
aoqi@1 | 4335 | LP64_ONLY(move(AT, value); subu32(reg, reg, AT)); |
aoqi@1 | 4336 | } else { |
aoqi@1 | 4337 | move(AT, value); |
aoqi@1 | 4338 | LP64_ONLY(subu32(reg, reg, AT)) NOT_LP64(subu(reg, reg, AT)); |
aoqi@1 | 4339 | } |
aoqi@1 | 4340 | } |
aoqi@1 | 4341 | |
aoqi@1 | 4342 | void MacroAssembler::reinit_heapbase() { |
aoqi@1 | 4343 | if (UseCompressedOops || UseCompressedClassPointers) { |
aoqi@1 | 4344 | if (Universe::heap() != NULL) { |
aoqi@1 | 4345 | if (Universe::narrow_oop_base() == NULL) { |
aoqi@1 | 4346 | move(S5_heapbase, R0); |
aoqi@1 | 4347 | } else { |
fujie@368 | 4348 | set64(S5_heapbase, (int64_t)Universe::narrow_ptrs_base()); |
aoqi@1 | 4349 | } |
aoqi@1 | 4350 | } else { |
fujie@368 | 4351 | set64(S5_heapbase, (intptr_t)Universe::narrow_ptrs_base_addr()); |
aoqi@1 | 4352 | ld(S5_heapbase, S5_heapbase, 0); |
aoqi@1 | 4353 | } |
aoqi@1 | 4354 | } |
aoqi@1 | 4355 | } |
aoqi@1 | 4356 | #endif // _LP64 |
aoqi@1 | 4357 | |
aoqi@1 | 4358 | void MacroAssembler::check_klass_subtype(Register sub_klass, |
aoqi@1 | 4359 | Register super_klass, |
aoqi@1 | 4360 | Register temp_reg, |
aoqi@1 | 4361 | Label& L_success) { |
aoqi@1 | 4362 | //implement ind gen_subtype_check |
aoqi@1 | 4363 | Label L_failure; |
aoqi@1 | 4364 | check_klass_subtype_fast_path(sub_klass, super_klass, temp_reg, &L_success, &L_failure, NULL); |
aoqi@1 | 4365 | check_klass_subtype_slow_path(sub_klass, super_klass, temp_reg, noreg, &L_success, NULL); |
aoqi@1 | 4366 | bind(L_failure); |
aoqi@1 | 4367 | } |
aoqi@1 | 4368 | |
aoqi@1 | 4369 | SkipIfEqual::SkipIfEqual( |
aoqi@1 | 4370 | MacroAssembler* masm, const bool* flag_addr, bool value) { |
aoqi@1 | 4371 | _masm = masm; |
aoqi@1 | 4372 | _masm->li(AT, (address)flag_addr); |
aoqi@1 | 4373 | _masm->lb(AT,AT,0); |
aoqi@1 | 4374 | _masm->addi(AT,AT,-value); |
aoqi@1 | 4375 | _masm->beq(AT,R0,_label); |
aoqi@1 | 4376 | _masm->delayed()->nop(); |
aoqi@1 | 4377 | } |
aoqi@1 | 4378 | void MacroAssembler::check_klass_subtype_fast_path(Register sub_klass, |
aoqi@1 | 4379 | Register super_klass, |
aoqi@1 | 4380 | Register temp_reg, |
aoqi@1 | 4381 | Label* L_success, |
aoqi@1 | 4382 | Label* L_failure, |
aoqi@1 | 4383 | Label* L_slow_path, |
aoqi@1 | 4384 | RegisterOrConstant super_check_offset) { |
aoqi@1 | 4385 | assert_different_registers(sub_klass, super_klass, temp_reg); |
aoqi@1 | 4386 | bool must_load_sco = (super_check_offset.constant_or_zero() == -1); |
aoqi@1 | 4387 | if (super_check_offset.is_register()) { |
aoqi@1 | 4388 | assert_different_registers(sub_klass, super_klass, |
aoqi@1 | 4389 | super_check_offset.as_register()); |
aoqi@1 | 4390 | } else if (must_load_sco) { |
aoqi@1 | 4391 | assert(temp_reg != noreg, "supply either a temp or a register offset"); |
aoqi@1 | 4392 | } |
aoqi@1 | 4393 | |
aoqi@1 | 4394 | Label L_fallthrough; |
aoqi@1 | 4395 | int label_nulls = 0; |
aoqi@1 | 4396 | if (L_success == NULL) { L_success = &L_fallthrough; label_nulls++; } |
aoqi@1 | 4397 | if (L_failure == NULL) { L_failure = &L_fallthrough; label_nulls++; } |
aoqi@1 | 4398 | if (L_slow_path == NULL) { L_slow_path = &L_fallthrough; label_nulls++; } |
aoqi@1 | 4399 | assert(label_nulls <= 1, "at most one NULL in the batch"); |
aoqi@1 | 4400 | |
aoqi@1 | 4401 | int sc_offset = in_bytes(Klass::secondary_super_cache_offset()); |
aoqi@1 | 4402 | int sco_offset = in_bytes(Klass::super_check_offset_offset()); |
aoqi@1 | 4403 | // If the pointers are equal, we are done (e.g., String[] elements). |
aoqi@1 | 4404 | // This self-check enables sharing of secondary supertype arrays among |
aoqi@1 | 4405 | // non-primary types such as array-of-interface. Otherwise, each such |
aoqi@1 | 4406 | // type would need its own customized SSA. |
aoqi@1 | 4407 | // We move this check to the front of the fast path because many |
aoqi@1 | 4408 | // type checks are in fact trivially successful in this manner, |
aoqi@1 | 4409 | // so we get a nicely predicted branch right at the start of the check. |
aoqi@1 | 4410 | //cmpptr(sub_klass, super_klass); |
aoqi@1 | 4411 | //local_jcc(Assembler::equal, *L_success); |
aoqi@1 | 4412 | beq(sub_klass, super_klass, *L_success); |
aoqi@1 | 4413 | delayed()->nop(); |
aoqi@1 | 4414 | // Check the supertype display: |
aoqi@1 | 4415 | if (must_load_sco) { |
aoqi@1 | 4416 | // Positive movl does right thing on LP64. |
aoqi@1 | 4417 | lwu(temp_reg, super_klass, sco_offset); |
aoqi@1 | 4418 | super_check_offset = RegisterOrConstant(temp_reg); |
aoqi@1 | 4419 | } |
aoqi@1 | 4420 | dsll(AT, super_check_offset.register_or_noreg(), Address::times_1); |
aoqi@1 | 4421 | daddu(AT, sub_klass, AT); |
aoqi@1 | 4422 | ld(AT, AT, super_check_offset.constant_or_zero()*Address::times_1); |
aoqi@1 | 4423 | |
aoqi@1 | 4424 | // This check has worked decisively for primary supers. |
aoqi@1 | 4425 | // Secondary supers are sought in the super_cache ('super_cache_addr'). |
aoqi@1 | 4426 | // (Secondary supers are interfaces and very deeply nested subtypes.) |
aoqi@1 | 4427 | // This works in the same check above because of a tricky aliasing |
aoqi@1 | 4428 | // between the super_cache and the primary super display elements. |
aoqi@1 | 4429 | // (The 'super_check_addr' can address either, as the case requires.) |
aoqi@1 | 4430 | // Note that the cache is updated below if it does not help us find |
aoqi@1 | 4431 | // what we need immediately. |
aoqi@1 | 4432 | // So if it was a primary super, we can just fail immediately. |
aoqi@1 | 4433 | // Otherwise, it's the slow path for us (no success at this point). |
aoqi@1 | 4434 | |
aoqi@1 | 4435 | if (super_check_offset.is_register()) { |
aoqi@1 | 4436 | beq(super_klass, AT, *L_success); |
aoqi@1 | 4437 | delayed()->nop(); |
aoqi@1 | 4438 | addi(AT, super_check_offset.as_register(), -sc_offset); |
aoqi@1 | 4439 | if (L_failure == &L_fallthrough) { |
aoqi@1 | 4440 | beq(AT, R0, *L_slow_path); |
aoqi@1 | 4441 | delayed()->nop(); |
aoqi@1 | 4442 | } else { |
aoqi@1 | 4443 | bne(AT, R0, *L_failure); |
aoqi@1 | 4444 | delayed()->nop(); |
aoqi@1 | 4445 | b(*L_slow_path); |
aoqi@1 | 4446 | delayed()->nop(); |
aoqi@1 | 4447 | } |
aoqi@1 | 4448 | } else if (super_check_offset.as_constant() == sc_offset) { |
aoqi@1 | 4449 | // Need a slow path; fast failure is impossible. |
aoqi@1 | 4450 | if (L_slow_path == &L_fallthrough) { |
aoqi@1 | 4451 | beq(super_klass, AT, *L_success); |
aoqi@1 | 4452 | delayed()->nop(); |
aoqi@1 | 4453 | } else { |
aoqi@1 | 4454 | bne(super_klass, AT, *L_slow_path); |
aoqi@1 | 4455 | delayed()->nop(); |
aoqi@1 | 4456 | b(*L_success); |
aoqi@1 | 4457 | delayed()->nop(); |
aoqi@1 | 4458 | } |
aoqi@1 | 4459 | } else { |
aoqi@1 | 4460 | // No slow path; it's a fast decision. |
aoqi@1 | 4461 | if (L_failure == &L_fallthrough) { |
aoqi@1 | 4462 | beq(super_klass, AT, *L_success); |
aoqi@1 | 4463 | delayed()->nop(); |
aoqi@1 | 4464 | } else { |
aoqi@1 | 4465 | bne(super_klass, AT, *L_failure); |
aoqi@1 | 4466 | delayed()->nop(); |
aoqi@1 | 4467 | b(*L_success); |
aoqi@1 | 4468 | delayed()->nop(); |
aoqi@1 | 4469 | } |
aoqi@1 | 4470 | } |
aoqi@1 | 4471 | |
aoqi@1 | 4472 | bind(L_fallthrough); |
aoqi@1 | 4473 | |
aoqi@1 | 4474 | } |
aoqi@1 | 4475 | |
aoqi@1 | 4476 | |
aoqi@1 | 4477 | void MacroAssembler::check_klass_subtype_slow_path(Register sub_klass, |
aoqi@1 | 4478 | Register super_klass, |
aoqi@1 | 4479 | Register temp_reg, |
aoqi@1 | 4480 | Register temp2_reg, |
aoqi@1 | 4481 | Label* L_success, |
aoqi@1 | 4482 | Label* L_failure, |
aoqi@1 | 4483 | bool set_cond_codes) { |
aoqi@1 | 4484 | assert_different_registers(sub_klass, super_klass, temp_reg); |
aoqi@1 | 4485 | if (temp2_reg != noreg) |
aoqi@1 | 4486 | assert_different_registers(sub_klass, super_klass, temp_reg, temp2_reg); |
aoqi@1 | 4487 | else |
aoqi@1 | 4488 | temp2_reg = T9; |
aoqi@1 | 4489 | #define IS_A_TEMP(reg) ((reg) == temp_reg || (reg) == temp2_reg) |
aoqi@1 | 4490 | |
aoqi@1 | 4491 | Label L_fallthrough; |
aoqi@1 | 4492 | int label_nulls = 0; |
aoqi@1 | 4493 | if (L_success == NULL) { L_success = &L_fallthrough; label_nulls++; } |
aoqi@1 | 4494 | if (L_failure == NULL) { L_failure = &L_fallthrough; label_nulls++; } |
aoqi@1 | 4495 | assert(label_nulls <= 1, "at most one NULL in the batch"); |
aoqi@1 | 4496 | |
aoqi@1 | 4497 | // a couple of useful fields in sub_klass: |
aoqi@1 | 4498 | int ss_offset = in_bytes(Klass::secondary_supers_offset()); |
aoqi@1 | 4499 | int sc_offset = in_bytes(Klass::secondary_super_cache_offset()); |
aoqi@1 | 4500 | Address secondary_supers_addr(sub_klass, ss_offset); |
aoqi@1 | 4501 | Address super_cache_addr( sub_klass, sc_offset); |
aoqi@1 | 4502 | |
aoqi@1 | 4503 | // Do a linear scan of the secondary super-klass chain. |
aoqi@1 | 4504 | // This code is rarely used, so simplicity is a virtue here. |
aoqi@1 | 4505 | // The repne_scan instruction uses fixed registers, which we must spill. |
aoqi@1 | 4506 | // Don't worry too much about pre-existing connections with the input regs. |
aoqi@1 | 4507 | |
aoqi@1 | 4508 | #if 0 |
aoqi@1 | 4509 | assert(sub_klass != T9, "killed reg"); // killed by mov(rax, super) |
aoqi@1 | 4510 | assert(sub_klass != T1, "killed reg"); // killed by lea(rcx, &pst_counter) |
aoqi@1 | 4511 | #endif |
aoqi@1 | 4512 | |
aoqi@1 | 4513 | // Get super_klass value into rax (even if it was in rdi or rcx). |
aoqi@1 | 4514 | /* |
aoqi@1 | 4515 | bool pushed_rax = false, pushed_rcx = false, pushed_rdi = false; |
aoqi@1 | 4516 | if (super_klass != rax || UseCompressedOops) { |
aoqi@1 | 4517 | if (!IS_A_TEMP(rax)) { push(rax); pushed_rax = true; } |
aoqi@1 | 4518 | mov(rax, super_klass); |
aoqi@1 | 4519 | } |
aoqi@1 | 4520 | if (!IS_A_TEMP(rcx)) { push(rcx); pushed_rcx = true; } |
aoqi@1 | 4521 | if (!IS_A_TEMP(rdi)) { push(rdi); pushed_rdi = true; } |
aoqi@1 | 4522 | */ |
aoqi@1 | 4523 | #ifndef PRODUCT |
aoqi@1 | 4524 | int* pst_counter = &SharedRuntime::_partial_subtype_ctr; |
aoqi@1 | 4525 | ExternalAddress pst_counter_addr((address) pst_counter); |
aoqi@1 | 4526 | NOT_LP64( incrementl(pst_counter_addr) ); |
aoqi@1 | 4527 | //LP64_ONLY( lea(rcx, pst_counter_addr) ); |
aoqi@1 | 4528 | //LP64_ONLY( incrementl(Address(rcx, 0)) ); |
aoqi@1 | 4529 | #endif //PRODUCT |
aoqi@1 | 4530 | |
aoqi@1 | 4531 | // We will consult the secondary-super array. |
aoqi@1 | 4532 | ld(temp_reg, secondary_supers_addr); |
aoqi@1 | 4533 | // Load the array length. (Positive movl does right thing on LP64.) |
aoqi@1 | 4534 | lw(temp2_reg, Address(temp_reg, Array<Klass*>::length_offset_in_bytes())); |
aoqi@1 | 4535 | // Skip to start of data. |
aoqi@1 | 4536 | daddiu(temp_reg, temp_reg, Array<Klass*>::base_offset_in_bytes()); |
aoqi@1 | 4537 | |
aoqi@1 | 4538 | // Scan RCX words at [RDI] for an occurrence of RAX. |
aoqi@1 | 4539 | // Set NZ/Z based on last compare. |
aoqi@1 | 4540 | // Z flag value will not be set by 'repne' if RCX == 0 since 'repne' does |
aoqi@1 | 4541 | // not change flags (only scas instruction which is repeated sets flags). |
aoqi@1 | 4542 | // Set Z = 0 (not equal) before 'repne' to indicate that class was not found. |
aoqi@1 | 4543 | |
aoqi@1 | 4544 | /* 2013/4/3 Jin: OpenJDK8 never compresses klass pointers in secondary-super array. */ |
aoqi@1 | 4545 | Label Loop, subtype; |
aoqi@1 | 4546 | bind(Loop); |
aoqi@1 | 4547 | beq(temp2_reg, R0, *L_failure); |
aoqi@1 | 4548 | delayed()->nop(); |
aoqi@1 | 4549 | ld(AT, temp_reg, 0); |
aoqi@1 | 4550 | beq(AT, super_klass, subtype); |
aoqi@1 | 4551 | delayed()->daddi(temp_reg, temp_reg, 1 * wordSize); |
aoqi@1 | 4552 | b(Loop); |
aoqi@1 | 4553 | delayed()->daddi(temp2_reg, temp2_reg, -1); |
aoqi@1 | 4554 | |
aoqi@1 | 4555 | bind(subtype); |
aoqi@1 | 4556 | sd(super_klass, super_cache_addr); |
aoqi@1 | 4557 | if (L_success != &L_fallthrough) { |
aoqi@1 | 4558 | b(*L_success); |
aoqi@1 | 4559 | delayed()->nop(); |
aoqi@1 | 4560 | } |
aoqi@1 | 4561 | |
aoqi@1 | 4562 | /* |
aoqi@1 | 4563 | if (set_cond_codes) { |
aoqi@1 | 4564 | // Special hack for the AD files: rdi is guaranteed non-zero. |
aoqi@1 | 4565 | assert(!pushed_rdi, "rdi must be left non-NULL"); |
aoqi@1 | 4566 | // Also, the condition codes are properly set Z/NZ on succeed/failure. |
aoqi@1 | 4567 | } |
aoqi@1 | 4568 | */ |
aoqi@1 | 4569 | // Success. Cache the super we found and proceed in triumph. |
aoqi@1 | 4570 | #undef IS_A_TEMP |
aoqi@1 | 4571 | |
aoqi@1 | 4572 | bind(L_fallthrough); |
aoqi@1 | 4573 | } |
aoqi@1 | 4574 | void MacroAssembler::get_vm_result(Register oop_result, Register java_thread) { |
aoqi@1 | 4575 | ld(oop_result, Address(java_thread, JavaThread::vm_result_offset())); |
aoqi@1 | 4576 | sd(R0, Address(java_thread, JavaThread::vm_result_offset())); |
aoqi@1 | 4577 | verify_oop(oop_result, "broken oop in call_VM_base"); |
aoqi@1 | 4578 | } |
aoqi@1 | 4579 | |
aoqi@1 | 4580 | void MacroAssembler::get_vm_result_2(Register metadata_result, Register java_thread) { |
aoqi@1 | 4581 | ld(metadata_result, Address(java_thread, JavaThread::vm_result_2_offset())); |
aoqi@1 | 4582 | sd(R0, Address(java_thread, JavaThread::vm_result_2_offset())); |
aoqi@1 | 4583 | } |
aoqi@1 | 4584 | |
aoqi@1 | 4585 | Address MacroAssembler::argument_address(RegisterOrConstant arg_slot, |
aoqi@1 | 4586 | int extra_slot_offset) { |
aoqi@1 | 4587 | // cf. TemplateTable::prepare_invoke(), if (load_receiver). |
aoqi@1 | 4588 | int stackElementSize = Interpreter::stackElementSize; |
aoqi@1 | 4589 | int offset = Interpreter::expr_offset_in_bytes(extra_slot_offset+0); |
aoqi@1 | 4590 | #ifdef ASSERT |
aoqi@1 | 4591 | int offset1 = Interpreter::expr_offset_in_bytes(extra_slot_offset+1); |
aoqi@1 | 4592 | assert(offset1 - offset == stackElementSize, "correct arithmetic"); |
aoqi@1 | 4593 | #endif |
aoqi@1 | 4594 | Register scale_reg = NOREG; |
aoqi@1 | 4595 | Address::ScaleFactor scale_factor = Address::no_scale; |
aoqi@1 | 4596 | if (arg_slot.is_constant()) { |
aoqi@1 | 4597 | offset += arg_slot.as_constant() * stackElementSize; |
aoqi@1 | 4598 | } else { |
aoqi@1 | 4599 | scale_reg = arg_slot.as_register(); |
aoqi@1 | 4600 | scale_factor = Address::times_8; |
aoqi@1 | 4601 | } |
aoqi@1 | 4602 | // 2014/07/31 Fu: We don't push RA on stack in prepare_invoke. |
aoqi@1 | 4603 | // offset += wordSize; // return PC is on stack |
aoqi@1 | 4604 | if(scale_reg==NOREG) return Address(SP, offset); |
aoqi@1 | 4605 | else { |
aoqi@1 | 4606 | dsll(scale_reg, scale_reg, scale_factor); |
aoqi@1 | 4607 | daddu(scale_reg, SP, scale_reg); |
aoqi@1 | 4608 | return Address(scale_reg, offset); |
aoqi@1 | 4609 | } |
aoqi@1 | 4610 | } |
aoqi@1 | 4611 | |
aoqi@1 | 4612 | SkipIfEqual::~SkipIfEqual() { |
aoqi@1 | 4613 | _masm->bind(_label); |
aoqi@1 | 4614 | } |
aoqi@1 | 4615 | |
aoqi@1 | 4616 | void MacroAssembler::load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2) { |
aoqi@1 | 4617 | switch (size_in_bytes) { |
aoqi@1 | 4618 | #ifndef _LP64 |
aoqi@1 | 4619 | case 8: |
aoqi@1 | 4620 | assert(dst2 != noreg, "second dest register required"); |
aoqi@1 | 4621 | lw(dst, src); |
aoqi@1 | 4622 | lw(dst2, src.plus_disp(BytesPerInt)); |
aoqi@1 | 4623 | break; |
aoqi@1 | 4624 | #else |
aoqi@1 | 4625 | case 8: ld(dst, src); break; |
aoqi@1 | 4626 | #endif |
aoqi@1 | 4627 | case 4: lw(dst, src); break; |
aoqi@1 | 4628 | case 2: is_signed ? lh(dst, src) : lhu(dst, src); break; |
aoqi@1 | 4629 | case 1: is_signed ? lb( dst, src) : lbu( dst, src); break; |
aoqi@1 | 4630 | default: ShouldNotReachHere(); |
aoqi@1 | 4631 | } |
aoqi@1 | 4632 | } |
aoqi@1 | 4633 | |
aoqi@1 | 4634 | void MacroAssembler::store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2) { |
aoqi@1 | 4635 | switch (size_in_bytes) { |
aoqi@1 | 4636 | #ifndef _LP64 |
aoqi@1 | 4637 | case 8: |
aoqi@1 | 4638 | assert(src2 != noreg, "second source register required"); |
aoqi@1 | 4639 | sw(src, dst); |
aoqi@1 | 4640 | sw(src2, dst.plus_disp(BytesPerInt)); |
aoqi@1 | 4641 | break; |
aoqi@1 | 4642 | #else |
aoqi@1 | 4643 | case 8: sd(src, dst); break; |
aoqi@1 | 4644 | #endif |
aoqi@1 | 4645 | case 4: sw(src, dst); break; |
aoqi@1 | 4646 | case 2: sh(src, dst); break; |
aoqi@1 | 4647 | case 1: sb(src, dst); break; |
aoqi@1 | 4648 | default: ShouldNotReachHere(); |
aoqi@1 | 4649 | } |
aoqi@1 | 4650 | } |
aoqi@1 | 4651 | |
aoqi@1 | 4652 | // Look up the method for a megamorphic invokeinterface call. |
aoqi@1 | 4653 | // The target method is determined by <intf_klass, itable_index>. |
aoqi@1 | 4654 | // The receiver klass is in recv_klass. |
aoqi@1 | 4655 | // On success, the result will be in method_result, and execution falls through. |
aoqi@1 | 4656 | // On failure, execution transfers to the given label. |
aoqi@1 | 4657 | void MacroAssembler::lookup_interface_method(Register recv_klass, |
aoqi@1 | 4658 | Register intf_klass, |
aoqi@1 | 4659 | RegisterOrConstant itable_index, |
aoqi@1 | 4660 | Register method_result, |
aoqi@1 | 4661 | Register scan_temp, |
aoqi@1 | 4662 | Label& L_no_such_interface) { |
aoqi@1 | 4663 | assert_different_registers(recv_klass, intf_klass, method_result, scan_temp); |
aoqi@1 | 4664 | assert(itable_index.is_constant() || itable_index.as_register() == method_result, |
aoqi@1 | 4665 | "caller must use same register for non-constant itable index as for method"); |
aoqi@1 | 4666 | |
aoqi@1 | 4667 | // Compute start of first itableOffsetEntry (which is at the end of the vtable) |
aoqi@1 | 4668 | int vtable_base = InstanceKlass::vtable_start_offset() * wordSize; |
aoqi@1 | 4669 | int itentry_off = itableMethodEntry::method_offset_in_bytes(); |
aoqi@1 | 4670 | int scan_step = itableOffsetEntry::size() * wordSize; |
aoqi@1 | 4671 | int vte_size = vtableEntry::size() * wordSize; |
aoqi@1 | 4672 | Address::ScaleFactor times_vte_scale = Address::times_ptr; |
aoqi@1 | 4673 | assert(vte_size == wordSize, "else adjust times_vte_scale"); |
aoqi@1 | 4674 | |
aoqi@1 | 4675 | lw(scan_temp, Address(recv_klass, InstanceKlass::vtable_length_offset() * wordSize)); |
aoqi@1 | 4676 | |
aoqi@1 | 4677 | // %%% Could store the aligned, prescaled offset in the klassoop. |
aoqi@1 | 4678 | // lea(scan_temp, Address(recv_klass, scan_temp, times_vte_scale, vtable_base)); |
aoqi@1 | 4679 | dsll(scan_temp, scan_temp, times_vte_scale); |
aoqi@1 | 4680 | daddu(scan_temp, recv_klass, scan_temp); |
aoqi@1 | 4681 | daddiu(scan_temp, scan_temp, vtable_base); |
aoqi@1 | 4682 | if (HeapWordsPerLong > 1) { |
aoqi@1 | 4683 | // Round up to align_object_offset boundary |
aoqi@1 | 4684 | // see code for InstanceKlass::start_of_itable! |
aoqi@1 | 4685 | round_to(scan_temp, BytesPerLong); |
aoqi@1 | 4686 | } |
aoqi@1 | 4687 | |
aoqi@1 | 4688 | // Adjust recv_klass by scaled itable_index, so we can free itable_index. |
aoqi@1 | 4689 | assert(itableMethodEntry::size() * wordSize == wordSize, "adjust the scaling in the code below"); |
aoqi@1 | 4690 | // lea(recv_klass, Address(recv_klass, itable_index, Address::times_ptr, itentry_off)); |
aoqi@1 | 4691 | if (itable_index.is_constant()) { |
fujie@368 | 4692 | set64(AT, (int)itable_index.is_constant()); |
aoqi@1 | 4693 | dsll(AT, AT, (int)Address::times_ptr); |
aoqi@1 | 4694 | } else { |
aoqi@1 | 4695 | dsll(AT, itable_index.as_register(), (int)Address::times_ptr); |
aoqi@1 | 4696 | } |
aoqi@1 | 4697 | daddu(AT, AT, recv_klass); |
aoqi@1 | 4698 | daddiu(recv_klass, AT, itentry_off); |
aoqi@1 | 4699 | |
aoqi@1 | 4700 | // for (scan = klass->itable(); scan->interface() != NULL; scan += scan_step) { |
aoqi@1 | 4701 | // if (scan->interface() == intf) { |
aoqi@1 | 4702 | // result = (klass + scan->offset() + itable_index); |
aoqi@1 | 4703 | // } |
aoqi@1 | 4704 | // } |
aoqi@1 | 4705 | Label search, found_method; |
aoqi@1 | 4706 | |
aoqi@1 | 4707 | for (int peel = 1; peel >= 0; peel--) { |
aoqi@1 | 4708 | ld(method_result, Address(scan_temp, itableOffsetEntry::interface_offset_in_bytes())); |
aoqi@1 | 4709 | |
aoqi@1 | 4710 | if (peel) { |
aoqi@1 | 4711 | beq(intf_klass, method_result, found_method); |
aoqi@1 | 4712 | nop(); |
aoqi@1 | 4713 | } else { |
aoqi@1 | 4714 | bne(intf_klass, method_result, search); |
aoqi@1 | 4715 | nop(); |
aoqi@1 | 4716 | // (invert the test to fall through to found_method...) |
aoqi@1 | 4717 | } |
aoqi@1 | 4718 | |
aoqi@1 | 4719 | if (!peel) break; |
aoqi@1 | 4720 | |
aoqi@1 | 4721 | bind(search); |
aoqi@1 | 4722 | |
aoqi@1 | 4723 | // Check that the previous entry is non-null. A null entry means that |
aoqi@1 | 4724 | // the receiver class doesn't implement the interface, and wasn't the |
aoqi@1 | 4725 | // same as when the caller was compiled. |
aoqi@1 | 4726 | beq(method_result, R0, L_no_such_interface); |
aoqi@1 | 4727 | nop(); |
aoqi@1 | 4728 | daddiu(scan_temp, scan_temp, scan_step); |
aoqi@1 | 4729 | } |
aoqi@1 | 4730 | |
aoqi@1 | 4731 | bind(found_method); |
aoqi@1 | 4732 | |
aoqi@1 | 4733 | // Got a hit. |
aoqi@1 | 4734 | lw(scan_temp, Address(scan_temp, itableOffsetEntry::offset_offset_in_bytes())); |
lifangyuan@143 | 4735 | //ld(method_result, Address(recv_klass, scan_temp, Address::times_1)); |
lifangyuan@143 | 4736 | if(UseLoongsonISA) { |
lifangyuan@143 | 4737 | gsldx(method_result, recv_klass, scan_temp, 0); |
lifangyuan@143 | 4738 | } else { |
lifangyuan@143 | 4739 | daddu(AT, recv_klass, scan_temp); |
lifangyuan@143 | 4740 | ld(method_result, AT); |
lifangyuan@143 | 4741 | } |
aoqi@1 | 4742 | } |
aoqi@1 | 4743 | |
aoqi@1 | 4744 | |
aoqi@1 | 4745 | // virtual method calling |
aoqi@1 | 4746 | void MacroAssembler::lookup_virtual_method(Register recv_klass, |
aoqi@1 | 4747 | RegisterOrConstant vtable_index, |
aoqi@1 | 4748 | Register method_result) { |
aoqi@1 | 4749 | Register tmp = GP; |
aoqi@1 | 4750 | push(tmp); |
aoqi@1 | 4751 | |
aoqi@1 | 4752 | if (vtable_index.is_constant()) { |
aoqi@1 | 4753 | assert_different_registers(recv_klass, method_result, tmp); |
aoqi@1 | 4754 | } else { |
aoqi@1 | 4755 | assert_different_registers(recv_klass, method_result, vtable_index.as_register(), tmp); |
aoqi@1 | 4756 | } |
aoqi@1 | 4757 | const int base = InstanceKlass::vtable_start_offset() * wordSize; |
aoqi@1 | 4758 | assert(vtableEntry::size() * wordSize == wordSize, "else adjust the scaling in the code below"); |
aoqi@1 | 4759 | /* |
aoqi@1 | 4760 | Address vtable_entry_addr(recv_klass, |
aoqi@1 | 4761 | vtable_index, Address::times_ptr, |
aoqi@1 | 4762 | base + vtableEntry::method_offset_in_bytes()); |
aoqi@1 | 4763 | */ |
aoqi@1 | 4764 | if (vtable_index.is_constant()) { |
fujie@368 | 4765 | set64(AT, vtable_index.as_constant()); |
aoqi@1 | 4766 | dsll(AT, AT, (int)Address::times_ptr); |
aoqi@1 | 4767 | } else { |
aoqi@1 | 4768 | dsll(AT, vtable_index.as_register(), (int)Address::times_ptr); |
aoqi@1 | 4769 | } |
fujie@368 | 4770 | set64(tmp, base + vtableEntry::method_offset_in_bytes()); |
aoqi@1 | 4771 | daddu(tmp, tmp, AT); |
aoqi@1 | 4772 | daddu(tmp, tmp, recv_klass); |
aoqi@1 | 4773 | ld(method_result, tmp, 0); |
aoqi@1 | 4774 | |
aoqi@1 | 4775 | pop(tmp); |
aoqi@1 | 4776 | } |
aoqi@1 | 4777 |