src/cpu/x86/vm/interp_masm_x86.hpp

Wed, 17 Jun 2015 17:48:25 -0700

author
ascarpino
date
Wed, 17 Jun 2015 17:48:25 -0700
changeset 9788
44ef77ad417c
parent 8368
32b682649973
permissions
-rw-r--r--

8073108: Use x86 and SPARC CPU instructions for GHASH acceleration
Reviewed-by: kvn, jrose, phh

aoqi@0 1 /*
kevinw@8368 2 * Copyright (c) 2013, 2016, Oracle and/or its affiliates. All rights reserved.
aoqi@0 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0 4 *
aoqi@0 5 * This code is free software; you can redistribute it and/or modify it
aoqi@0 6 * under the terms of the GNU General Public License version 2 only, as
aoqi@0 7 * published by the Free Software Foundation.
aoqi@0 8 *
aoqi@0 9 * This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0 12 * version 2 for more details (a copy is included in the LICENSE file that
aoqi@0 13 * accompanied this code).
aoqi@0 14 *
aoqi@0 15 * You should have received a copy of the GNU General Public License version
aoqi@0 16 * 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0 18 *
aoqi@0 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0 20 * or visit www.oracle.com if you need additional information or have any
aoqi@0 21 * questions.
aoqi@0 22 *
aoqi@0 23 */
aoqi@0 24
aoqi@0 25 #ifndef CPU_X86_VM_INTERP_MASM_X86_HPP
aoqi@0 26 #define CPU_X86_VM_INTERP_MASM_X86_HPP
aoqi@0 27
aoqi@0 28 #include "asm/macroAssembler.hpp"
aoqi@0 29 #include "asm/macroAssembler.inline.hpp"
aoqi@0 30 #include "interpreter/invocationCounter.hpp"
aoqi@0 31 #include "runtime/frame.hpp"
aoqi@0 32
aoqi@0 33 // This file specializes the assember with interpreter-specific macros
aoqi@0 34
aoqi@0 35
aoqi@0 36 class InterpreterMacroAssembler: public MacroAssembler {
aoqi@0 37
aoqi@0 38 #ifdef TARGET_ARCH_MODEL_x86_32
aoqi@0 39 # include "interp_masm_x86_32.hpp"
aoqi@0 40 #endif
aoqi@0 41 #ifdef TARGET_ARCH_MODEL_x86_64
aoqi@0 42 # include "interp_masm_x86_64.hpp"
aoqi@0 43 #endif
aoqi@0 44
aoqi@0 45 private:
aoqi@0 46
aoqi@0 47 Register _locals_register; // register that contains the pointer to the locals
aoqi@0 48 Register _bcp_register; // register that contains the bcp
aoqi@0 49
aoqi@0 50 public:
kevinw@8368 51 // narrow int return value
kevinw@8368 52 void narrow(Register result);
kevinw@8368 53
aoqi@0 54 #ifndef CC_INTERP
aoqi@0 55 void profile_obj_type(Register obj, const Address& mdo_addr);
aoqi@0 56 void profile_arguments_type(Register mdp, Register callee, Register tmp, bool is_virtual);
aoqi@0 57 void profile_return_type(Register mdp, Register ret, Register tmp);
aoqi@0 58 void profile_parameters_type(Register mdp, Register tmp1, Register tmp2);
aoqi@0 59 #endif /* !CC_INTERP */
aoqi@0 60
aoqi@0 61 };
aoqi@0 62
aoqi@0 63 #endif // CPU_X86_VM_INTERP_MASM_X86_HPP

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