src/cpu/x86/vm/interp_masm_x86_64.hpp

Thu, 03 Nov 2011 04:12:49 -0700

author
twisti
date
Thu, 03 Nov 2011 04:12:49 -0700
changeset 3252
448691f285a5
parent 3050
fdb992d83a87
child 3826
2fe087c3e814
permissions
-rw-r--r--

7106944: assert(_pc == *pc_addr) failed may be too strong
Reviewed-by: kvn, never

duke@435 1 /*
never@2868 2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
duke@435 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435 4 *
duke@435 5 * This code is free software; you can redistribute it and/or modify it
duke@435 6 * under the terms of the GNU General Public License version 2 only, as
duke@435 7 * published by the Free Software Foundation.
duke@435 8 *
duke@435 9 * This code is distributed in the hope that it will be useful, but WITHOUT
duke@435 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435 12 * version 2 for more details (a copy is included in the LICENSE file that
duke@435 13 * accompanied this code).
duke@435 14 *
duke@435 15 * You should have received a copy of the GNU General Public License version
duke@435 16 * 2 along with this work; if not, write to the Free Software Foundation,
duke@435 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435 18 *
trims@1907 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907 20 * or visit www.oracle.com if you need additional information or have any
trims@1907 21 * questions.
duke@435 22 *
duke@435 23 */
duke@435 24
stefank@2314 25 #ifndef CPU_X86_VM_INTERP_MASM_X86_64_HPP
stefank@2314 26 #define CPU_X86_VM_INTERP_MASM_X86_64_HPP
stefank@2314 27
stefank@2314 28 #include "assembler_x86.inline.hpp"
stefank@2314 29 #include "interpreter/invocationCounter.hpp"
stefank@2314 30
duke@435 31 // This file specializes the assember with interpreter-specific macros
duke@435 32
duke@435 33
never@739 34 class InterpreterMacroAssembler: public MacroAssembler {
never@739 35 #ifndef CC_INTERP
duke@435 36 protected:
duke@435 37 // Interpreter specific version of call_VM_base
duke@435 38 virtual void call_VM_leaf_base(address entry_point,
duke@435 39 int number_of_arguments);
duke@435 40
duke@435 41 virtual void call_VM_base(Register oop_result,
duke@435 42 Register java_thread,
duke@435 43 Register last_java_sp,
duke@435 44 address entry_point,
duke@435 45 int number_of_arguments,
duke@435 46 bool check_exceptions);
duke@435 47
duke@435 48 virtual void check_and_handle_popframe(Register java_thread);
duke@435 49 virtual void check_and_handle_earlyret(Register java_thread);
duke@435 50
duke@435 51 // base routine for all dispatches
duke@435 52 void dispatch_base(TosState state, address* table, bool verifyoop = true);
never@739 53 #endif // CC_INTERP
duke@435 54
duke@435 55 public:
never@739 56 InterpreterMacroAssembler(CodeBuffer* code) : MacroAssembler(code) {}
duke@435 57
duke@435 58 void load_earlyret_value(TosState state);
duke@435 59
never@739 60 #ifdef CC_INTERP
never@739 61 void save_bcp() { /* not needed in c++ interpreter and harmless */ }
never@739 62 void restore_bcp() { /* not needed in c++ interpreter and harmless */ }
never@739 63
never@739 64 // Helpers for runtime call arguments/results
never@739 65 void get_method(Register reg);
never@739 66
never@739 67 #else
never@739 68
duke@435 69 // Interpreter-specific registers
never@739 70 void save_bcp() {
never@739 71 movptr(Address(rbp, frame::interpreter_frame_bcx_offset * wordSize), r13);
duke@435 72 }
duke@435 73
never@739 74 void restore_bcp() {
never@739 75 movptr(r13, Address(rbp, frame::interpreter_frame_bcx_offset * wordSize));
duke@435 76 }
duke@435 77
never@739 78 void restore_locals() {
never@739 79 movptr(r14, Address(rbp, frame::interpreter_frame_locals_offset * wordSize));
duke@435 80 }
duke@435 81
duke@435 82 // Helpers for runtime call arguments/results
never@739 83 void get_method(Register reg) {
never@739 84 movptr(reg, Address(rbp, frame::interpreter_frame_method_offset * wordSize));
duke@435 85 }
duke@435 86
never@739 87 void get_constant_pool(Register reg) {
duke@435 88 get_method(reg);
never@739 89 movptr(reg, Address(reg, methodOopDesc::constants_offset()));
duke@435 90 }
duke@435 91
never@739 92 void get_constant_pool_cache(Register reg) {
duke@435 93 get_constant_pool(reg);
never@739 94 movptr(reg, Address(reg, constantPoolOopDesc::cache_offset_in_bytes()));
duke@435 95 }
duke@435 96
never@739 97 void get_cpool_and_tags(Register cpool, Register tags) {
duke@435 98 get_constant_pool(cpool);
never@739 99 movptr(tags, Address(cpool, constantPoolOopDesc::tags_offset_in_bytes()));
duke@435 100 }
duke@435 101
duke@435 102 void get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset);
twisti@3050 103 void get_cache_and_index_at_bcp(Register cache, Register index, int bcp_offset, size_t index_size = sizeof(u2));
twisti@3050 104 void get_cache_and_index_and_bytecode_at_bcp(Register cache, Register index, Register bytecode, int byte_no, int bcp_offset, size_t index_size = sizeof(u2));
twisti@3050 105 void get_cache_entry_pointer_at_bcp(Register cache, Register tmp, int bcp_offset, size_t index_size = sizeof(u2));
jrose@1920 106 void get_cache_index_at_bcp(Register index, int bcp_offset, size_t index_size = sizeof(u2));
duke@435 107
duke@435 108 void pop_ptr(Register r = rax);
duke@435 109 void pop_i(Register r = rax);
duke@435 110 void pop_l(Register r = rax);
duke@435 111 void pop_f(XMMRegister r = xmm0);
duke@435 112 void pop_d(XMMRegister r = xmm0);
duke@435 113 void push_ptr(Register r = rax);
duke@435 114 void push_i(Register r = rax);
duke@435 115 void push_l(Register r = rax);
duke@435 116 void push_f(XMMRegister r = xmm0);
duke@435 117 void push_d(XMMRegister r = xmm0);
duke@435 118
never@739 119 void pop(Register r ) { ((MacroAssembler*)this)->pop(r); }
never@739 120
never@739 121 void push(Register r ) { ((MacroAssembler*)this)->push(r); }
never@739 122 void push(int32_t imm ) { ((MacroAssembler*)this)->push(imm); }
never@739 123
duke@435 124 void pop(TosState state); // transition vtos -> state
duke@435 125 void push(TosState state); // transition state -> vtos
duke@435 126
twisti@1861 127 void empty_expression_stack() {
never@739 128 movptr(rsp, Address(rbp, frame::interpreter_frame_monitor_block_top_offset * wordSize));
duke@435 129 // NULL last_sp until next java call
never@739 130 movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);
duke@435 131 }
duke@435 132
twisti@1861 133 // Helpers for swap and dup
twisti@1861 134 void load_ptr(int n, Register val);
twisti@1861 135 void store_ptr(int n, Register val);
twisti@1861 136
duke@435 137 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
duke@435 138 // a subtype of super_klass.
duke@435 139 void gen_subtype_check( Register sub_klass, Label &ok_is_subtype );
duke@435 140
duke@435 141 // Dispatching
duke@435 142 void dispatch_prolog(TosState state, int step = 0);
duke@435 143 void dispatch_epilog(TosState state, int step = 0);
duke@435 144 // dispatch via ebx (assume ebx is loaded already)
duke@435 145 void dispatch_only(TosState state);
duke@435 146 // dispatch normal table via ebx (assume ebx is loaded already)
duke@435 147 void dispatch_only_normal(TosState state);
duke@435 148 void dispatch_only_noverify(TosState state);
duke@435 149 // load ebx from [esi + step] and dispatch via ebx
duke@435 150 void dispatch_next(TosState state, int step = 0);
duke@435 151 // load ebx from [esi] and dispatch via ebx and table
duke@435 152 void dispatch_via (TosState state, address* table);
duke@435 153
duke@435 154 // jump to an invoked target
jrose@1145 155 void prepare_to_jump_from_interpreted();
duke@435 156 void jump_from_interpreted(Register method, Register temp);
duke@435 157
duke@435 158
duke@435 159 // Returning from interpreted functions
duke@435 160 //
duke@435 161 // Removes the current activation (incl. unlocking of monitors)
duke@435 162 // and sets up the return address. This code is also used for
duke@435 163 // exception unwindwing. In that case, we do not want to throw
duke@435 164 // IllegalMonitorStateExceptions, since that might get us into an
duke@435 165 // infinite rethrow exception loop.
duke@435 166 // Additionally this code is used for popFrame and earlyReturn.
duke@435 167 // In popFrame case we want to skip throwing an exception,
duke@435 168 // installing an exception, and notifying jvmdi.
duke@435 169 // In earlyReturn case we only want to skip throwing an exception
duke@435 170 // and installing an exception.
duke@435 171 void remove_activation(TosState state, Register ret_addr,
duke@435 172 bool throw_monitor_exception = true,
duke@435 173 bool install_monitor_exception = true,
duke@435 174 bool notify_jvmdi = true);
never@739 175 #endif // CC_INTERP
duke@435 176
duke@435 177 // Object locking
duke@435 178 void lock_object (Register lock_reg);
duke@435 179 void unlock_object(Register lock_reg);
duke@435 180
never@739 181 #ifndef CC_INTERP
never@739 182
duke@435 183 // Interpreter profiling operations
duke@435 184 void set_method_data_pointer_for_bcp();
duke@435 185 void test_method_data_pointer(Register mdp, Label& zero_continue);
duke@435 186 void verify_method_data_pointer();
duke@435 187
duke@435 188 void set_mdp_data_at(Register mdp_in, int constant, Register value);
duke@435 189 void increment_mdp_data_at(Address data, bool decrement = false);
duke@435 190 void increment_mdp_data_at(Register mdp_in, int constant,
duke@435 191 bool decrement = false);
duke@435 192 void increment_mdp_data_at(Register mdp_in, Register reg, int constant,
duke@435 193 bool decrement = false);
iveresov@2138 194 void increment_mask_and_jump(Address counter_addr,
iveresov@2138 195 int increment, int mask,
iveresov@2138 196 Register scratch, bool preloaded,
iveresov@2138 197 Condition cond, Label* where);
duke@435 198 void set_mdp_flag_at(Register mdp_in, int flag_constant);
duke@435 199 void test_mdp_data_at(Register mdp_in, int offset, Register value,
duke@435 200 Register test_value_out,
duke@435 201 Label& not_equal_continue);
duke@435 202
duke@435 203 void record_klass_in_profile(Register receiver, Register mdp,
kvn@1641 204 Register reg2, bool is_virtual_call);
duke@435 205 void record_klass_in_profile_helper(Register receiver, Register mdp,
kvn@1641 206 Register reg2, int start_row,
kvn@1641 207 Label& done, bool is_virtual_call);
duke@435 208
duke@435 209 void update_mdp_by_offset(Register mdp_in, int offset_of_offset);
duke@435 210 void update_mdp_by_offset(Register mdp_in, Register reg, int offset_of_disp);
duke@435 211 void update_mdp_by_constant(Register mdp_in, int constant);
duke@435 212 void update_mdp_for_ret(Register return_bci);
duke@435 213
duke@435 214 void profile_taken_branch(Register mdp, Register bumped_count);
duke@435 215 void profile_not_taken_branch(Register mdp);
duke@435 216 void profile_call(Register mdp);
duke@435 217 void profile_final_call(Register mdp);
duke@435 218 void profile_virtual_call(Register receiver, Register mdp,
twisti@1543 219 Register scratch2,
twisti@1543 220 bool receiver_can_be_null = false);
duke@435 221 void profile_ret(Register return_bci, Register mdp);
duke@435 222 void profile_null_seen(Register mdp);
duke@435 223 void profile_typecheck(Register mdp, Register klass, Register scratch);
duke@435 224 void profile_typecheck_failed(Register mdp);
duke@435 225 void profile_switch_default(Register mdp);
duke@435 226 void profile_switch_case(Register index_in_scratch, Register mdp,
duke@435 227 Register scratch2);
duke@435 228
duke@435 229 // Debugging
duke@435 230 // only if +VerifyOops && state == atos
duke@435 231 void verify_oop(Register reg, TosState state = atos);
duke@435 232 // only if +VerifyFPU && (state == ftos || state == dtos)
duke@435 233 void verify_FPU(int stack_depth, TosState state = ftos);
duke@435 234
never@739 235 #endif // !CC_INTERP
never@739 236
duke@435 237 typedef enum { NotifyJVMTI, SkipNotifyJVMTI } NotifyMethodExitMode;
duke@435 238
duke@435 239 // support for jvmti/dtrace
duke@435 240 void notify_method_entry();
duke@435 241 void notify_method_exit(TosState state, NotifyMethodExitMode mode);
duke@435 242 };
stefank@2314 243
stefank@2314 244 #endif // CPU_X86_VM_INTERP_MASM_X86_64_HPP

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