Wed, 21 May 2008 16:31:35 -0700
6703888: Compressed Oops: use the 32-bits gap after klass in a object
Summary: Use the gap also for a narrow oop field and a boxing object value.
Reviewed-by: coleenp, never
duke@435 | 1 | /* |
duke@435 | 2 | * Copyright 1999-2006 Sun Microsystems, Inc. All Rights Reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
duke@435 | 19 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
duke@435 | 20 | * CA 95054 USA or visit www.sun.com if you need additional information or |
duke@435 | 21 | * have any questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
duke@435 | 25 | # include "incls/_precompiled.incl" |
duke@435 | 26 | # include "incls/_c1_FrameMap_x86.cpp.incl" |
duke@435 | 27 | |
duke@435 | 28 | const int FrameMap::pd_c_runtime_reserved_arg_size = 0; |
duke@435 | 29 | |
duke@435 | 30 | LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) { |
duke@435 | 31 | LIR_Opr opr = LIR_OprFact::illegalOpr; |
duke@435 | 32 | VMReg r_1 = reg->first(); |
duke@435 | 33 | VMReg r_2 = reg->second(); |
duke@435 | 34 | if (r_1->is_stack()) { |
duke@435 | 35 | // Convert stack slot to an SP offset |
duke@435 | 36 | // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value |
duke@435 | 37 | // so we must add it in here. |
duke@435 | 38 | int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; |
duke@435 | 39 | opr = LIR_OprFact::address(new LIR_Address(rsp_opr, st_off, type)); |
duke@435 | 40 | } else if (r_1->is_Register()) { |
duke@435 | 41 | Register reg = r_1->as_Register(); |
duke@435 | 42 | if (r_2->is_Register()) { |
duke@435 | 43 | Register reg2 = r_2->as_Register(); |
duke@435 | 44 | opr = as_long_opr(reg2, reg); |
duke@435 | 45 | } else if (type == T_OBJECT) { |
duke@435 | 46 | opr = as_oop_opr(reg); |
duke@435 | 47 | } else { |
duke@435 | 48 | opr = as_opr(reg); |
duke@435 | 49 | } |
duke@435 | 50 | } else if (r_1->is_FloatRegister()) { |
duke@435 | 51 | assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); |
duke@435 | 52 | int num = r_1->as_FloatRegister()->encoding(); |
duke@435 | 53 | if (type == T_FLOAT) { |
duke@435 | 54 | opr = LIR_OprFact::single_fpu(num); |
duke@435 | 55 | } else { |
duke@435 | 56 | opr = LIR_OprFact::double_fpu(num); |
duke@435 | 57 | } |
duke@435 | 58 | } else if (r_1->is_XMMRegister()) { |
duke@435 | 59 | assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); |
duke@435 | 60 | int num = r_1->as_XMMRegister()->encoding(); |
duke@435 | 61 | if (type == T_FLOAT) { |
duke@435 | 62 | opr = LIR_OprFact::single_xmm(num); |
duke@435 | 63 | } else { |
duke@435 | 64 | opr = LIR_OprFact::double_xmm(num); |
duke@435 | 65 | } |
duke@435 | 66 | } else { |
duke@435 | 67 | ShouldNotReachHere(); |
duke@435 | 68 | } |
duke@435 | 69 | return opr; |
duke@435 | 70 | } |
duke@435 | 71 | |
duke@435 | 72 | |
duke@435 | 73 | LIR_Opr FrameMap::rsi_opr; |
duke@435 | 74 | LIR_Opr FrameMap::rdi_opr; |
duke@435 | 75 | LIR_Opr FrameMap::rbx_opr; |
duke@435 | 76 | LIR_Opr FrameMap::rax_opr; |
duke@435 | 77 | LIR_Opr FrameMap::rdx_opr; |
duke@435 | 78 | LIR_Opr FrameMap::rcx_opr; |
duke@435 | 79 | LIR_Opr FrameMap::rsp_opr; |
duke@435 | 80 | LIR_Opr FrameMap::rbp_opr; |
duke@435 | 81 | |
duke@435 | 82 | LIR_Opr FrameMap::receiver_opr; |
duke@435 | 83 | |
duke@435 | 84 | LIR_Opr FrameMap::rsi_oop_opr; |
duke@435 | 85 | LIR_Opr FrameMap::rdi_oop_opr; |
duke@435 | 86 | LIR_Opr FrameMap::rbx_oop_opr; |
duke@435 | 87 | LIR_Opr FrameMap::rax_oop_opr; |
duke@435 | 88 | LIR_Opr FrameMap::rdx_oop_opr; |
duke@435 | 89 | LIR_Opr FrameMap::rcx_oop_opr; |
duke@435 | 90 | |
duke@435 | 91 | LIR_Opr FrameMap::rax_rdx_long_opr; |
duke@435 | 92 | LIR_Opr FrameMap::rbx_rcx_long_opr; |
duke@435 | 93 | LIR_Opr FrameMap::fpu0_float_opr; |
duke@435 | 94 | LIR_Opr FrameMap::fpu0_double_opr; |
duke@435 | 95 | LIR_Opr FrameMap::xmm0_float_opr; |
duke@435 | 96 | LIR_Opr FrameMap::xmm0_double_opr; |
duke@435 | 97 | |
duke@435 | 98 | LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; |
duke@435 | 99 | LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, }; |
duke@435 | 100 | LIR_Opr FrameMap::_caller_save_xmm_regs[] = { 0, }; |
duke@435 | 101 | |
duke@435 | 102 | XMMRegister FrameMap::_xmm_regs [8] = { 0, }; |
duke@435 | 103 | |
duke@435 | 104 | XMMRegister FrameMap::nr2xmmreg(int rnr) { |
duke@435 | 105 | assert(_init_done, "tables not initialized"); |
duke@435 | 106 | return _xmm_regs[rnr]; |
duke@435 | 107 | } |
duke@435 | 108 | |
duke@435 | 109 | //-------------------------------------------------------- |
duke@435 | 110 | // FrameMap |
duke@435 | 111 | //-------------------------------------------------------- |
duke@435 | 112 | |
duke@435 | 113 | void FrameMap::init() { |
duke@435 | 114 | if (_init_done) return; |
duke@435 | 115 | |
duke@435 | 116 | assert(nof_cpu_regs == 8, "wrong number of CPU registers"); |
duke@435 | 117 | map_register(0, rsi); rsi_opr = LIR_OprFact::single_cpu(0); rsi_oop_opr = LIR_OprFact::single_cpu_oop(0); |
duke@435 | 118 | map_register(1, rdi); rdi_opr = LIR_OprFact::single_cpu(1); rdi_oop_opr = LIR_OprFact::single_cpu_oop(1); |
duke@435 | 119 | map_register(2, rbx); rbx_opr = LIR_OprFact::single_cpu(2); rbx_oop_opr = LIR_OprFact::single_cpu_oop(2); |
duke@435 | 120 | map_register(3, rax); rax_opr = LIR_OprFact::single_cpu(3); rax_oop_opr = LIR_OprFact::single_cpu_oop(3); |
duke@435 | 121 | map_register(4, rdx); rdx_opr = LIR_OprFact::single_cpu(4); rdx_oop_opr = LIR_OprFact::single_cpu_oop(4); |
duke@435 | 122 | map_register(5, rcx); rcx_opr = LIR_OprFact::single_cpu(5); rcx_oop_opr = LIR_OprFact::single_cpu_oop(5); |
duke@435 | 123 | map_register(6, rsp); rsp_opr = LIR_OprFact::single_cpu(6); |
duke@435 | 124 | map_register(7, rbp); rbp_opr = LIR_OprFact::single_cpu(7); |
duke@435 | 125 | |
duke@435 | 126 | rax_rdx_long_opr = LIR_OprFact::double_cpu(3 /*eax*/, 4 /*edx*/); |
duke@435 | 127 | rbx_rcx_long_opr = LIR_OprFact::double_cpu(2 /*ebx*/, 5 /*ecx*/); |
duke@435 | 128 | fpu0_float_opr = LIR_OprFact::single_fpu(0); |
duke@435 | 129 | fpu0_double_opr = LIR_OprFact::double_fpu(0); |
duke@435 | 130 | xmm0_float_opr = LIR_OprFact::single_xmm(0); |
duke@435 | 131 | xmm0_double_opr = LIR_OprFact::double_xmm(0); |
duke@435 | 132 | |
duke@435 | 133 | _caller_save_cpu_regs[0] = rsi_opr; |
duke@435 | 134 | _caller_save_cpu_regs[1] = rdi_opr; |
duke@435 | 135 | _caller_save_cpu_regs[2] = rbx_opr; |
duke@435 | 136 | _caller_save_cpu_regs[3] = rax_opr; |
duke@435 | 137 | _caller_save_cpu_regs[4] = rdx_opr; |
duke@435 | 138 | _caller_save_cpu_regs[5] = rcx_opr; |
duke@435 | 139 | |
duke@435 | 140 | |
duke@435 | 141 | _xmm_regs[0] = xmm0; |
duke@435 | 142 | _xmm_regs[1] = xmm1; |
duke@435 | 143 | _xmm_regs[2] = xmm2; |
duke@435 | 144 | _xmm_regs[3] = xmm3; |
duke@435 | 145 | _xmm_regs[4] = xmm4; |
duke@435 | 146 | _xmm_regs[5] = xmm5; |
duke@435 | 147 | _xmm_regs[6] = xmm6; |
duke@435 | 148 | _xmm_regs[7] = xmm7; |
duke@435 | 149 | |
duke@435 | 150 | for (int i = 0; i < 8; i++) { |
duke@435 | 151 | _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); |
duke@435 | 152 | _caller_save_xmm_regs[i] = LIR_OprFact::single_xmm(i); |
duke@435 | 153 | } |
duke@435 | 154 | |
duke@435 | 155 | _init_done = true; |
duke@435 | 156 | |
duke@435 | 157 | VMRegPair regs; |
duke@435 | 158 | BasicType sig_bt = T_OBJECT; |
duke@435 | 159 | SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true); |
duke@435 | 160 | receiver_opr = as_oop_opr(regs.first()->as_Register()); |
duke@435 | 161 | assert(receiver_opr == rcx_oop_opr, "rcvr ought to be rcx"); |
duke@435 | 162 | } |
duke@435 | 163 | |
duke@435 | 164 | |
duke@435 | 165 | Address FrameMap::make_new_address(ByteSize sp_offset) const { |
duke@435 | 166 | // for rbp, based address use this: |
duke@435 | 167 | // return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4); |
duke@435 | 168 | return Address(rsp, in_bytes(sp_offset)); |
duke@435 | 169 | } |
duke@435 | 170 | |
duke@435 | 171 | |
duke@435 | 172 | // ----------------mapping----------------------- |
duke@435 | 173 | // all mapping is based on rbp, addressing, except for simple leaf methods where we access |
duke@435 | 174 | // the locals rsp based (and no frame is built) |
duke@435 | 175 | |
duke@435 | 176 | |
duke@435 | 177 | // Frame for simple leaf methods (quick entries) |
duke@435 | 178 | // |
duke@435 | 179 | // +----------+ |
duke@435 | 180 | // | ret addr | <- TOS |
duke@435 | 181 | // +----------+ |
duke@435 | 182 | // | args | |
duke@435 | 183 | // | ...... | |
duke@435 | 184 | |
duke@435 | 185 | // Frame for standard methods |
duke@435 | 186 | // |
duke@435 | 187 | // | .........| <- TOS |
duke@435 | 188 | // | locals | |
duke@435 | 189 | // +----------+ |
duke@435 | 190 | // | old rbp, | <- EBP |
duke@435 | 191 | // +----------+ |
duke@435 | 192 | // | ret addr | |
duke@435 | 193 | // +----------+ |
duke@435 | 194 | // | args | |
duke@435 | 195 | // | .........| |
duke@435 | 196 | |
duke@435 | 197 | |
duke@435 | 198 | // For OopMaps, map a local variable or spill index to an VMRegImpl name. |
duke@435 | 199 | // This is the offset from sp() in the frame of the slot for the index, |
duke@435 | 200 | // skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.) |
duke@435 | 201 | // |
duke@435 | 202 | // framesize + |
duke@435 | 203 | // stack0 stack0 0 <- VMReg |
duke@435 | 204 | // | | <registers> | |
duke@435 | 205 | // ...........|..............|.............| |
duke@435 | 206 | // 0 1 2 3 x x 4 5 6 ... | <- local indices |
duke@435 | 207 | // ^ ^ sp() ( x x indicate link |
duke@435 | 208 | // | | and return addr) |
duke@435 | 209 | // arguments non-argument locals |
duke@435 | 210 | |
duke@435 | 211 | |
duke@435 | 212 | VMReg FrameMap::fpu_regname (int n) { |
duke@435 | 213 | // Return the OptoReg name for the fpu stack slot "n" |
duke@435 | 214 | // A spilled fpu stack slot comprises to two single-word OptoReg's. |
duke@435 | 215 | return as_FloatRegister(n)->as_VMReg(); |
duke@435 | 216 | } |
duke@435 | 217 | |
duke@435 | 218 | LIR_Opr FrameMap::stack_pointer() { |
duke@435 | 219 | return FrameMap::rsp_opr; |
duke@435 | 220 | } |
duke@435 | 221 | |
duke@435 | 222 | |
duke@435 | 223 | bool FrameMap::validate_frame() { |
duke@435 | 224 | return true; |
duke@435 | 225 | } |