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src/cpu/ppc/vm/icache_ppc.cpp@41b780b43b74 (annotated)

src/cpu/ppc/vm/icache_ppc.cpp

Wed, 27 Nov 2013 16:16:21 -0800

author

goetz

date

Wed, 27 Nov 2013 16:16:21 -0800

changeset 6490

41b780b43b74

parent 6458

ec28f9c041ff

child 6495

67fa91961822

permissions

-rw-r--r--

8029015: PPC64 (part 216): opto: trap based null and range checks
Summary: On PPC64 use tdi instruction that does a compare and raises SIGTRAP for NULL and range checks.
Reviewed-by: kvn

goetz@6458	1	/*
goetz@6458	2	* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
goetz@6458	3	* Copyright 2012, 2013 SAP AG. All rights reserved.
goetz@6458	4	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
goetz@6458	5	*
goetz@6458	6	* This code is free software; you can redistribute it and/or modify it
goetz@6458	7	* under the terms of the GNU General Public License version 2 only, as
goetz@6458	8	* published by the Free Software Foundation.
goetz@6458	9	*
goetz@6458	10	* This code is distributed in the hope that it will be useful, but WITHOUT
goetz@6458	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
goetz@6458	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
goetz@6458	13	* version 2 for more details (a copy is included in the LICENSE file that
goetz@6458	14	* accompanied this code).
goetz@6458	15	*
goetz@6458	16	* You should have received a copy of the GNU General Public License version
goetz@6458	17	* 2 along with this work; if not, write to the Free Software Foundation,
goetz@6458	18	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
goetz@6458	19	*
goetz@6458	20	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
goetz@6458	21	* or visit www.oracle.com if you need additional information or have any
goetz@6458	22	* questions.
goetz@6458	23	*
goetz@6458	24	*/
goetz@6458	25
goetz@6458	26	#include "precompiled.hpp"
goetz@6458	27	#include "assembler_ppc.inline.hpp"
goetz@6458	28	#include "runtime/icache.hpp"
goetz@6458	29
goetz@6458	30	// Use inline assembler to implement icache flush.
goetz@6458	31	int ppc64_flush_icache(address start, int lines, int magic){
goetz@6458	32	address end = start + (unsigned int)lines*ICache::line_size;
goetz@6458	33	assert(start <= end, "flush_icache parms");
goetz@6458	34
goetz@6458	35	// store modified cache lines from data cache
goetz@6458	36	for (address a=start; a<end; a+=ICache::line_size) {
goetz@6458	37	__asm__ __volatile__(
goetz@6458	38	"dcbst 0, %0 \n"
goetz@6458	39	:
goetz@6458	40	: "r" (a)
goetz@6458	41	: "memory");
goetz@6458	42	}
goetz@6458	43
goetz@6458	44	// sync instruction
goetz@6458	45	__asm__ __volatile__(
goetz@6458	46	"sync \n"
goetz@6458	47	:
goetz@6458	48	:
goetz@6458	49	: "memory");
goetz@6458	50
goetz@6458	51	// invalidate respective cache lines in instruction cache
goetz@6458	52	for (address a=start; a<end; a+=ICache::line_size) {
goetz@6458	53	__asm__ __volatile__(
goetz@6458	54	"icbi 0, %0 \n"
goetz@6458	55	:
goetz@6458	56	: "r" (a)
goetz@6458	57	: "memory");
goetz@6458	58	}
goetz@6458	59
goetz@6458	60	// discard fetched instructions
goetz@6458	61	__asm__ __volatile__(
goetz@6458	62	"isync \n"
goetz@6458	63	:
goetz@6458	64	:
goetz@6458	65	: "memory");
goetz@6458	66
goetz@6458	67	return magic;
goetz@6458	68	}
goetz@6458	69
goetz@6458	70	void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
goetz@6458	71	StubCodeMark mark(this, "ICache", "flush_icache_stub");
goetz@6458	72
goetz@6458	73	*flush_icache_stub = (ICache::flush_icache_stub_t)ppc64_flush_icache;
goetz@6458	74
goetz@6458	75	// First call to flush itself
goetz@6458	76	ICache::invalidate_range((address)(*flush_icache_stub), 0);
goetz@6458	77	}