Fri, 30 Apr 2010 08:37:24 -0700
6943304: remove tagged stack interpreter
Reviewed-by: coleenp, never, gbenson
duke@435 | 1 | /* |
twisti@1736 | 2 | * Copyright 1999-2010 Sun Microsystems, Inc. All Rights Reserved. |
duke@435 | 3 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
duke@435 | 4 | * |
duke@435 | 5 | * This code is free software; you can redistribute it and/or modify it |
duke@435 | 6 | * under the terms of the GNU General Public License version 2 only, as |
duke@435 | 7 | * published by the Free Software Foundation. |
duke@435 | 8 | * |
duke@435 | 9 | * This code is distributed in the hope that it will be useful, but WITHOUT |
duke@435 | 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
duke@435 | 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
duke@435 | 12 | * version 2 for more details (a copy is included in the LICENSE file that |
duke@435 | 13 | * accompanied this code). |
duke@435 | 14 | * |
duke@435 | 15 | * You should have received a copy of the GNU General Public License version |
duke@435 | 16 | * 2 along with this work; if not, write to the Free Software Foundation, |
duke@435 | 17 | * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. |
duke@435 | 18 | * |
duke@435 | 19 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
duke@435 | 20 | * CA 95054 USA or visit www.sun.com if you need additional information or |
duke@435 | 21 | * have any questions. |
duke@435 | 22 | * |
duke@435 | 23 | */ |
duke@435 | 24 | |
duke@435 | 25 | public: |
duke@435 | 26 | |
duke@435 | 27 | enum { |
duke@435 | 28 | nof_reg_args = 6, // registers o0-o5 are available for parameter passing |
duke@435 | 29 | first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord, |
duke@435 | 30 | frame_pad_in_bytes = 0 |
duke@435 | 31 | }; |
duke@435 | 32 | |
duke@435 | 33 | static const int pd_c_runtime_reserved_arg_size; |
duke@435 | 34 | |
duke@435 | 35 | static LIR_Opr G0_opr; |
duke@435 | 36 | static LIR_Opr G1_opr; |
duke@435 | 37 | static LIR_Opr G2_opr; |
duke@435 | 38 | static LIR_Opr G3_opr; |
duke@435 | 39 | static LIR_Opr G4_opr; |
duke@435 | 40 | static LIR_Opr G5_opr; |
duke@435 | 41 | static LIR_Opr G6_opr; |
duke@435 | 42 | static LIR_Opr G7_opr; |
duke@435 | 43 | static LIR_Opr O0_opr; |
duke@435 | 44 | static LIR_Opr O1_opr; |
duke@435 | 45 | static LIR_Opr O2_opr; |
duke@435 | 46 | static LIR_Opr O3_opr; |
duke@435 | 47 | static LIR_Opr O4_opr; |
duke@435 | 48 | static LIR_Opr O5_opr; |
duke@435 | 49 | static LIR_Opr O6_opr; |
duke@435 | 50 | static LIR_Opr O7_opr; |
duke@435 | 51 | static LIR_Opr L0_opr; |
duke@435 | 52 | static LIR_Opr L1_opr; |
duke@435 | 53 | static LIR_Opr L2_opr; |
duke@435 | 54 | static LIR_Opr L3_opr; |
duke@435 | 55 | static LIR_Opr L4_opr; |
duke@435 | 56 | static LIR_Opr L5_opr; |
duke@435 | 57 | static LIR_Opr L6_opr; |
duke@435 | 58 | static LIR_Opr L7_opr; |
duke@435 | 59 | static LIR_Opr I0_opr; |
duke@435 | 60 | static LIR_Opr I1_opr; |
duke@435 | 61 | static LIR_Opr I2_opr; |
duke@435 | 62 | static LIR_Opr I3_opr; |
duke@435 | 63 | static LIR_Opr I4_opr; |
duke@435 | 64 | static LIR_Opr I5_opr; |
duke@435 | 65 | static LIR_Opr I6_opr; |
duke@435 | 66 | static LIR_Opr I7_opr; |
duke@435 | 67 | |
duke@435 | 68 | static LIR_Opr SP_opr; |
duke@435 | 69 | static LIR_Opr FP_opr; |
duke@435 | 70 | |
duke@435 | 71 | static LIR_Opr G0_oop_opr; |
duke@435 | 72 | static LIR_Opr G1_oop_opr; |
duke@435 | 73 | static LIR_Opr G2_oop_opr; |
duke@435 | 74 | static LIR_Opr G3_oop_opr; |
duke@435 | 75 | static LIR_Opr G4_oop_opr; |
duke@435 | 76 | static LIR_Opr G5_oop_opr; |
duke@435 | 77 | static LIR_Opr G6_oop_opr; |
duke@435 | 78 | static LIR_Opr G7_oop_opr; |
duke@435 | 79 | static LIR_Opr O0_oop_opr; |
duke@435 | 80 | static LIR_Opr O1_oop_opr; |
duke@435 | 81 | static LIR_Opr O2_oop_opr; |
duke@435 | 82 | static LIR_Opr O3_oop_opr; |
duke@435 | 83 | static LIR_Opr O4_oop_opr; |
duke@435 | 84 | static LIR_Opr O5_oop_opr; |
duke@435 | 85 | static LIR_Opr O6_oop_opr; |
duke@435 | 86 | static LIR_Opr O7_oop_opr; |
duke@435 | 87 | static LIR_Opr L0_oop_opr; |
duke@435 | 88 | static LIR_Opr L1_oop_opr; |
duke@435 | 89 | static LIR_Opr L2_oop_opr; |
duke@435 | 90 | static LIR_Opr L3_oop_opr; |
duke@435 | 91 | static LIR_Opr L4_oop_opr; |
duke@435 | 92 | static LIR_Opr L5_oop_opr; |
duke@435 | 93 | static LIR_Opr L6_oop_opr; |
duke@435 | 94 | static LIR_Opr L7_oop_opr; |
duke@435 | 95 | static LIR_Opr I0_oop_opr; |
duke@435 | 96 | static LIR_Opr I1_oop_opr; |
duke@435 | 97 | static LIR_Opr I2_oop_opr; |
duke@435 | 98 | static LIR_Opr I3_oop_opr; |
duke@435 | 99 | static LIR_Opr I4_oop_opr; |
duke@435 | 100 | static LIR_Opr I5_oop_opr; |
duke@435 | 101 | static LIR_Opr I6_oop_opr; |
duke@435 | 102 | static LIR_Opr I7_oop_opr; |
duke@435 | 103 | |
duke@435 | 104 | static LIR_Opr in_long_opr; |
duke@435 | 105 | static LIR_Opr out_long_opr; |
duke@435 | 106 | |
duke@435 | 107 | static LIR_Opr F0_opr; |
duke@435 | 108 | static LIR_Opr F0_double_opr; |
duke@435 | 109 | |
duke@435 | 110 | static LIR_Opr Oexception_opr; |
duke@435 | 111 | static LIR_Opr Oissuing_pc_opr; |
duke@435 | 112 | |
duke@435 | 113 | private: |
duke@435 | 114 | static FloatRegister _fpu_regs [nof_fpu_regs]; |
duke@435 | 115 | |
duke@435 | 116 | public: |
duke@435 | 117 | |
duke@435 | 118 | #ifdef _LP64 |
duke@435 | 119 | static LIR_Opr as_long_opr(Register r) { |
duke@435 | 120 | return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); |
duke@435 | 121 | } |
duke@435 | 122 | static LIR_Opr as_pointer_opr(Register r) { |
duke@435 | 123 | return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); |
duke@435 | 124 | } |
duke@435 | 125 | #else |
duke@435 | 126 | static LIR_Opr as_long_opr(Register r) { |
duke@435 | 127 | return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r)); |
duke@435 | 128 | } |
duke@435 | 129 | static LIR_Opr as_pointer_opr(Register r) { |
duke@435 | 130 | return as_opr(r); |
duke@435 | 131 | } |
duke@435 | 132 | #endif |
duke@435 | 133 | static LIR_Opr as_float_opr(FloatRegister r) { |
duke@435 | 134 | return LIR_OprFact::single_fpu(r->encoding()); |
duke@435 | 135 | } |
duke@435 | 136 | static LIR_Opr as_double_opr(FloatRegister r) { |
duke@435 | 137 | return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding()); |
duke@435 | 138 | } |
duke@435 | 139 | |
duke@435 | 140 | static FloatRegister nr2floatreg (int rnr); |
duke@435 | 141 | |
duke@435 | 142 | static VMReg fpu_regname (int n); |
duke@435 | 143 | |
duke@435 | 144 | static bool is_caller_save_register (LIR_Opr reg); |
duke@435 | 145 | static bool is_caller_save_register (Register r); |
twisti@1736 | 146 | |
twisti@1736 | 147 | // JSR 292 |
twisti@1736 | 148 | static LIR_Opr& method_handle_invoke_SP_save_opr() { return L7_opr; } |