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src/cpu/x86/vm/c1_FrameMap_x86.hpp@04d83ba48607 (annotated)

src/cpu/x86/vm/c1_FrameMap_x86.hpp

Thu, 24 May 2018 17:06:56 +0800

author

aoqi

date

Thu, 24 May 2018 17:06:56 +0800

changeset 8604

04d83ba48607

parent 6876

710a3c8b516e

permissions

-rw-r--r--

Merge

aoqi@0	1	/*
aoqi@0	2	* Copyright (c) 1999, 2013, Oracle and/or its affiliates. All rights reserved.
aoqi@0	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
aoqi@0	4	*
aoqi@0	5	* This code is free software; you can redistribute it and/or modify it
aoqi@0	6	* under the terms of the GNU General Public License version 2 only, as
aoqi@0	7	* published by the Free Software Foundation.
aoqi@0	8	*
aoqi@0	9	* This code is distributed in the hope that it will be useful, but WITHOUT
aoqi@0	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
aoqi@0	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
aoqi@0	12	* version 2 for more details (a copy is included in the LICENSE file that
aoqi@0	13	* accompanied this code).
aoqi@0	14	*
aoqi@0	15	* You should have received a copy of the GNU General Public License version
aoqi@0	16	* 2 along with this work; if not, write to the Free Software Foundation,
aoqi@0	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
aoqi@0	18	*
aoqi@0	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
aoqi@0	20	* or visit www.oracle.com if you need additional information or have any
aoqi@0	21	* questions.
aoqi@0	22	*
aoqi@0	23	*/
aoqi@0	24
aoqi@0	25	#ifndef CPU_X86_VM_C1_FRAMEMAP_X86_HPP
aoqi@0	26	#define CPU_X86_VM_C1_FRAMEMAP_X86_HPP
aoqi@0	27
aoqi@0	28	// On i486 the frame looks as follows:
aoqi@0	29	//
aoqi@0	30	// +-----------------------------+---------+----------------------------------------+----------------+-----------
aoqi@0	31	// | size_arguments-nof_reg_args | 2 words | size_locals-size_arguments+numreg_args | _size_monitors | spilling .
aoqi@0	32	// +-----------------------------+---------+----------------------------------------+----------------+-----------
aoqi@0	33	//
aoqi@0	34	// The FPU registers are mapped with their offset from TOS; therefore the
aoqi@0	35	// status of FPU stack must be updated during code emission.
aoqi@0	36
aoqi@0	37	public:
aoqi@0	38	static const int pd_c_runtime_reserved_arg_size;
aoqi@0	39
aoqi@0	40	enum {
aoqi@0	41	nof_xmm_regs = pd_nof_xmm_regs_frame_map,
aoqi@0	42	nof_caller_save_xmm_regs = pd_nof_caller_save_xmm_regs_frame_map,
aoqi@0	43	first_available_sp_in_frame = 0,
aoqi@0	44	#ifndef _LP64
aoqi@0	45	frame_pad_in_bytes = 8,
aoqi@0	46	nof_reg_args = 2
aoqi@0	47	#else
aoqi@0	48	frame_pad_in_bytes = 16,
aoqi@0	49	nof_reg_args = 6
aoqi@0	50	#endif // _LP64
aoqi@0	51	};
aoqi@0	52
aoqi@0	53	private:
aoqi@0	54	static LIR_Opr _caller_save_xmm_regs [nof_caller_save_xmm_regs];
aoqi@0	55
aoqi@0	56	static XMMRegister _xmm_regs[nof_xmm_regs];
aoqi@0	57
aoqi@0	58	public:
aoqi@0	59	static LIR_Opr receiver_opr;
aoqi@0	60
aoqi@0	61	static LIR_Opr rsi_opr;
aoqi@0	62	static LIR_Opr rdi_opr;
aoqi@0	63	static LIR_Opr rbx_opr;
aoqi@0	64	static LIR_Opr rax_opr;
aoqi@0	65	static LIR_Opr rdx_opr;
aoqi@0	66	static LIR_Opr rcx_opr;
aoqi@0	67	static LIR_Opr rsp_opr;
aoqi@0	68	static LIR_Opr rbp_opr;
aoqi@0	69
aoqi@0	70	static LIR_Opr rsi_oop_opr;
aoqi@0	71	static LIR_Opr rdi_oop_opr;
aoqi@0	72	static LIR_Opr rbx_oop_opr;
aoqi@0	73	static LIR_Opr rax_oop_opr;
aoqi@0	74	static LIR_Opr rdx_oop_opr;
aoqi@0	75	static LIR_Opr rcx_oop_opr;
aoqi@0	76
aoqi@0	77	static LIR_Opr rsi_metadata_opr;
aoqi@0	78	static LIR_Opr rdi_metadata_opr;
aoqi@0	79	static LIR_Opr rbx_metadata_opr;
aoqi@0	80	static LIR_Opr rax_metadata_opr;
aoqi@0	81	static LIR_Opr rdx_metadata_opr;
aoqi@0	82	static LIR_Opr rcx_metadata_opr;
aoqi@0	83
aoqi@0	84	#ifdef _LP64
aoqi@0	85
aoqi@0	86	static LIR_Opr r8_opr;
aoqi@0	87	static LIR_Opr r9_opr;
aoqi@0	88	static LIR_Opr r10_opr;
aoqi@0	89	static LIR_Opr r11_opr;
aoqi@0	90	static LIR_Opr r12_opr;
aoqi@0	91	static LIR_Opr r13_opr;
aoqi@0	92	static LIR_Opr r14_opr;
aoqi@0	93	static LIR_Opr r15_opr;
aoqi@0	94
aoqi@0	95	static LIR_Opr r8_oop_opr;
aoqi@0	96	static LIR_Opr r9_oop_opr;
aoqi@0	97
aoqi@0	98	static LIR_Opr r11_oop_opr;
aoqi@0	99	static LIR_Opr r12_oop_opr;
aoqi@0	100	static LIR_Opr r13_oop_opr;
aoqi@0	101	static LIR_Opr r14_oop_opr;
aoqi@0	102
aoqi@0	103	static LIR_Opr r8_metadata_opr;
aoqi@0	104	static LIR_Opr r9_metadata_opr;
aoqi@0	105
aoqi@0	106	static LIR_Opr r11_metadata_opr;
aoqi@0	107	static LIR_Opr r12_metadata_opr;
aoqi@0	108	static LIR_Opr r13_metadata_opr;
aoqi@0	109	static LIR_Opr r14_metadata_opr;
aoqi@0	110
aoqi@0	111	#endif // _LP64
aoqi@0	112
aoqi@0	113	static LIR_Opr long0_opr;
aoqi@0	114	static LIR_Opr long1_opr;
aoqi@0	115	static LIR_Opr fpu0_float_opr;
aoqi@0	116	static LIR_Opr fpu0_double_opr;
aoqi@0	117	static LIR_Opr xmm0_float_opr;
aoqi@0	118	static LIR_Opr xmm0_double_opr;
aoqi@0	119
aoqi@0	120	#ifdef _LP64
aoqi@0	121	static LIR_Opr as_long_opr(Register r) {
aoqi@0	122	return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
aoqi@0	123	}
aoqi@0	124	static LIR_Opr as_pointer_opr(Register r) {
aoqi@0	125	return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
aoqi@0	126	}
aoqi@0	127	#else
aoqi@0	128	static LIR_Opr as_long_opr(Register r, Register r2) {
aoqi@0	129	return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r2));
aoqi@0	130	}
aoqi@0	131	static LIR_Opr as_pointer_opr(Register r) {
aoqi@0	132	return LIR_OprFact::single_cpu(cpu_reg2rnr(r));
aoqi@0	133	}
aoqi@0	134	#endif // _LP64
aoqi@0	135
aoqi@0	136	// VMReg name for spilled physical FPU stack slot n
aoqi@0	137	static VMReg fpu_regname (int n);
aoqi@0	138
aoqi@0	139	static XMMRegister nr2xmmreg(int rnr);
aoqi@0	140
aoqi@0	141	static bool is_caller_save_register (LIR_Opr opr) { return true; }
aoqi@0	142	static bool is_caller_save_register (Register r) { return true; }
aoqi@0	143
aoqi@0	144	static LIR_Opr caller_save_xmm_reg_at(int i) {
aoqi@0	145	assert(i >= 0 && i < nof_caller_save_xmm_regs, "out of bounds");
aoqi@0	146	return _caller_save_xmm_regs[i];
aoqi@0	147	}
aoqi@0	148
aoqi@0	149	static int adjust_reg_range(int range) {
aoqi@0	150	// Reduce the number of available regs (to free r12) in case of compressed oops
aoqi@0	151	if (UseCompressedOops || UseCompressedClassPointers) return range - 1;
aoqi@0	152	return range;
aoqi@0	153	}
aoqi@0	154
aoqi@0	155	static int nof_caller_save_cpu_regs() { return adjust_reg_range(pd_nof_caller_save_cpu_regs_frame_map); }
aoqi@0	156	static int last_cpu_reg() { return adjust_reg_range(pd_last_cpu_reg); }
aoqi@0	157	static int last_byte_reg() { return adjust_reg_range(pd_last_byte_reg); }
aoqi@0	158
aoqi@0	159	#endif // CPU_X86_VM_C1_FRAMEMAP_X86_HPP
aoqi@0	160