• file
• revisions
• annotate
• diff
• comparison
• raw

src/share/vm/c1/c1_LIR.cpp@01522ca68fc7 (annotated)

src/share/vm/c1/c1_LIR.cpp

Tue, 18 Jun 2013 12:31:07 -0700

author

johnc

date

Tue, 18 Jun 2013 12:31:07 -0700

changeset 5277

01522ca68fc7

parent 4947

acadb114c818

child 5290

87a6f2df28e2

permissions

-rw-r--r--

8015237: Parallelize string table scanning during strong root processing
Summary: Parallelize the scanning of the intern string table by having each GC worker claim a given number of buckets. Changes were also reviewed by Per Liden <per.liden@oracle.com>.
Reviewed-by: tschatzl, stefank, twisti

duke@435	1	/*
hseigel@4465	2	* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
duke@435	3	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
duke@435	4	*
duke@435	5	* This code is free software; you can redistribute it and/or modify it
duke@435	6	* under the terms of the GNU General Public License version 2 only, as
duke@435	7	* published by the Free Software Foundation.
duke@435	8	*
duke@435	9	* This code is distributed in the hope that it will be useful, but WITHOUT
duke@435	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
duke@435	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
duke@435	12	* version 2 for more details (a copy is included in the LICENSE file that
duke@435	13	* accompanied this code).
duke@435	14	*
duke@435	15	* You should have received a copy of the GNU General Public License version
duke@435	16	* 2 along with this work; if not, write to the Free Software Foundation,
duke@435	17	* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
duke@435	18	*
trims@1907	19	* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
trims@1907	20	* or visit www.oracle.com if you need additional information or have any
trims@1907	21	* questions.
duke@435	22	*
duke@435	23	*/
duke@435	24
stefank@2314	25	#include "precompiled.hpp"
stefank@2314	26	#include "c1/c1_InstructionPrinter.hpp"
stefank@2314	27	#include "c1/c1_LIR.hpp"
stefank@2314	28	#include "c1/c1_LIRAssembler.hpp"
stefank@2314	29	#include "c1/c1_ValueStack.hpp"
stefank@2314	30	#include "ci/ciInstance.hpp"
stefank@2314	31	#include "runtime/sharedRuntime.hpp"
duke@435	32
duke@435	33	Register LIR_OprDesc::as_register() const {
duke@435	34	return FrameMap::cpu_rnr2reg(cpu_regnr());
duke@435	35	}
duke@435	36
duke@435	37	Register LIR_OprDesc::as_register_lo() const {
duke@435	38	return FrameMap::cpu_rnr2reg(cpu_regnrLo());
duke@435	39	}
duke@435	40
duke@435	41	Register LIR_OprDesc::as_register_hi() const {
duke@435	42	return FrameMap::cpu_rnr2reg(cpu_regnrHi());
duke@435	43	}
duke@435	44
never@739	45	#if defined(X86)
duke@435	46
duke@435	47	XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
duke@435	48	return FrameMap::nr2xmmreg(xmm_regnr());
duke@435	49	}
duke@435	50
duke@435	51	XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
duke@435	52	assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
duke@435	53	return FrameMap::nr2xmmreg(xmm_regnrLo());
duke@435	54	}
duke@435	55
never@739	56	#endif // X86
duke@435	57
bobv@2036	58	#if defined(SPARC) || defined(PPC)
duke@435	59
duke@435	60	FloatRegister LIR_OprDesc::as_float_reg() const {
duke@435	61	return FrameMap::nr2floatreg(fpu_regnr());
duke@435	62	}
duke@435	63
duke@435	64	FloatRegister LIR_OprDesc::as_double_reg() const {
duke@435	65	return FrameMap::nr2floatreg(fpu_regnrHi());
duke@435	66	}
duke@435	67
duke@435	68	#endif
duke@435	69
bobv@2036	70	#ifdef ARM
bobv@2036	71
bobv@2036	72	FloatRegister LIR_OprDesc::as_float_reg() const {
bobv@2036	73	return as_FloatRegister(fpu_regnr());
bobv@2036	74	}
bobv@2036	75
bobv@2036	76	FloatRegister LIR_OprDesc::as_double_reg() const {
bobv@2036	77	return as_FloatRegister(fpu_regnrLo());
bobv@2036	78	}
bobv@2036	79
bobv@2036	80	#endif
bobv@2036	81
bobv@2036	82
duke@435	83	LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
duke@435	84
duke@435	85	LIR_Opr LIR_OprFact::value_type(ValueType* type) {
duke@435	86	ValueTag tag = type->tag();
duke@435	87	switch (tag) {
coleenp@4037	88	case metaDataTag : {
duke@435	89	ClassConstant* c = type->as_ClassConstant();
duke@435	90	if (c != NULL && !c->value()->is_loaded()) {
coleenp@4037	91	return LIR_OprFact::metadataConst(NULL);
roland@4051	92	} else if (c != NULL) {
roland@4051	93	return LIR_OprFact::metadataConst(c->value()->constant_encoding());
duke@435	94	} else {
roland@4051	95	MethodConstant* m = type->as_MethodConstant();
roland@4051	96	assert (m != NULL, "not a class or a method?");
roland@4051	97	return LIR_OprFact::metadataConst(m->value()->constant_encoding());
coleenp@4037	98	}
coleenp@4037	99	}
coleenp@4037	100	case objectTag : {
duke@435	101	return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
duke@435	102	}
roland@1732	103	case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
duke@435	104	case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
duke@435	105	case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
duke@435	106	case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
duke@435	107	case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
never@739	108	default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
duke@435	109	}
duke@435	110	}
duke@435	111
duke@435	112
duke@435	113	LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
duke@435	114	switch (type->tag()) {
duke@435	115	case objectTag: return LIR_OprFact::oopConst(NULL);
roland@1732	116	case addressTag:return LIR_OprFact::addressConst(0);
duke@435	117	case intTag: return LIR_OprFact::intConst(0);
duke@435	118	case floatTag: return LIR_OprFact::floatConst(0.0);
duke@435	119	case longTag: return LIR_OprFact::longConst(0);
duke@435	120	case doubleTag: return LIR_OprFact::doubleConst(0.0);
never@739	121	default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
duke@435	122	}
duke@435	123	return illegalOpr;
duke@435	124	}
duke@435	125
duke@435	126
duke@435	127
duke@435	128	//---------------------------------------------------
duke@435	129
duke@435	130
duke@435	131	LIR_Address::Scale LIR_Address::scale(BasicType type) {
kvn@464	132	int elem_size = type2aelembytes(type);
duke@435	133	switch (elem_size) {
duke@435	134	case 1: return LIR_Address::times_1;
duke@435	135	case 2: return LIR_Address::times_2;
duke@435	136	case 4: return LIR_Address::times_4;
duke@435	137	case 8: return LIR_Address::times_8;
duke@435	138	}
duke@435	139	ShouldNotReachHere();
duke@435	140	return LIR_Address::times_1;
duke@435	141	}
duke@435	142
duke@435	143
duke@435	144	#ifndef PRODUCT
duke@435	145	void LIR_Address::verify() const {
bobv@2036	146	#if defined(SPARC) || defined(PPC)
bobv@2036	147	assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
duke@435	148	assert(disp() == 0 || index()->is_illegal(), "can't have both");
duke@435	149	#endif
bobv@2036	150	#ifdef ARM
bobv@2036	151	assert(disp() == 0 || index()->is_illegal(), "can't have both");
bdelsart@3141	152	// Note: offsets higher than 4096 must not be rejected here. They can
bdelsart@3141	153	// be handled by the back-end or will be rejected if not.
bobv@2036	154	#endif
duke@435	155	#ifdef _LP64
duke@435	156	assert(base()->is_cpu_register(), "wrong base operand");
duke@435	157	assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
coleenp@4037	158	assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
duke@435	159	"wrong type for addresses");
duke@435	160	#else
duke@435	161	assert(base()->is_single_cpu(), "wrong base operand");
duke@435	162	assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
coleenp@4037	163	assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
duke@435	164	"wrong type for addresses");
duke@435	165	#endif
duke@435	166	}
duke@435	167	#endif
duke@435	168
duke@435	169
duke@435	170	//---------------------------------------------------
duke@435	171
duke@435	172	char LIR_OprDesc::type_char(BasicType t) {
duke@435	173	switch (t) {
duke@435	174	case T_ARRAY:
duke@435	175	t = T_OBJECT;
duke@435	176	case T_BOOLEAN:
duke@435	177	case T_CHAR:
duke@435	178	case T_FLOAT:
duke@435	179	case T_DOUBLE:
duke@435	180	case T_BYTE:
duke@435	181	case T_SHORT:
duke@435	182	case T_INT:
duke@435	183	case T_LONG:
duke@435	184	case T_OBJECT:
duke@435	185	case T_ADDRESS:
coleenp@4037	186	case T_METADATA:
duke@435	187	case T_VOID:
duke@435	188	return ::type2char(t);
duke@435	189
duke@435	190	case T_ILLEGAL:
duke@435	191	return '?';
duke@435	192
duke@435	193	default:
duke@435	194	ShouldNotReachHere();
never@739	195	return '?';
duke@435	196	}
duke@435	197	}
duke@435	198
duke@435	199	#ifndef PRODUCT
duke@435	200	void LIR_OprDesc::validate_type() const {
duke@435	201
duke@435	202	#ifdef ASSERT
duke@435	203	if (!is_pointer() && !is_illegal()) {
duke@435	204	switch (as_BasicType(type_field())) {
duke@435	205	case T_LONG:
bobv@2036	206	assert((kind_field() == cpu_register || kind_field() == stack_value) &&
bobv@2036	207	size_field() == double_size, "must match");
duke@435	208	break;
duke@435	209	case T_FLOAT:
bobv@2036	210	// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
bobv@2036	211	assert((kind_field() == fpu_register || kind_field() == stack_value
bobv@2036	212	ARM_ONLY(|| kind_field() == cpu_register)
bobv@2036	213	PPC_ONLY(|| kind_field() == cpu_register) ) &&
bobv@2036	214	size_field() == single_size, "must match");
duke@435	215	break;
duke@435	216	case T_DOUBLE:
bobv@2036	217	// FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
bobv@2036	218	assert((kind_field() == fpu_register || kind_field() == stack_value
bobv@2036	219	ARM_ONLY(|| kind_field() == cpu_register)
bobv@2036	220	PPC_ONLY(|| kind_field() == cpu_register) ) &&
bobv@2036	221	size_field() == double_size, "must match");
duke@435	222	break;
duke@435	223	case T_BOOLEAN:
duke@435	224	case T_CHAR:
duke@435	225	case T_BYTE:
duke@435	226	case T_SHORT:
duke@435	227	case T_INT:
never@2171	228	case T_ADDRESS:
duke@435	229	case T_OBJECT:
coleenp@4037	230	case T_METADATA:
duke@435	231	case T_ARRAY:
bobv@2036	232	assert((kind_field() == cpu_register || kind_field() == stack_value) &&
bobv@2036	233	size_field() == single_size, "must match");
duke@435	234	break;
duke@435	235
duke@435	236	case T_ILLEGAL:
duke@435	237	// XXX TKR also means unknown right now
duke@435	238	// assert(is_illegal(), "must match");
duke@435	239	break;
duke@435	240
duke@435	241	default:
duke@435	242	ShouldNotReachHere();
duke@435	243	}
duke@435	244	}
duke@435	245	#endif
duke@435	246
duke@435	247	}
duke@435	248	#endif // PRODUCT
duke@435	249
duke@435	250
duke@435	251	bool LIR_OprDesc::is_oop() const {
duke@435	252	if (is_pointer()) {
duke@435	253	return pointer()->is_oop_pointer();
duke@435	254	} else {
duke@435	255	OprType t= type_field();
duke@435	256	assert(t != unknown_type, "not set");
duke@435	257	return t == object_type;
duke@435	258	}
duke@435	259	}
duke@435	260
duke@435	261
duke@435	262
duke@435	263	void LIR_Op2::verify() const {
duke@435	264	#ifdef ASSERT
duke@435	265	switch (code()) {
duke@435	266	case lir_cmove:
roland@4106	267	case lir_xchg:
duke@435	268	break;
duke@435	269
duke@435	270	default:
duke@435	271	assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
duke@435	272	"can't produce oops from arith");
duke@435	273	}
duke@435	274
duke@435	275	if (TwoOperandLIRForm) {
duke@435	276	switch (code()) {
duke@435	277	case lir_add:
duke@435	278	case lir_sub:
duke@435	279	case lir_mul:
duke@435	280	case lir_mul_strictfp:
duke@435	281	case lir_div:
duke@435	282	case lir_div_strictfp:
duke@435	283	case lir_rem:
duke@435	284	case lir_logic_and:
duke@435	285	case lir_logic_or:
duke@435	286	case lir_logic_xor:
duke@435	287	case lir_shl:
duke@435	288	case lir_shr:
duke@435	289	assert(in_opr1() == result_opr(), "opr1 and result must match");
duke@435	290	assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
duke@435	291	break;
duke@435	292
duke@435	293	// special handling for lir_ushr because of write barriers
duke@435	294	case lir_ushr:
duke@435	295	assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
duke@435	296	assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
duke@435	297	break;
duke@435	298
duke@435	299	}
duke@435	300	}
duke@435	301	#endif
duke@435	302	}
duke@435	303
duke@435	304
duke@435	305	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
duke@435	306	: LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	307	, _cond(cond)
duke@435	308	, _type(type)
duke@435	309	, _label(block->label())
duke@435	310	, _block(block)
duke@435	311	, _ublock(NULL)
duke@435	312	, _stub(NULL) {
duke@435	313	}
duke@435	314
duke@435	315	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
duke@435	316	LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	317	, _cond(cond)
duke@435	318	, _type(type)
duke@435	319	, _label(stub->entry())
duke@435	320	, _block(NULL)
duke@435	321	, _ublock(NULL)
duke@435	322	, _stub(stub) {
duke@435	323	}
duke@435	324
duke@435	325	LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
duke@435	326	: LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
duke@435	327	, _cond(cond)
duke@435	328	, _type(type)
duke@435	329	, _label(block->label())
duke@435	330	, _block(block)
duke@435	331	, _ublock(ublock)
duke@435	332	, _stub(NULL)
duke@435	333	{
duke@435	334	}
duke@435	335
duke@435	336	void LIR_OpBranch::change_block(BlockBegin* b) {
duke@435	337	assert(_block != NULL, "must have old block");
duke@435	338	assert(_block->label() == label(), "must be equal");
duke@435	339
duke@435	340	_block = b;
duke@435	341	_label = b->label();
duke@435	342	}
duke@435	343
duke@435	344	void LIR_OpBranch::change_ublock(BlockBegin* b) {
duke@435	345	assert(_ublock != NULL, "must have old block");
duke@435	346	_ublock = b;
duke@435	347	}
duke@435	348
duke@435	349	void LIR_OpBranch::negate_cond() {
duke@435	350	switch (_cond) {
duke@435	351	case lir_cond_equal: _cond = lir_cond_notEqual; break;
duke@435	352	case lir_cond_notEqual: _cond = lir_cond_equal; break;
duke@435	353	case lir_cond_less: _cond = lir_cond_greaterEqual; break;
duke@435	354	case lir_cond_lessEqual: _cond = lir_cond_greater; break;
duke@435	355	case lir_cond_greaterEqual: _cond = lir_cond_less; break;
duke@435	356	case lir_cond_greater: _cond = lir_cond_lessEqual; break;
duke@435	357	default: ShouldNotReachHere();
duke@435	358	}
duke@435	359	}
duke@435	360
duke@435	361
duke@435	362	LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
duke@435	363	LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
duke@435	364	bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
iveresov@2138	365	CodeStub* stub)
iveresov@2138	366
duke@435	367	: LIR_Op(code, result, NULL)
duke@435	368	, _object(object)
duke@435	369	, _array(LIR_OprFact::illegalOpr)
duke@435	370	, _klass(klass)
duke@435	371	, _tmp1(tmp1)
duke@435	372	, _tmp2(tmp2)
duke@435	373	, _tmp3(tmp3)
duke@435	374	, _fast_check(fast_check)
duke@435	375	, _stub(stub)
duke@435	376	, _info_for_patch(info_for_patch)
duke@435	377	, _info_for_exception(info_for_exception)
iveresov@2138	378	, _profiled_method(NULL)
iveresov@2138	379	, _profiled_bci(-1)
iveresov@2138	380	, _should_profile(false)
iveresov@2138	381	{
duke@435	382	if (code == lir_checkcast) {
duke@435	383	assert(info_for_exception != NULL, "checkcast throws exceptions");
duke@435	384	} else if (code == lir_instanceof) {
duke@435	385	assert(info_for_exception == NULL, "instanceof throws no exceptions");
duke@435	386	} else {
duke@435	387	ShouldNotReachHere();
duke@435	388	}
duke@435	389	}
duke@435	390
duke@435	391
duke@435	392
iveresov@2138	393	LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
duke@435	394	: LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
duke@435	395	, _object(object)
duke@435	396	, _array(array)
duke@435	397	, _klass(NULL)
duke@435	398	, _tmp1(tmp1)
duke@435	399	, _tmp2(tmp2)
duke@435	400	, _tmp3(tmp3)
duke@435	401	, _fast_check(false)
duke@435	402	, _stub(NULL)
duke@435	403	, _info_for_patch(NULL)
duke@435	404	, _info_for_exception(info_for_exception)
iveresov@2138	405	, _profiled_method(NULL)
iveresov@2138	406	, _profiled_bci(-1)
iveresov@2138	407	, _should_profile(false)
iveresov@2138	408	{
duke@435	409	if (code == lir_store_check) {
never@2488	410	_stub = new ArrayStoreExceptionStub(object, info_for_exception);
duke@435	411	assert(info_for_exception != NULL, "store_check throws exceptions");
duke@435	412	} else {
duke@435	413	ShouldNotReachHere();
duke@435	414	}
duke@435	415	}
duke@435	416
duke@435	417
duke@435	418	LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
duke@435	419	LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
duke@435	420	: LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
duke@435	421	, _tmp(tmp)
duke@435	422	, _src(src)
duke@435	423	, _src_pos(src_pos)
duke@435	424	, _dst(dst)
duke@435	425	, _dst_pos(dst_pos)
duke@435	426	, _flags(flags)
duke@435	427	, _expected_type(expected_type)
duke@435	428	, _length(length) {
duke@435	429	_stub = new ArrayCopyStub(this);
duke@435	430	}
duke@435	431
duke@435	432
duke@435	433	//-------------------verify--------------------------
duke@435	434
duke@435	435	void LIR_Op1::verify() const {
duke@435	436	switch(code()) {
duke@435	437	case lir_move:
duke@435	438	assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
duke@435	439	break;
duke@435	440	case lir_null_check:
duke@435	441	assert(in_opr()->is_register(), "must be");
duke@435	442	break;
duke@435	443	case lir_return:
duke@435	444	assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
duke@435	445	break;
duke@435	446	}
duke@435	447	}
duke@435	448
duke@435	449	void LIR_OpRTCall::verify() const {
duke@435	450	assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
duke@435	451	}
duke@435	452
duke@435	453	//-------------------visits--------------------------
duke@435	454
duke@435	455	// complete rework of LIR instruction visitor.
duke@435	456	// The virtual calls for each instruction type is replaced by a big
duke@435	457	// switch that adds the operands for each instruction
duke@435	458
duke@435	459	void LIR_OpVisitState::visit(LIR_Op* op) {
duke@435	460	// copy information from the LIR_Op
duke@435	461	reset();
duke@435	462	set_op(op);
duke@435	463
duke@435	464	switch (op->code()) {
duke@435	465
duke@435	466	// LIR_Op0
duke@435	467	case lir_word_align: // result and info always invalid
duke@435	468	case lir_backwardbranch_target: // result and info always invalid
duke@435	469	case lir_build_frame: // result and info always invalid
duke@435	470	case lir_fpop_raw: // result and info always invalid
duke@435	471	case lir_24bit_FPU: // result and info always invalid
duke@435	472	case lir_reset_FPU: // result and info always invalid
duke@435	473	case lir_breakpoint: // result and info always invalid
duke@435	474	case lir_membar: // result and info always invalid
duke@435	475	case lir_membar_acquire: // result and info always invalid
duke@435	476	case lir_membar_release: // result and info always invalid
jiangli@3592	477	case lir_membar_loadload: // result and info always invalid
jiangli@3592	478	case lir_membar_storestore: // result and info always invalid
jiangli@3592	479	case lir_membar_loadstore: // result and info always invalid
jiangli@3592	480	case lir_membar_storeload: // result and info always invalid
duke@435	481	{
duke@435	482	assert(op->as_Op0() != NULL, "must be");
duke@435	483	assert(op->_info == NULL, "info not used by this instruction");
duke@435	484	assert(op->_result->is_illegal(), "not used");
duke@435	485	break;
duke@435	486	}
duke@435	487
duke@435	488	case lir_nop: // may have info, result always invalid
duke@435	489	case lir_std_entry: // may have result, info always invalid
duke@435	490	case lir_osr_entry: // may have result, info always invalid
duke@435	491	case lir_get_thread: // may have result, info always invalid
duke@435	492	{
duke@435	493	assert(op->as_Op0() != NULL, "must be");
duke@435	494	if (op->_info != NULL) do_info(op->_info);
duke@435	495	if (op->_result->is_valid()) do_output(op->_result);
duke@435	496	break;
duke@435	497	}
duke@435	498
duke@435	499
duke@435	500	// LIR_OpLabel
duke@435	501	case lir_label: // result and info always invalid
duke@435	502	{
duke@435	503	assert(op->as_OpLabel() != NULL, "must be");
duke@435	504	assert(op->_info == NULL, "info not used by this instruction");
duke@435	505	assert(op->_result->is_illegal(), "not used");
duke@435	506	break;
duke@435	507	}
duke@435	508
duke@435	509
duke@435	510	// LIR_Op1
duke@435	511	case lir_fxch: // input always valid, result and info always invalid
duke@435	512	case lir_fld: // input always valid, result and info always invalid
duke@435	513	case lir_ffree: // input always valid, result and info always invalid
duke@435	514	case lir_push: // input always valid, result and info always invalid
duke@435	515	case lir_pop: // input always valid, result and info always invalid
duke@435	516	case lir_return: // input always valid, result and info always invalid
duke@435	517	case lir_leal: // input and result always valid, info always invalid
duke@435	518	case lir_neg: // input and result always valid, info always invalid
duke@435	519	case lir_monaddr: // input and result always valid, info always invalid
duke@435	520	case lir_null_check: // input and info always valid, result always invalid
duke@435	521	case lir_move: // input and result always valid, may have info
iveresov@2138	522	case lir_pack64: // input and result always valid
iveresov@2138	523	case lir_unpack64: // input and result always valid
duke@435	524	case lir_prefetchr: // input always valid, result and info always invalid
duke@435	525	case lir_prefetchw: // input always valid, result and info always invalid
duke@435	526	{
duke@435	527	assert(op->as_Op1() != NULL, "must be");
duke@435	528	LIR_Op1* op1 = (LIR_Op1*)op;
duke@435	529
duke@435	530	if (op1->_info) do_info(op1->_info);
duke@435	531	if (op1->_opr->is_valid()) do_input(op1->_opr);
duke@435	532	if (op1->_result->is_valid()) do_output(op1->_result);
duke@435	533
duke@435	534	break;
duke@435	535	}
duke@435	536
duke@435	537	case lir_safepoint:
duke@435	538	{
duke@435	539	assert(op->as_Op1() != NULL, "must be");
duke@435	540	LIR_Op1* op1 = (LIR_Op1*)op;
duke@435	541
duke@435	542	assert(op1->_info != NULL, ""); do_info(op1->_info);
duke@435	543	if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
duke@435	544	assert(op1->_result->is_illegal(), "safepoint does not produce value");
duke@435	545
duke@435	546	break;
duke@435	547	}
duke@435	548
duke@435	549	// LIR_OpConvert;
duke@435	550	case lir_convert: // input and result always valid, info always invalid
duke@435	551	{
duke@435	552	assert(op->as_OpConvert() != NULL, "must be");
duke@435	553	LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
duke@435	554
duke@435	555	assert(opConvert->_info == NULL, "must be");
duke@435	556	if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
duke@435	557	if (opConvert->_result->is_valid()) do_output(opConvert->_result);
bobv@2036	558	#ifdef PPC
bobv@2036	559	if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
bobv@2036	560	if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
bobv@2036	561	#endif
duke@435	562	do_stub(opConvert->_stub);
duke@435	563
duke@435	564	break;
duke@435	565	}
duke@435	566
duke@435	567	// LIR_OpBranch;
duke@435	568	case lir_branch: // may have info, input and result register always invalid
duke@435	569	case lir_cond_float_branch: // may have info, input and result register always invalid
duke@435	570	{
duke@435	571	assert(op->as_OpBranch() != NULL, "must be");
duke@435	572	LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
duke@435	573
duke@435	574	if (opBranch->_info != NULL) do_info(opBranch->_info);
duke@435	575	assert(opBranch->_result->is_illegal(), "not used");
duke@435	576	if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
duke@435	577
duke@435	578	break;
duke@435	579	}
duke@435	580
duke@435	581
duke@435	582	// LIR_OpAllocObj
duke@435	583	case lir_alloc_object:
duke@435	584	{
duke@435	585	assert(op->as_OpAllocObj() != NULL, "must be");
duke@435	586	LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
duke@435	587
duke@435	588	if (opAllocObj->_info) do_info(opAllocObj->_info);
bobv@2036	589	if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
bobv@2036	590	do_temp(opAllocObj->_opr);
bobv@2036	591	}
duke@435	592	if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
duke@435	593	if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
duke@435	594	if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
duke@435	595	if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
duke@435	596	if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
duke@435	597	do_stub(opAllocObj->_stub);
duke@435	598	break;
duke@435	599	}
duke@435	600
duke@435	601
duke@435	602	// LIR_OpRoundFP;
duke@435	603	case lir_roundfp: {
duke@435	604	assert(op->as_OpRoundFP() != NULL, "must be");
duke@435	605	LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
duke@435	606
duke@435	607	assert(op->_info == NULL, "info not used by this instruction");
duke@435	608	assert(opRoundFP->_tmp->is_illegal(), "not used");
duke@435	609	do_input(opRoundFP->_opr);
duke@435	610	do_output(opRoundFP->_result);
duke@435	611
duke@435	612	break;
duke@435	613	}
duke@435	614
duke@435	615
duke@435	616	// LIR_Op2
duke@435	617	case lir_cmp:
duke@435	618	case lir_cmp_l2i:
duke@435	619	case lir_ucmp_fd2i:
duke@435	620	case lir_cmp_fd2i:
duke@435	621	case lir_add:
duke@435	622	case lir_sub:
duke@435	623	case lir_mul:
duke@435	624	case lir_div:
duke@435	625	case lir_rem:
duke@435	626	case lir_sqrt:
duke@435	627	case lir_abs:
duke@435	628	case lir_logic_and:
duke@435	629	case lir_logic_or:
duke@435	630	case lir_logic_xor:
duke@435	631	case lir_shl:
duke@435	632	case lir_shr:
duke@435	633	case lir_ushr:
roland@4106	634	case lir_xadd:
roland@4106	635	case lir_xchg:
roland@4860	636	case lir_assert:
duke@435	637	{
duke@435	638	assert(op->as_Op2() != NULL, "must be");
duke@435	639	LIR_Op2* op2 = (LIR_Op2*)op;
roland@3787	640	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	641	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	642
duke@435	643	if (op2->_info) do_info(op2->_info);
duke@435	644	if (op2->_opr1->is_valid()) do_input(op2->_opr1);
duke@435	645	if (op2->_opr2->is_valid()) do_input(op2->_opr2);
roland@3787	646	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
duke@435	647	if (op2->_result->is_valid()) do_output(op2->_result);
roland@4106	648	if (op->code() == lir_xchg || op->code() == lir_xadd) {
roland@4106	649	// on ARM and PPC, return value is loaded first so could
roland@4106	650	// destroy inputs. On other platforms that implement those
roland@4106	651	// (x86, sparc), the extra constrainsts are harmless.
roland@4106	652	if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
roland@4106	653	if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
roland@4106	654	}
duke@435	655
duke@435	656	break;
duke@435	657	}
duke@435	658
duke@435	659	// special handling for cmove: right input operand must not be equal
duke@435	660	// to the result operand, otherwise the backend fails
duke@435	661	case lir_cmove:
duke@435	662	{
duke@435	663	assert(op->as_Op2() != NULL, "must be");
duke@435	664	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	665
roland@3787	666	assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
roland@3787	667	op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	668	assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
duke@435	669
duke@435	670	do_input(op2->_opr1);
duke@435	671	do_input(op2->_opr2);
duke@435	672	do_temp(op2->_opr2);
duke@435	673	do_output(op2->_result);
duke@435	674
duke@435	675	break;
duke@435	676	}
duke@435	677
duke@435	678	// vspecial handling for strict operations: register input operands
duke@435	679	// as temp to guarantee that they do not overlap with other
duke@435	680	// registers
duke@435	681	case lir_mul_strictfp:
duke@435	682	case lir_div_strictfp:
duke@435	683	{
duke@435	684	assert(op->as_Op2() != NULL, "must be");
duke@435	685	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	686
duke@435	687	assert(op2->_info == NULL, "not used");
duke@435	688	assert(op2->_opr1->is_valid(), "used");
duke@435	689	assert(op2->_opr2->is_valid(), "used");
duke@435	690	assert(op2->_result->is_valid(), "used");
roland@3787	691	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	692	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	693
duke@435	694	do_input(op2->_opr1); do_temp(op2->_opr1);
duke@435	695	do_input(op2->_opr2); do_temp(op2->_opr2);
roland@3787	696	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
duke@435	697	do_output(op2->_result);
duke@435	698
duke@435	699	break;
duke@435	700	}
duke@435	701
never@1813	702	case lir_throw: {
duke@435	703	assert(op->as_Op2() != NULL, "must be");
duke@435	704	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	705
duke@435	706	if (op2->_info) do_info(op2->_info);
duke@435	707	if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
duke@435	708	if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
duke@435	709	assert(op2->_result->is_illegal(), "no result");
roland@3787	710	assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
roland@3787	711	op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
duke@435	712
duke@435	713	break;
duke@435	714	}
duke@435	715
never@1813	716	case lir_unwind: {
never@1813	717	assert(op->as_Op1() != NULL, "must be");
never@1813	718	LIR_Op1* op1 = (LIR_Op1*)op;
never@1813	719
never@1813	720	assert(op1->_info == NULL, "no info");
never@1813	721	assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
never@1813	722	assert(op1->_result->is_illegal(), "no result");
never@1813	723
never@1813	724	break;
never@1813	725	}
never@1813	726
duke@435	727
duke@435	728	case lir_tan:
duke@435	729	case lir_sin:
never@1388	730	case lir_cos:
never@1388	731	case lir_log:
roland@3787	732	case lir_log10:
roland@3787	733	case lir_exp: {
duke@435	734	assert(op->as_Op2() != NULL, "must be");
duke@435	735	LIR_Op2* op2 = (LIR_Op2*)op;
duke@435	736
never@1388	737	// On x86 tan/sin/cos need two temporary fpu stack slots and
never@1388	738	// log/log10 need one so handle opr2 and tmp as temp inputs.
never@1388	739	// Register input operand as temp to guarantee that it doesn't
never@1388	740	// overlap with the input.
duke@435	741	assert(op2->_info == NULL, "not used");
roland@3787	742	assert(op2->_tmp5->is_illegal(), "not used");
roland@3787	743	assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
roland@3787	744	assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
roland@3787	745	assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
duke@435	746	assert(op2->_opr1->is_valid(), "used");
duke@435	747	do_input(op2->_opr1); do_temp(op2->_opr1);
duke@435	748
duke@435	749	if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
roland@3787	750	if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
roland@3787	751	if (op2->_tmp2->is_valid()) do_temp(op2->_tmp2);
roland@3787	752	if (op2->_tmp3->is_valid()) do_temp(op2->_tmp3);
roland@3787	753	if (op2->_tmp4->is_valid()) do_temp(op2->_tmp4);
duke@435	754	if (op2->_result->is_valid()) do_output(op2->_result);
duke@435	755
duke@435	756	break;
duke@435	757	}
duke@435	758
roland@3787	759	case lir_pow: {
roland@3787	760	assert(op->as_Op2() != NULL, "must be");
roland@3787	761	LIR_Op2* op2 = (LIR_Op2*)op;
roland@3787	762
roland@3787	763	// On x86 pow needs two temporary fpu stack slots: tmp1 and
roland@3787	764	// tmp2. Register input operands as temps to guarantee that it
roland@3787	765	// doesn't overlap with the temporary slots.
roland@3787	766	assert(op2->_info == NULL, "not used");
roland@3787	767	assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
roland@3787	768	assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
roland@3787	769	&& op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
roland@3787	770	assert(op2->_result->is_valid(), "used");
roland@3787	771
roland@3787	772	do_input(op2->_opr1); do_temp(op2->_opr1);
roland@3787	773	do_input(op2->_opr2); do_temp(op2->_opr2);
roland@3787	774	do_temp(op2->_tmp1);
roland@3787	775	do_temp(op2->_tmp2);
roland@3787	776	do_temp(op2->_tmp3);
roland@3787	777	do_temp(op2->_tmp4);
roland@3787	778	do_temp(op2->_tmp5);
roland@3787	779	do_output(op2->_result);
roland@3787	780
roland@3787	781	break;
roland@3787	782	}
duke@435	783
duke@435	784	// LIR_Op3
duke@435	785	case lir_idiv:
duke@435	786	case lir_irem: {
duke@435	787	assert(op->as_Op3() != NULL, "must be");
duke@435	788	LIR_Op3* op3= (LIR_Op3*)op;
duke@435	789
duke@435	790	if (op3->_info) do_info(op3->_info);
duke@435	791	if (op3->_opr1->is_valid()) do_input(op3->_opr1);
duke@435	792
duke@435	793	// second operand is input and temp, so ensure that second operand
duke@435	794	// and third operand get not the same register
duke@435	795	if (op3->_opr2->is_valid()) do_input(op3->_opr2);
duke@435	796	if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
duke@435	797	if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
duke@435	798
duke@435	799	if (op3->_result->is_valid()) do_output(op3->_result);
duke@435	800
duke@435	801	break;
duke@435	802	}
duke@435	803
duke@435	804
duke@435	805	// LIR_OpJavaCall
duke@435	806	case lir_static_call:
duke@435	807	case lir_optvirtual_call:
duke@435	808	case lir_icvirtual_call:
twisti@1730	809	case lir_virtual_call:
twisti@1730	810	case lir_dynamic_call: {
twisti@1730	811	LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
twisti@1730	812	assert(opJavaCall != NULL, "must be");
duke@435	813
duke@435	814	if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
duke@435	815
duke@435	816	// only visit register parameters
duke@435	817	int n = opJavaCall->_arguments->length();
bpittore@4625	818	for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
duke@435	819	if (!opJavaCall->_arguments->at(i)->is_pointer()) {
duke@435	820	do_input(*opJavaCall->_arguments->adr_at(i));
duke@435	821	}
duke@435	822	}
duke@435	823
duke@435	824	if (opJavaCall->_info) do_info(opJavaCall->_info);
twisti@1919	825	if (opJavaCall->is_method_handle_invoke()) {
twisti@1919	826	opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
twisti@1919	827	do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
twisti@1919	828	}
duke@435	829	do_call();
duke@435	830	if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
duke@435	831
duke@435	832	break;
duke@435	833	}
duke@435	834
duke@435	835
duke@435	836	// LIR_OpRTCall
duke@435	837	case lir_rtcall: {
duke@435	838	assert(op->as_OpRTCall() != NULL, "must be");
duke@435	839	LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
duke@435	840
duke@435	841	// only visit register parameters
duke@435	842	int n = opRTCall->_arguments->length();
duke@435	843	for (int i = 0; i < n; i++) {
duke@435	844	if (!opRTCall->_arguments->at(i)->is_pointer()) {
duke@435	845	do_input(*opRTCall->_arguments->adr_at(i));
duke@435	846	}
duke@435	847	}
duke@435	848	if (opRTCall->_info) do_info(opRTCall->_info);
duke@435	849	if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
duke@435	850	do_call();
duke@435	851	if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
duke@435	852
duke@435	853	break;
duke@435	854	}
duke@435	855
duke@435	856
duke@435	857	// LIR_OpArrayCopy
duke@435	858	case lir_arraycopy: {
duke@435	859	assert(op->as_OpArrayCopy() != NULL, "must be");
duke@435	860	LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
duke@435	861
duke@435	862	assert(opArrayCopy->_result->is_illegal(), "unused");
duke@435	863	assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
duke@435	864	assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
duke@435	865	assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
duke@435	866	assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
duke@435	867	assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
duke@435	868	assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
duke@435	869	if (opArrayCopy->_info) do_info(opArrayCopy->_info);
duke@435	870
duke@435	871	// the implementation of arraycopy always has a call into the runtime
duke@435	872	do_call();
duke@435	873
duke@435	874	break;
duke@435	875	}
duke@435	876
duke@435	877
duke@435	878	// LIR_OpLock
duke@435	879	case lir_lock:
duke@435	880	case lir_unlock: {
duke@435	881	assert(op->as_OpLock() != NULL, "must be");
duke@435	882	LIR_OpLock* opLock = (LIR_OpLock*)op;
duke@435	883
duke@435	884	if (opLock->_info) do_info(opLock->_info);
duke@435	885
duke@435	886	// TODO: check if these operands really have to be temp
duke@435	887	// (or if input is sufficient). This may have influence on the oop map!
duke@435	888	assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
duke@435	889	assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
duke@435	890	assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
duke@435	891
duke@435	892	if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
duke@435	893	assert(opLock->_result->is_illegal(), "unused");
duke@435	894
duke@435	895	do_stub(opLock->_stub);
duke@435	896
duke@435	897	break;
duke@435	898	}
duke@435	899
duke@435	900
duke@435	901	// LIR_OpDelay
duke@435	902	case lir_delay_slot: {
duke@435	903	assert(op->as_OpDelay() != NULL, "must be");
duke@435	904	LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
duke@435	905
duke@435	906	visit(opDelay->delay_op());
duke@435	907	break;
duke@435	908	}
duke@435	909
duke@435	910	// LIR_OpTypeCheck
duke@435	911	case lir_instanceof:
duke@435	912	case lir_checkcast:
duke@435	913	case lir_store_check: {
duke@435	914	assert(op->as_OpTypeCheck() != NULL, "must be");
duke@435	915	LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
duke@435	916
duke@435	917	if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
duke@435	918	if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
duke@435	919	if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
roland@3394	920	if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
roland@3394	921	do_temp(opTypeCheck->_object);
roland@3394	922	}
duke@435	923	if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
duke@435	924	if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
duke@435	925	if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
duke@435	926	if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
duke@435	927	if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
duke@435	928	do_stub(opTypeCheck->_stub);
duke@435	929	break;
duke@435	930	}
duke@435	931
duke@435	932	// LIR_OpCompareAndSwap
duke@435	933	case lir_cas_long:
duke@435	934	case lir_cas_obj:
duke@435	935	case lir_cas_int: {
duke@435	936	assert(op->as_OpCompareAndSwap() != NULL, "must be");
duke@435	937	LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
duke@435	938
bobv@2036	939	assert(opCompareAndSwap->_addr->is_valid(), "used");
bobv@2036	940	assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
bobv@2036	941	assert(opCompareAndSwap->_new_value->is_valid(), "used");
duke@435	942	if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
bobv@2036	943	do_input(opCompareAndSwap->_addr);
bobv@2036	944	do_temp(opCompareAndSwap->_addr);
bobv@2036	945	do_input(opCompareAndSwap->_cmp_value);
bobv@2036	946	do_temp(opCompareAndSwap->_cmp_value);
bobv@2036	947	do_input(opCompareAndSwap->_new_value);
bobv@2036	948	do_temp(opCompareAndSwap->_new_value);
duke@435	949	if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
duke@435	950	if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
duke@435	951	if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
duke@435	952
duke@435	953	break;
duke@435	954	}
duke@435	955
duke@435	956
duke@435	957	// LIR_OpAllocArray;
duke@435	958	case lir_alloc_array: {
duke@435	959	assert(op->as_OpAllocArray() != NULL, "must be");
duke@435	960	LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
duke@435	961
duke@435	962	if (opAllocArray->_info) do_info(opAllocArray->_info);
duke@435	963	if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
duke@435	964	if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
duke@435	965	if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
duke@435	966	if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
duke@435	967	if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
duke@435	968	if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
duke@435	969	if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
duke@435	970	do_stub(opAllocArray->_stub);
duke@435	971	break;
duke@435	972	}
duke@435	973
duke@435	974	// LIR_OpProfileCall:
duke@435	975	case lir_profile_call: {
duke@435	976	assert(op->as_OpProfileCall() != NULL, "must be");
duke@435	977	LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
duke@435	978
duke@435	979	if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
duke@435	980	assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
duke@435	981	assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
duke@435	982	break;
duke@435	983	}
duke@435	984	default:
duke@435	985	ShouldNotReachHere();
duke@435	986	}
duke@435	987	}
duke@435	988
duke@435	989
duke@435	990	void LIR_OpVisitState::do_stub(CodeStub* stub) {
duke@435	991	if (stub != NULL) {
duke@435	992	stub->visit(this);
duke@435	993	}
duke@435	994	}
duke@435	995
duke@435	996	XHandlers* LIR_OpVisitState::all_xhandler() {
duke@435	997	XHandlers* result = NULL;
duke@435	998
duke@435	999	int i;
duke@435	1000	for (i = 0; i < info_count(); i++) {
duke@435	1001	if (info_at(i)->exception_handlers() != NULL) {
duke@435	1002	result = info_at(i)->exception_handlers();
duke@435	1003	break;
duke@435	1004	}
duke@435	1005	}
duke@435	1006
duke@435	1007	#ifdef ASSERT
duke@435	1008	for (i = 0; i < info_count(); i++) {
duke@435	1009	assert(info_at(i)->exception_handlers() == NULL ||
duke@435	1010	info_at(i)->exception_handlers() == result,
duke@435	1011	"only one xhandler list allowed per LIR-operation");
duke@435	1012	}
duke@435	1013	#endif
duke@435	1014
duke@435	1015	if (result != NULL) {
duke@435	1016	return result;
duke@435	1017	} else {
duke@435	1018	return new XHandlers();
duke@435	1019	}
duke@435	1020
duke@435	1021	return result;
duke@435	1022	}
duke@435	1023
duke@435	1024
duke@435	1025	#ifdef ASSERT
duke@435	1026	bool LIR_OpVisitState::no_operands(LIR_Op* op) {
duke@435	1027	visit(op);
duke@435	1028
duke@435	1029	return opr_count(inputMode) == 0 &&
duke@435	1030	opr_count(outputMode) == 0 &&
duke@435	1031	opr_count(tempMode) == 0 &&
duke@435	1032	info_count() == 0 &&
duke@435	1033	!has_call() &&
duke@435	1034	!has_slow_case();
duke@435	1035	}
duke@435	1036	#endif
duke@435	1037
duke@435	1038	//---------------------------------------------------
duke@435	1039
duke@435	1040
duke@435	1041	void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
duke@435	1042	masm->emit_call(this);
duke@435	1043	}
duke@435	1044
duke@435	1045	void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
duke@435	1046	masm->emit_rtcall(this);
duke@435	1047	}
duke@435	1048
duke@435	1049	void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
duke@435	1050	masm->emit_opLabel(this);
duke@435	1051	}
duke@435	1052
duke@435	1053	void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
duke@435	1054	masm->emit_arraycopy(this);
duke@435	1055	masm->emit_code_stub(stub());
duke@435	1056	}
duke@435	1057
duke@435	1058	void LIR_Op0::emit_code(LIR_Assembler* masm) {
duke@435	1059	masm->emit_op0(this);
duke@435	1060	}
duke@435	1061
duke@435	1062	void LIR_Op1::emit_code(LIR_Assembler* masm) {
duke@435	1063	masm->emit_op1(this);
duke@435	1064	}
duke@435	1065
duke@435	1066	void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
duke@435	1067	masm->emit_alloc_obj(this);
duke@435	1068	masm->emit_code_stub(stub());
duke@435	1069	}
duke@435	1070
duke@435	1071	void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
duke@435	1072	masm->emit_opBranch(this);
duke@435	1073	if (stub()) {
duke@435	1074	masm->emit_code_stub(stub());
duke@435	1075	}
duke@435	1076	}
duke@435	1077
duke@435	1078	void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
duke@435	1079	masm->emit_opConvert(this);
duke@435	1080	if (stub() != NULL) {
duke@435	1081	masm->emit_code_stub(stub());
duke@435	1082	}
duke@435	1083	}
duke@435	1084
duke@435	1085	void LIR_Op2::emit_code(LIR_Assembler* masm) {
duke@435	1086	masm->emit_op2(this);
duke@435	1087	}
duke@435	1088
duke@435	1089	void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
duke@435	1090	masm->emit_alloc_array(this);
duke@435	1091	masm->emit_code_stub(stub());
duke@435	1092	}
duke@435	1093
duke@435	1094	void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
iveresov@2146	1095	masm->emit_opTypeCheck(this);
duke@435	1096	if (stub()) {
duke@435	1097	masm->emit_code_stub(stub());
duke@435	1098	}
duke@435	1099	}
duke@435	1100
duke@435	1101	void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
duke@435	1102	masm->emit_compare_and_swap(this);
duke@435	1103	}
duke@435	1104
duke@435	1105	void LIR_Op3::emit_code(LIR_Assembler* masm) {
duke@435	1106	masm->emit_op3(this);
duke@435	1107	}
duke@435	1108
duke@435	1109	void LIR_OpLock::emit_code(LIR_Assembler* masm) {
duke@435	1110	masm->emit_lock(this);
duke@435	1111	if (stub()) {
duke@435	1112	masm->emit_code_stub(stub());
duke@435	1113	}
duke@435	1114	}
duke@435	1115
roland@4860	1116	#ifdef ASSERT
roland@4860	1117	void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
roland@4860	1118	masm->emit_assert(this);
roland@4860	1119	}
roland@4860	1120	#endif
duke@435	1121
duke@435	1122	void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
duke@435	1123	masm->emit_delay(this);
duke@435	1124	}
duke@435	1125
duke@435	1126	void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
duke@435	1127	masm->emit_profile_call(this);
duke@435	1128	}
duke@435	1129
duke@435	1130	// LIR_List
duke@435	1131	LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
duke@435	1132	: _operations(8)
duke@435	1133	, _compilation(compilation)
duke@435	1134	#ifndef PRODUCT
duke@435	1135	, _block(block)
duke@435	1136	#endif
duke@435	1137	#ifdef ASSERT
duke@435	1138	, _file(NULL)
duke@435	1139	, _line(0)
duke@435	1140	#endif
duke@435	1141	{ }
duke@435	1142
duke@435	1143
duke@435	1144	#ifdef ASSERT
duke@435	1145	void LIR_List::set_file_and_line(const char * file, int line) {
duke@435	1146	const char * f = strrchr(file, '/');
duke@435	1147	if (f == NULL) f = strrchr(file, '\\');
duke@435	1148	if (f == NULL) {
duke@435	1149	f = file;
duke@435	1150	} else {
duke@435	1151	f++;
duke@435	1152	}
duke@435	1153	_file = f;
duke@435	1154	_line = line;
duke@435	1155	}
duke@435	1156	#endif
duke@435	1157
duke@435	1158
duke@435	1159	void LIR_List::append(LIR_InsertionBuffer* buffer) {
duke@435	1160	assert(this == buffer->lir_list(), "wrong lir list");
duke@435	1161	const int n = _operations.length();
duke@435	1162
duke@435	1163	if (buffer->number_of_ops() > 0) {
duke@435	1164	// increase size of instructions list
duke@435	1165	_operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
duke@435	1166	// insert ops from buffer into instructions list
duke@435	1167	int op_index = buffer->number_of_ops() - 1;
duke@435	1168	int ip_index = buffer->number_of_insertion_points() - 1;
duke@435	1169	int from_index = n - 1;
duke@435	1170	int to_index = _operations.length() - 1;
duke@435	1171	for (; ip_index >= 0; ip_index --) {
duke@435	1172	int index = buffer->index_at(ip_index);
duke@435	1173	// make room after insertion point
duke@435	1174	while (index < from_index) {
duke@435	1175	_operations.at_put(to_index --, _operations.at(from_index --));
duke@435	1176	}
duke@435	1177	// insert ops from buffer
duke@435	1178	for (int i = buffer->count_at(ip_index); i > 0; i --) {
duke@435	1179	_operations.at_put(to_index --, buffer->op_at(op_index --));
duke@435	1180	}
duke@435	1181	}
duke@435	1182	}
duke@435	1183
duke@435	1184	buffer->finish();
duke@435	1185	}
duke@435	1186
duke@435	1187
duke@435	1188	void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
roland@4051	1189	assert(reg->type() == T_OBJECT, "bad reg");
duke@435	1190	append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
duke@435	1191	}
duke@435	1192
coleenp@4037	1193	void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
roland@4051	1194	assert(reg->type() == T_METADATA, "bad reg");
coleenp@4037	1195	append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
coleenp@4037	1196	}
duke@435	1197
duke@435	1198	void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1199	append(new LIR_Op1(
duke@435	1200	lir_move,
duke@435	1201	LIR_OprFact::address(addr),
duke@435	1202	src,
duke@435	1203	addr->type(),
duke@435	1204	patch_code,
duke@435	1205	info));
duke@435	1206	}
duke@435	1207
duke@435	1208
duke@435	1209	void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1210	append(new LIR_Op1(
duke@435	1211	lir_move,
duke@435	1212	LIR_OprFact::address(address),
duke@435	1213	dst,
duke@435	1214	address->type(),
duke@435	1215	patch_code,
duke@435	1216	info, lir_move_volatile));
duke@435	1217	}
duke@435	1218
duke@435	1219	void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1220	append(new LIR_Op1(
duke@435	1221	lir_move,
duke@435	1222	LIR_OprFact::address(new LIR_Address(base, offset, type)),
duke@435	1223	dst,
duke@435	1224	type,
duke@435	1225	patch_code,
duke@435	1226	info, lir_move_volatile));
duke@435	1227	}
duke@435	1228
duke@435	1229
duke@435	1230	void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
duke@435	1231	append(new LIR_Op1(
duke@435	1232	is_store ? lir_prefetchw : lir_prefetchr,
duke@435	1233	LIR_OprFact::address(addr)));
duke@435	1234	}
duke@435	1235
duke@435	1236
duke@435	1237	void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1238	append(new LIR_Op1(
duke@435	1239	lir_move,
duke@435	1240	LIR_OprFact::intConst(v),
duke@435	1241	LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
duke@435	1242	type,
duke@435	1243	patch_code,
duke@435	1244	info));
duke@435	1245	}
duke@435	1246
duke@435	1247
duke@435	1248	void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1249	append(new LIR_Op1(
duke@435	1250	lir_move,
duke@435	1251	LIR_OprFact::oopConst(o),
duke@435	1252	LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
duke@435	1253	type,
duke@435	1254	patch_code,
duke@435	1255	info));
duke@435	1256	}
duke@435	1257
duke@435	1258
duke@435	1259	void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1260	append(new LIR_Op1(
duke@435	1261	lir_move,
duke@435	1262	src,
duke@435	1263	LIR_OprFact::address(addr),
duke@435	1264	addr->type(),
duke@435	1265	patch_code,
duke@435	1266	info));
duke@435	1267	}
duke@435	1268
duke@435	1269
duke@435	1270	void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1271	append(new LIR_Op1(
duke@435	1272	lir_move,
duke@435	1273	src,
duke@435	1274	LIR_OprFact::address(addr),
duke@435	1275	addr->type(),
duke@435	1276	patch_code,
duke@435	1277	info,
duke@435	1278	lir_move_volatile));
duke@435	1279	}
duke@435	1280
duke@435	1281	void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
duke@435	1282	append(new LIR_Op1(
duke@435	1283	lir_move,
duke@435	1284	src,
duke@435	1285	LIR_OprFact::address(new LIR_Address(base, offset, type)),
duke@435	1286	type,
duke@435	1287	patch_code,
duke@435	1288	info, lir_move_volatile));
duke@435	1289	}
duke@435	1290
duke@435	1291
duke@435	1292	void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1293	append(new LIR_Op3(
duke@435	1294	lir_idiv,
duke@435	1295	left,
duke@435	1296	right,
duke@435	1297	tmp,
duke@435	1298	res,
duke@435	1299	info));
duke@435	1300	}
duke@435	1301
duke@435	1302
duke@435	1303	void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1304	append(new LIR_Op3(
duke@435	1305	lir_idiv,
duke@435	1306	left,
duke@435	1307	LIR_OprFact::intConst(right),
duke@435	1308	tmp,
duke@435	1309	res,
duke@435	1310	info));
duke@435	1311	}
duke@435	1312
duke@435	1313
duke@435	1314	void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1315	append(new LIR_Op3(
duke@435	1316	lir_irem,
duke@435	1317	left,
duke@435	1318	right,
duke@435	1319	tmp,
duke@435	1320	res,
duke@435	1321	info));
duke@435	1322	}
duke@435	1323
duke@435	1324
duke@435	1325	void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
duke@435	1326	append(new LIR_Op3(
duke@435	1327	lir_irem,
duke@435	1328	left,
duke@435	1329	LIR_OprFact::intConst(right),
duke@435	1330	tmp,
duke@435	1331	res,
duke@435	1332	info));
duke@435	1333	}
duke@435	1334
duke@435	1335
duke@435	1336	void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
duke@435	1337	append(new LIR_Op2(
duke@435	1338	lir_cmp,
duke@435	1339	condition,
duke@435	1340	LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
duke@435	1341	LIR_OprFact::intConst(c),
duke@435	1342	info));
duke@435	1343	}
duke@435	1344
duke@435	1345
duke@435	1346	void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
duke@435	1347	append(new LIR_Op2(
duke@435	1348	lir_cmp,
duke@435	1349	condition,
duke@435	1350	reg,
duke@435	1351	LIR_OprFact::address(addr),
duke@435	1352	info));
duke@435	1353	}
duke@435	1354
duke@435	1355	void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
duke@435	1356	int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
duke@435	1357	append(new LIR_OpAllocObj(
duke@435	1358	klass,
duke@435	1359	dst,
duke@435	1360	t1,
duke@435	1361	t2,
duke@435	1362	t3,
duke@435	1363	t4,
duke@435	1364	header_size,
duke@435	1365	object_size,
duke@435	1366	init_check,
duke@435	1367	stub));
duke@435	1368	}
duke@435	1369
duke@435	1370	void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
duke@435	1371	append(new LIR_OpAllocArray(
duke@435	1372	klass,
duke@435	1373	len,
duke@435	1374	dst,
duke@435	1375	t1,
duke@435	1376	t2,
duke@435	1377	t3,
duke@435	1378	t4,
duke@435	1379	type,
duke@435	1380	stub));
duke@435	1381	}
duke@435	1382
duke@435	1383	void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1384	append(new LIR_Op2(
duke@435	1385	lir_shl,
duke@435	1386	value,
duke@435	1387	count,
duke@435	1388	dst,
duke@435	1389	tmp));
duke@435	1390	}
duke@435	1391
duke@435	1392	void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1393	append(new LIR_Op2(
duke@435	1394	lir_shr,
duke@435	1395	value,
duke@435	1396	count,
duke@435	1397	dst,
duke@435	1398	tmp));
duke@435	1399	}
duke@435	1400
duke@435	1401
duke@435	1402	void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
duke@435	1403	append(new LIR_Op2(
duke@435	1404	lir_ushr,
duke@435	1405	value,
duke@435	1406	count,
duke@435	1407	dst,
duke@435	1408	tmp));
duke@435	1409	}
duke@435	1410
duke@435	1411	void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
duke@435	1412	append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
duke@435	1413	left,
duke@435	1414	right,
duke@435	1415	dst));
duke@435	1416	}
duke@435	1417
duke@435	1418	void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
duke@435	1419	append(new LIR_OpLock(
duke@435	1420	lir_lock,
duke@435	1421	hdr,
duke@435	1422	obj,
duke@435	1423	lock,
duke@435	1424	scratch,
duke@435	1425	stub,
duke@435	1426	info));
duke@435	1427	}
duke@435	1428
bobv@2036	1429	void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
duke@435	1430	append(new LIR_OpLock(
duke@435	1431	lir_unlock,
duke@435	1432	hdr,
duke@435	1433	obj,
duke@435	1434	lock,
bobv@2036	1435	scratch,
duke@435	1436	stub,
duke@435	1437	NULL));
duke@435	1438	}
duke@435	1439
duke@435	1440
duke@435	1441	void check_LIR() {
duke@435	1442	// cannot do the proper checking as PRODUCT and other modes return different results
duke@435	1443	// guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
duke@435	1444	}
duke@435	1445
duke@435	1446
duke@435	1447
duke@435	1448	void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
duke@435	1449	LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
duke@435	1450	CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
duke@435	1451	ciMethod* profiled_method, int profiled_bci) {
iveresov@2138	1452	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
iveresov@2138	1453	tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
iveresov@2138	1454	if (profiled_method != NULL) {
iveresov@2138	1455	c->set_profiled_method(profiled_method);
iveresov@2138	1456	c->set_profiled_bci(profiled_bci);
iveresov@2138	1457	c->set_should_profile(true);
iveresov@2138	1458	}
iveresov@2138	1459	append(c);
duke@435	1460	}
duke@435	1461
iveresov@2146	1462	void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
iveresov@2146	1463	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
iveresov@2146	1464	if (profiled_method != NULL) {
iveresov@2146	1465	c->set_profiled_method(profiled_method);
iveresov@2146	1466	c->set_profiled_bci(profiled_bci);
iveresov@2146	1467	c->set_should_profile(true);
iveresov@2146	1468	}
iveresov@2146	1469	append(c);
duke@435	1470	}
duke@435	1471
duke@435	1472
iveresov@3153	1473	void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
iveresov@3153	1474	CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
iveresov@3153	1475	LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
iveresov@3153	1476	if (profiled_method != NULL) {
iveresov@3153	1477	c->set_profiled_method(profiled_method);
iveresov@3153	1478	c->set_profiled_bci(profiled_bci);
iveresov@3153	1479	c->set_should_profile(true);
iveresov@3153	1480	}
iveresov@3153	1481	append(c);
duke@435	1482	}
duke@435	1483
duke@435	1484
bobv@2036	1485	void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1486	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1487	append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
duke@435	1488	}
duke@435	1489
bobv@2036	1490	void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1491	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1492	append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
duke@435	1493	}
duke@435	1494
bobv@2036	1495	void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
bobv@2036	1496	LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
bobv@2036	1497	append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
duke@435	1498	}
duke@435	1499
duke@435	1500
duke@435	1501	#ifdef PRODUCT
duke@435	1502
duke@435	1503	void print_LIR(BlockList* blocks) {
duke@435	1504	}
duke@435	1505
duke@435	1506	#else
duke@435	1507	// LIR_OprDesc
duke@435	1508	void LIR_OprDesc::print() const {
duke@435	1509	print(tty);
duke@435	1510	}
duke@435	1511
duke@435	1512	void LIR_OprDesc::print(outputStream* out) const {
duke@435	1513	if (is_illegal()) {
duke@435	1514	return;
duke@435	1515	}
duke@435	1516
duke@435	1517	out->print("[");
duke@435	1518	if (is_pointer()) {
duke@435	1519	pointer()->print_value_on(out);
duke@435	1520	} else if (is_single_stack()) {
duke@435	1521	out->print("stack:%d", single_stack_ix());
duke@435	1522	} else if (is_double_stack()) {
duke@435	1523	out->print("dbl_stack:%d",double_stack_ix());
duke@435	1524	} else if (is_virtual()) {
duke@435	1525	out->print("R%d", vreg_number());
duke@435	1526	} else if (is_single_cpu()) {
duke@435	1527	out->print(as_register()->name());
duke@435	1528	} else if (is_double_cpu()) {
duke@435	1529	out->print(as_register_hi()->name());
duke@435	1530	out->print(as_register_lo()->name());
never@739	1531	#if defined(X86)
duke@435	1532	} else if (is_single_xmm()) {
duke@435	1533	out->print(as_xmm_float_reg()->name());
duke@435	1534	} else if (is_double_xmm()) {
duke@435	1535	out->print(as_xmm_double_reg()->name());
duke@435	1536	} else if (is_single_fpu()) {
duke@435	1537	out->print("fpu%d", fpu_regnr());
duke@435	1538	} else if (is_double_fpu()) {
duke@435	1539	out->print("fpu%d", fpu_regnrLo());
bobv@2036	1540	#elif defined(ARM)
bobv@2036	1541	} else if (is_single_fpu()) {
bobv@2036	1542	out->print("s%d", fpu_regnr());
bobv@2036	1543	} else if (is_double_fpu()) {
bobv@2036	1544	out->print("d%d", fpu_regnrLo() >> 1);
duke@435	1545	#else
duke@435	1546	} else if (is_single_fpu()) {
duke@435	1547	out->print(as_float_reg()->name());
duke@435	1548	} else if (is_double_fpu()) {
duke@435	1549	out->print(as_double_reg()->name());
duke@435	1550	#endif
duke@435	1551
duke@435	1552	} else if (is_illegal()) {
duke@435	1553	out->print("-");
duke@435	1554	} else {
duke@435	1555	out->print("Unknown Operand");
duke@435	1556	}
duke@435	1557	if (!is_illegal()) {
duke@435	1558	out->print("|%c", type_char());
duke@435	1559	}
duke@435	1560	if (is_register() && is_last_use()) {
duke@435	1561	out->print("(last_use)");
duke@435	1562	}
duke@435	1563	out->print("]");
duke@435	1564	}
duke@435	1565
duke@435	1566
duke@435	1567	// LIR_Address
duke@435	1568	void LIR_Const::print_value_on(outputStream* out) const {
duke@435	1569	switch (type()) {
roland@1732	1570	case T_ADDRESS:out->print("address:%d",as_jint()); break;
duke@435	1571	case T_INT: out->print("int:%d", as_jint()); break;
hseigel@4465	1572	case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
duke@435	1573	case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
duke@435	1574	case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
duke@435	1575	case T_OBJECT: out->print("obj:0x%x", as_jobject()); break;
coleenp@4037	1576	case T_METADATA: out->print("metadata:0x%x", as_metadata());break;
duke@435	1577	default: out->print("%3d:0x%x",type(), as_jdouble()); break;
duke@435	1578	}
duke@435	1579	}
duke@435	1580
duke@435	1581	// LIR_Address
duke@435	1582	void LIR_Address::print_value_on(outputStream* out) const {
duke@435	1583	out->print("Base:"); _base->print(out);
duke@435	1584	if (!_index->is_illegal()) {
duke@435	1585	out->print(" Index:"); _index->print(out);
duke@435	1586	switch (scale()) {
duke@435	1587	case times_1: break;
duke@435	1588	case times_2: out->print(" * 2"); break;
duke@435	1589	case times_4: out->print(" * 4"); break;
duke@435	1590	case times_8: out->print(" * 8"); break;
duke@435	1591	}
duke@435	1592	}
duke@435	1593	out->print(" Disp: %d", _disp);
duke@435	1594	}
duke@435	1595
duke@435	1596	// debug output of block header without InstructionPrinter
duke@435	1597	// (because phi functions are not necessary for LIR)
duke@435	1598	static void print_block(BlockBegin* x) {
duke@435	1599	// print block id
duke@435	1600	BlockEnd* end = x->end();
duke@435	1601	tty->print("B%d ", x->block_id());
duke@435	1602
duke@435	1603	// print flags
duke@435	1604	if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
duke@435	1605	if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
duke@435	1606	if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
duke@435	1607	if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
duke@435	1608	if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
duke@435	1609	if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
duke@435	1610	if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
duke@435	1611
duke@435	1612	// print block bci range
roland@2174	1613	tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
duke@435	1614
duke@435	1615	// print predecessors and successors
duke@435	1616	if (x->number_of_preds() > 0) {
duke@435	1617	tty->print("preds: ");
duke@435	1618	for (int i = 0; i < x->number_of_preds(); i ++) {
duke@435	1619	tty->print("B%d ", x->pred_at(i)->block_id());
duke@435	1620	}
duke@435	1621	}
duke@435	1622
duke@435	1623	if (x->number_of_sux() > 0) {
duke@435	1624	tty->print("sux: ");
duke@435	1625	for (int i = 0; i < x->number_of_sux(); i ++) {
duke@435	1626	tty->print("B%d ", x->sux_at(i)->block_id());
duke@435	1627	}
duke@435	1628	}
duke@435	1629
duke@435	1630	// print exception handlers
duke@435	1631	if (x->number_of_exception_handlers() > 0) {
duke@435	1632	tty->print("xhandler: ");
duke@435	1633	for (int i = 0; i < x->number_of_exception_handlers(); i++) {
duke@435	1634	tty->print("B%d ", x->exception_handler_at(i)->block_id());
duke@435	1635	}
duke@435	1636	}
duke@435	1637
duke@435	1638	tty->cr();
duke@435	1639	}
duke@435	1640
duke@435	1641	void print_LIR(BlockList* blocks) {
duke@435	1642	tty->print_cr("LIR:");
duke@435	1643	int i;
duke@435	1644	for (i = 0; i < blocks->length(); i++) {
duke@435	1645	BlockBegin* bb = blocks->at(i);
duke@435	1646	print_block(bb);
duke@435	1647	tty->print("__id_Instruction___________________________________________"); tty->cr();
duke@435	1648	bb->lir()->print_instructions();
duke@435	1649	}
duke@435	1650	}
duke@435	1651
duke@435	1652	void LIR_List::print_instructions() {
duke@435	1653	for (int i = 0; i < _operations.length(); i++) {
duke@435	1654	_operations.at(i)->print(); tty->cr();
duke@435	1655	}
duke@435	1656	tty->cr();
duke@435	1657	}
duke@435	1658
duke@435	1659	// LIR_Ops printing routines
duke@435	1660	// LIR_Op
duke@435	1661	void LIR_Op::print_on(outputStream* out) const {
duke@435	1662	if (id() != -1 || PrintCFGToFile) {
duke@435	1663	out->print("%4d ", id());
duke@435	1664	} else {
duke@435	1665	out->print(" ");
duke@435	1666	}
duke@435	1667	out->print(name()); out->print(" ");
duke@435	1668	print_instr(out);
roland@2174	1669	if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
duke@435	1670	#ifdef ASSERT
duke@435	1671	if (Verbose && _file != NULL) {
duke@435	1672	out->print(" (%s:%d)", _file, _line);
duke@435	1673	}
duke@435	1674	#endif
duke@435	1675	}
duke@435	1676
duke@435	1677	const char * LIR_Op::name() const {
duke@435	1678	const char* s = NULL;
duke@435	1679	switch(code()) {
duke@435	1680	// LIR_Op0
duke@435	1681	case lir_membar: s = "membar"; break;
duke@435	1682	case lir_membar_acquire: s = "membar_acquire"; break;
duke@435	1683	case lir_membar_release: s = "membar_release"; break;
jiangli@3592	1684	case lir_membar_loadload: s = "membar_loadload"; break;
jiangli@3592	1685	case lir_membar_storestore: s = "membar_storestore"; break;
jiangli@3592	1686	case lir_membar_loadstore: s = "membar_loadstore"; break;
jiangli@3592	1687	case lir_membar_storeload: s = "membar_storeload"; break;
duke@435	1688	case lir_word_align: s = "word_align"; break;
duke@435	1689	case lir_label: s = "label"; break;
duke@435	1690	case lir_nop: s = "nop"; break;
duke@435	1691	case lir_backwardbranch_target: s = "backbranch"; break;
duke@435	1692	case lir_std_entry: s = "std_entry"; break;
duke@435	1693	case lir_osr_entry: s = "osr_entry"; break;
duke@435	1694	case lir_build_frame: s = "build_frm"; break;
duke@435	1695	case lir_fpop_raw: s = "fpop_raw"; break;
duke@435	1696	case lir_24bit_FPU: s = "24bit_FPU"; break;
duke@435	1697	case lir_reset_FPU: s = "reset_FPU"; break;
duke@435	1698	case lir_breakpoint: s = "breakpoint"; break;
duke@435	1699	case lir_get_thread: s = "get_thread"; break;
duke@435	1700	// LIR_Op1
duke@435	1701	case lir_fxch: s = "fxch"; break;
duke@435	1702	case lir_fld: s = "fld"; break;
duke@435	1703	case lir_ffree: s = "ffree"; break;
duke@435	1704	case lir_push: s = "push"; break;
duke@435	1705	case lir_pop: s = "pop"; break;
duke@435	1706	case lir_null_check: s = "null_check"; break;
duke@435	1707	case lir_return: s = "return"; break;
duke@435	1708	case lir_safepoint: s = "safepoint"; break;
duke@435	1709	case lir_neg: s = "neg"; break;
duke@435	1710	case lir_leal: s = "leal"; break;
duke@435	1711	case lir_branch: s = "branch"; break;
duke@435	1712	case lir_cond_float_branch: s = "flt_cond_br"; break;
duke@435	1713	case lir_move: s = "move"; break;
duke@435	1714	case lir_roundfp: s = "roundfp"; break;
duke@435	1715	case lir_rtcall: s = "rtcall"; break;
duke@435	1716	case lir_throw: s = "throw"; break;
duke@435	1717	case lir_unwind: s = "unwind"; break;
duke@435	1718	case lir_convert: s = "convert"; break;
duke@435	1719	case lir_alloc_object: s = "alloc_obj"; break;
duke@435	1720	case lir_monaddr: s = "mon_addr"; break;
iveresov@2138	1721	case lir_pack64: s = "pack64"; break;
iveresov@2138	1722	case lir_unpack64: s = "unpack64"; break;
duke@435	1723	// LIR_Op2
duke@435	1724	case lir_cmp: s = "cmp"; break;
duke@435	1725	case lir_cmp_l2i: s = "cmp_l2i"; break;
duke@435	1726	case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
duke@435	1727	case lir_cmp_fd2i: s = "comp_fd2i"; break;
duke@435	1728	case lir_cmove: s = "cmove"; break;
duke@435	1729	case lir_add: s = "add"; break;
duke@435	1730	case lir_sub: s = "sub"; break;
duke@435	1731	case lir_mul: s = "mul"; break;
duke@435	1732	case lir_mul_strictfp: s = "mul_strictfp"; break;
duke@435	1733	case lir_div: s = "div"; break;
duke@435	1734	case lir_div_strictfp: s = "div_strictfp"; break;
duke@435	1735	case lir_rem: s = "rem"; break;
duke@435	1736	case lir_abs: s = "abs"; break;
duke@435	1737	case lir_sqrt: s = "sqrt"; break;
duke@435	1738	case lir_sin: s = "sin"; break;
duke@435	1739	case lir_cos: s = "cos"; break;
duke@435	1740	case lir_tan: s = "tan"; break;
duke@435	1741	case lir_log: s = "log"; break;
duke@435	1742	case lir_log10: s = "log10"; break;
roland@3787	1743	case lir_exp: s = "exp"; break;
roland@3787	1744	case lir_pow: s = "pow"; break;
duke@435	1745	case lir_logic_and: s = "logic_and"; break;
duke@435	1746	case lir_logic_or: s = "logic_or"; break;
duke@435	1747	case lir_logic_xor: s = "logic_xor"; break;
duke@435	1748	case lir_shl: s = "shift_left"; break;
duke@435	1749	case lir_shr: s = "shift_right"; break;
duke@435	1750	case lir_ushr: s = "ushift_right"; break;
duke@435	1751	case lir_alloc_array: s = "alloc_array"; break;
roland@4106	1752	case lir_xadd: s = "xadd"; break;
roland@4106	1753	case lir_xchg: s = "xchg"; break;
duke@435	1754	// LIR_Op3
duke@435	1755	case lir_idiv: s = "idiv"; break;
duke@435	1756	case lir_irem: s = "irem"; break;
duke@435	1757	// LIR_OpJavaCall
duke@435	1758	case lir_static_call: s = "static"; break;
duke@435	1759	case lir_optvirtual_call: s = "optvirtual"; break;
duke@435	1760	case lir_icvirtual_call: s = "icvirtual"; break;
duke@435	1761	case lir_virtual_call: s = "virtual"; break;
twisti@1730	1762	case lir_dynamic_call: s = "dynamic"; break;
duke@435	1763	// LIR_OpArrayCopy
duke@435	1764	case lir_arraycopy: s = "arraycopy"; break;
duke@435	1765	// LIR_OpLock
duke@435	1766	case lir_lock: s = "lock"; break;
duke@435	1767	case lir_unlock: s = "unlock"; break;
duke@435	1768	// LIR_OpDelay
duke@435	1769	case lir_delay_slot: s = "delay"; break;
duke@435	1770	// LIR_OpTypeCheck
duke@435	1771	case lir_instanceof: s = "instanceof"; break;
duke@435	1772	case lir_checkcast: s = "checkcast"; break;
duke@435	1773	case lir_store_check: s = "store_check"; break;
duke@435	1774	// LIR_OpCompareAndSwap
duke@435	1775	case lir_cas_long: s = "cas_long"; break;
duke@435	1776	case lir_cas_obj: s = "cas_obj"; break;
duke@435	1777	case lir_cas_int: s = "cas_int"; break;
duke@435	1778	// LIR_OpProfileCall
duke@435	1779	case lir_profile_call: s = "profile_call"; break;
roland@4860	1780	// LIR_OpAssert
roland@4947	1781	#ifdef ASSERT
roland@4860	1782	case lir_assert: s = "assert"; break;
roland@4947	1783	#endif
duke@435	1784	case lir_none: ShouldNotReachHere();break;
duke@435	1785	default: s = "illegal_op"; break;
duke@435	1786	}
duke@435	1787	return s;
duke@435	1788	}
duke@435	1789
duke@435	1790	// LIR_OpJavaCall
duke@435	1791	void LIR_OpJavaCall::print_instr(outputStream* out) const {
duke@435	1792	out->print("call: ");
duke@435	1793	out->print("[addr: 0x%x]", address());
duke@435	1794	if (receiver()->is_valid()) {
duke@435	1795	out->print(" [recv: "); receiver()->print(out); out->print("]");
duke@435	1796	}
duke@435	1797	if (result_opr()->is_valid()) {
duke@435	1798	out->print(" [result: "); result_opr()->print(out); out->print("]");
duke@435	1799	}
duke@435	1800	}
duke@435	1801
duke@435	1802	// LIR_OpLabel
duke@435	1803	void LIR_OpLabel::print_instr(outputStream* out) const {
duke@435	1804	out->print("[label:0x%x]", _label);
duke@435	1805	}
duke@435	1806
duke@435	1807	// LIR_OpArrayCopy
duke@435	1808	void LIR_OpArrayCopy::print_instr(outputStream* out) const {
duke@435	1809	src()->print(out); out->print(" ");
duke@435	1810	src_pos()->print(out); out->print(" ");
duke@435	1811	dst()->print(out); out->print(" ");
duke@435	1812	dst_pos()->print(out); out->print(" ");
duke@435	1813	length()->print(out); out->print(" ");
duke@435	1814	tmp()->print(out); out->print(" ");
duke@435	1815	}
duke@435	1816
duke@435	1817	// LIR_OpCompareAndSwap
duke@435	1818	void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
duke@435	1819	addr()->print(out); out->print(" ");
duke@435	1820	cmp_value()->print(out); out->print(" ");
duke@435	1821	new_value()->print(out); out->print(" ");
duke@435	1822	tmp1()->print(out); out->print(" ");
duke@435	1823	tmp2()->print(out); out->print(" ");
duke@435	1824
duke@435	1825	}
duke@435	1826
duke@435	1827	// LIR_Op0
duke@435	1828	void LIR_Op0::print_instr(outputStream* out) const {
duke@435	1829	result_opr()->print(out);
duke@435	1830	}
duke@435	1831
duke@435	1832	// LIR_Op1
duke@435	1833	const char * LIR_Op1::name() const {
duke@435	1834	if (code() == lir_move) {
duke@435	1835	switch (move_kind()) {
duke@435	1836	case lir_move_normal:
duke@435	1837	return "move";
duke@435	1838	case lir_move_unaligned:
duke@435	1839	return "unaligned move";
duke@435	1840	case lir_move_volatile:
duke@435	1841	return "volatile_move";
iveresov@2344	1842	case lir_move_wide:
iveresov@2344	1843	return "wide_move";
duke@435	1844	default:
duke@435	1845	ShouldNotReachHere();
duke@435	1846	return "illegal_op";
duke@435	1847	}
duke@435	1848	} else {
duke@435	1849	return LIR_Op::name();
duke@435	1850	}
duke@435	1851	}
duke@435	1852
duke@435	1853
duke@435	1854	void LIR_Op1::print_instr(outputStream* out) const {
duke@435	1855	_opr->print(out); out->print(" ");
duke@435	1856	result_opr()->print(out); out->print(" ");
duke@435	1857	print_patch_code(out, patch_code());
duke@435	1858	}
duke@435	1859
duke@435	1860
duke@435	1861	// LIR_Op1
duke@435	1862	void LIR_OpRTCall::print_instr(outputStream* out) const {
duke@435	1863	intx a = (intx)addr();
duke@435	1864	out->print(Runtime1::name_for_address(addr()));
duke@435	1865	out->print(" ");
duke@435	1866	tmp()->print(out);
duke@435	1867	}
duke@435	1868
duke@435	1869	void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
duke@435	1870	switch(code) {
duke@435	1871	case lir_patch_none: break;
duke@435	1872	case lir_patch_low: out->print("[patch_low]"); break;
duke@435	1873	case lir_patch_high: out->print("[patch_high]"); break;
duke@435	1874	case lir_patch_normal: out->print("[patch_normal]"); break;
duke@435	1875	default: ShouldNotReachHere();
duke@435	1876	}
duke@435	1877	}
duke@435	1878
duke@435	1879	// LIR_OpBranch
duke@435	1880	void LIR_OpBranch::print_instr(outputStream* out) const {
duke@435	1881	print_condition(out, cond()); out->print(" ");
duke@435	1882	if (block() != NULL) {
duke@435	1883	out->print("[B%d] ", block()->block_id());
duke@435	1884	} else if (stub() != NULL) {
duke@435	1885	out->print("[");
duke@435	1886	stub()->print_name(out);
duke@435	1887	out->print(": 0x%x]", stub());
roland@2174	1888	if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
duke@435	1889	} else {
duke@435	1890	out->print("[label:0x%x] ", label());
duke@435	1891	}
duke@435	1892	if (ublock() != NULL) {
duke@435	1893	out->print("unordered: [B%d] ", ublock()->block_id());
duke@435	1894	}
duke@435	1895	}
duke@435	1896
duke@435	1897	void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
duke@435	1898	switch(cond) {
duke@435	1899	case lir_cond_equal: out->print("[EQ]"); break;
duke@435	1900	case lir_cond_notEqual: out->print("[NE]"); break;
duke@435	1901	case lir_cond_less: out->print("[LT]"); break;
duke@435	1902	case lir_cond_lessEqual: out->print("[LE]"); break;
duke@435	1903	case lir_cond_greaterEqual: out->print("[GE]"); break;
duke@435	1904	case lir_cond_greater: out->print("[GT]"); break;
duke@435	1905	case lir_cond_belowEqual: out->print("[BE]"); break;
duke@435	1906	case lir_cond_aboveEqual: out->print("[AE]"); break;
duke@435	1907	case lir_cond_always: out->print("[AL]"); break;
duke@435	1908	default: out->print("[%d]",cond); break;
duke@435	1909	}
duke@435	1910	}
duke@435	1911
duke@435	1912	// LIR_OpConvert
duke@435	1913	void LIR_OpConvert::print_instr(outputStream* out) const {
duke@435	1914	print_bytecode(out, bytecode());
duke@435	1915	in_opr()->print(out); out->print(" ");
duke@435	1916	result_opr()->print(out); out->print(" ");
bobv@2036	1917	#ifdef PPC
bobv@2036	1918	if(tmp1()->is_valid()) {
bobv@2036	1919	tmp1()->print(out); out->print(" ");
bobv@2036	1920	tmp2()->print(out); out->print(" ");
bobv@2036	1921	}
bobv@2036	1922	#endif
duke@435	1923	}
duke@435	1924
duke@435	1925	void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
duke@435	1926	switch(code) {
duke@435	1927	case Bytecodes::_d2f: out->print("[d2f] "); break;
duke@435	1928	case Bytecodes::_d2i: out->print("[d2i] "); break;
duke@435	1929	case Bytecodes::_d2l: out->print("[d2l] "); break;
duke@435	1930	case Bytecodes::_f2d: out->print("[f2d] "); break;
duke@435	1931	case Bytecodes::_f2i: out->print("[f2i] "); break;
duke@435	1932	case Bytecodes::_f2l: out->print("[f2l] "); break;
duke@435	1933	case Bytecodes::_i2b: out->print("[i2b] "); break;
duke@435	1934	case Bytecodes::_i2c: out->print("[i2c] "); break;
duke@435	1935	case Bytecodes::_i2d: out->print("[i2d] "); break;
duke@435	1936	case Bytecodes::_i2f: out->print("[i2f] "); break;
duke@435	1937	case Bytecodes::_i2l: out->print("[i2l] "); break;
duke@435	1938	case Bytecodes::_i2s: out->print("[i2s] "); break;
duke@435	1939	case Bytecodes::_l2i: out->print("[l2i] "); break;
duke@435	1940	case Bytecodes::_l2f: out->print("[l2f] "); break;
duke@435	1941	case Bytecodes::_l2d: out->print("[l2d] "); break;
duke@435	1942	default:
duke@435	1943	out->print("[?%d]",code);
duke@435	1944	break;
duke@435	1945	}
duke@435	1946	}
duke@435	1947
duke@435	1948	void LIR_OpAllocObj::print_instr(outputStream* out) const {
duke@435	1949	klass()->print(out); out->print(" ");
duke@435	1950	obj()->print(out); out->print(" ");
duke@435	1951	tmp1()->print(out); out->print(" ");
duke@435	1952	tmp2()->print(out); out->print(" ");
duke@435	1953	tmp3()->print(out); out->print(" ");
duke@435	1954	tmp4()->print(out); out->print(" ");
duke@435	1955	out->print("[hdr:%d]", header_size()); out->print(" ");
duke@435	1956	out->print("[obj:%d]", object_size()); out->print(" ");
duke@435	1957	out->print("[lbl:0x%x]", stub()->entry());
duke@435	1958	}
duke@435	1959
duke@435	1960	void LIR_OpRoundFP::print_instr(outputStream* out) const {
duke@435	1961	_opr->print(out); out->print(" ");
duke@435	1962	tmp()->print(out); out->print(" ");
duke@435	1963	result_opr()->print(out); out->print(" ");
duke@435	1964	}
duke@435	1965
duke@435	1966	// LIR_Op2
duke@435	1967	void LIR_Op2::print_instr(outputStream* out) const {
duke@435	1968	if (code() == lir_cmove) {
duke@435	1969	print_condition(out, condition()); out->print(" ");
duke@435	1970	}
duke@435	1971	in_opr1()->print(out); out->print(" ");
duke@435	1972	in_opr2()->print(out); out->print(" ");
roland@3787	1973	if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
roland@3787	1974	if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
roland@3787	1975	if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
roland@3787	1976	if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
roland@3787	1977	if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
duke@435	1978	result_opr()->print(out);
duke@435	1979	}
duke@435	1980
duke@435	1981	void LIR_OpAllocArray::print_instr(outputStream* out) const {
duke@435	1982	klass()->print(out); out->print(" ");
duke@435	1983	len()->print(out); out->print(" ");
duke@435	1984	obj()->print(out); out->print(" ");
duke@435	1985	tmp1()->print(out); out->print(" ");
duke@435	1986	tmp2()->print(out); out->print(" ");
duke@435	1987	tmp3()->print(out); out->print(" ");
duke@435	1988	tmp4()->print(out); out->print(" ");
duke@435	1989	out->print("[type:0x%x]", type()); out->print(" ");
duke@435	1990	out->print("[label:0x%x]", stub()->entry());
duke@435	1991	}
duke@435	1992
duke@435	1993
duke@435	1994	void LIR_OpTypeCheck::print_instr(outputStream* out) const {
duke@435	1995	object()->print(out); out->print(" ");
duke@435	1996	if (code() == lir_store_check) {
duke@435	1997	array()->print(out); out->print(" ");
duke@435	1998	}
duke@435	1999	if (code() != lir_store_check) {
duke@435	2000	klass()->print_name_on(out); out->print(" ");
duke@435	2001	if (fast_check()) out->print("fast_check ");
duke@435	2002	}
duke@435	2003	tmp1()->print(out); out->print(" ");
duke@435	2004	tmp2()->print(out); out->print(" ");
duke@435	2005	tmp3()->print(out); out->print(" ");
duke@435	2006	result_opr()->print(out); out->print(" ");
roland@2174	2007	if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
duke@435	2008	}
duke@435	2009
duke@435	2010
duke@435	2011	// LIR_Op3
duke@435	2012	void LIR_Op3::print_instr(outputStream* out) const {
duke@435	2013	in_opr1()->print(out); out->print(" ");
duke@435	2014	in_opr2()->print(out); out->print(" ");
duke@435	2015	in_opr3()->print(out); out->print(" ");
duke@435	2016	result_opr()->print(out);
duke@435	2017	}
duke@435	2018
duke@435	2019
duke@435	2020	void LIR_OpLock::print_instr(outputStream* out) const {
duke@435	2021	hdr_opr()->print(out); out->print(" ");
duke@435	2022	obj_opr()->print(out); out->print(" ");
duke@435	2023	lock_opr()->print(out); out->print(" ");
duke@435	2024	if (_scratch->is_valid()) {
duke@435	2025	_scratch->print(out); out->print(" ");
duke@435	2026	}
duke@435	2027	out->print("[lbl:0x%x]", stub()->entry());
duke@435	2028	}
duke@435	2029
roland@4947	2030	#ifdef ASSERT
roland@4860	2031	void LIR_OpAssert::print_instr(outputStream* out) const {
roland@4860	2032	print_condition(out, condition()); out->print(" ");
roland@4860	2033	in_opr1()->print(out); out->print(" ");
roland@4860	2034	in_opr2()->print(out); out->print(", \"");
roland@4860	2035	out->print(msg()); out->print("\"");
roland@4860	2036	}
roland@4947	2037	#endif
roland@4860	2038
duke@435	2039
duke@435	2040	void LIR_OpDelay::print_instr(outputStream* out) const {
duke@435	2041	_op->print_on(out);
duke@435	2042	}
duke@435	2043
duke@435	2044
duke@435	2045	// LIR_OpProfileCall
duke@435	2046	void LIR_OpProfileCall::print_instr(outputStream* out) const {
duke@435	2047	profiled_method()->name()->print_symbol_on(out);
duke@435	2048	out->print(".");
duke@435	2049	profiled_method()->holder()->name()->print_symbol_on(out);
duke@435	2050	out->print(" @ %d ", profiled_bci());
duke@435	2051	mdo()->print(out); out->print(" ");
duke@435	2052	recv()->print(out); out->print(" ");
duke@435	2053	tmp1()->print(out); out->print(" ");
duke@435	2054	}
duke@435	2055
duke@435	2056	#endif // PRODUCT
duke@435	2057
duke@435	2058	// Implementation of LIR_InsertionBuffer
duke@435	2059
duke@435	2060	void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
duke@435	2061	assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
duke@435	2062
duke@435	2063	int i = number_of_insertion_points() - 1;
duke@435	2064	if (i < 0 || index_at(i) < index) {
duke@435	2065	append_new(index, 1);
duke@435	2066	} else {
duke@435	2067	assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
duke@435	2068	assert(count_at(i) > 0, "check");
duke@435	2069	set_count_at(i, count_at(i) + 1);
duke@435	2070	}
duke@435	2071	_ops.push(op);
duke@435	2072
duke@435	2073	DEBUG_ONLY(verify());
duke@435	2074	}
duke@435	2075
duke@435	2076	#ifdef ASSERT
duke@435	2077	void LIR_InsertionBuffer::verify() {
duke@435	2078	int sum = 0;
duke@435	2079	int prev_idx = -1;
duke@435	2080
duke@435	2081	for (int i = 0; i < number_of_insertion_points(); i++) {
duke@435	2082	assert(prev_idx < index_at(i), "index must be ordered ascending");
duke@435	2083	sum += count_at(i);
duke@435	2084	}
duke@435	2085	assert(sum == number_of_ops(), "wrong total sum");
duke@435	2086	}
duke@435	2087	#endif